1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __SND_AR_TOKENS_H__ 8 #define __SND_AR_TOKENS_H__ 9 #define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1 10 #define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2 11 #define APM_SUB_GRAPH_DIRECTION_TX 0x1 12 #define APM_SUB_GRAPH_DIRECTION_RX 0x2 13 #define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1 14 #define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2 15 #define APM_SUB_GRAPH_SID_VOICE_CALL 0x3 16 #define APM_CONTAINER_CAP_ID_PP 0x1 17 #define APM_CONTAINER_CAP_ID_CD 0x2 18 #define APM_CONTAINER_CAP_ID_EP 0x3 19 #define APM_CONTAINER_CAP_ID_OLC 0x4 20 #define APM_CONT_GRAPH_POS_STREAM 0x1 21 #define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2 22 #define APM_CONT_GRAPH_POS_STR_DEV 0x3 23 #define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4 24 #define APM_PROC_DOMAIN_ID_MDSP 0x1 25 #define APM_PROC_DOMAIN_ID_ADSP 0x2 26 #define APM_PROC_DOMAIN_ID_SDSP 0x4 27 #define APM_PROC_DOMAIN_ID_CDSP 0x5 28 #define PCM_INTERLEAVED 1 29 #define PCM_DEINTERLEAVED_PACKED 2 30 #define PCM_DEINTERLEAVED_UNPACKED 3 31 #define AR_I2S_WS_SRC_EXTERNAL 0 32 #define AR_I2S_WS_SRC_INTERNAL 1 33 enum ar_event_types { 34 AR_EVENT_NONE = 0, 35 AR_PGA_DAPM_EVENT 36 }; 37 #define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256 38 #define SND_SOC_AR_TPLG_VOL_CTL 257 39 #define AR_TKN_DAI_INDEX 1 40 #define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID 2 41 #define AR_TKN_U32_SUB_GRAPH_PERF_MODE 3 42 #define AR_TKN_U32_SUB_GRAPH_DIRECTION 4 43 #define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID 5 44 #define AR_TKN_U32_CONTAINER_INSTANCE_ID 100 45 #define AR_TKN_U32_CONTAINER_CAPABILITY_ID 101 46 #define AR_TKN_U32_CONTAINER_STACK_SIZE 102 47 #define AR_TKN_U32_CONTAINER_GRAPH_POS 103 48 #define AR_TKN_U32_CONTAINER_PROC_DOMAIN 104 49 #define AR_TKN_U32_MODULE_ID 200 50 #define AR_TKN_U32_MODULE_INSTANCE_ID 201 51 #define AR_TKN_U32_MODULE_MAX_IP_PORTS 202 52 #define AR_TKN_U32_MODULE_MAX_OP_PORTS 203 53 #define AR_TKN_U32_MODULE_IN_PORTS 204 54 #define AR_TKN_U32_MODULE_OUT_PORTS 205 55 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206 56 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207 57 #define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208 58 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID 209 59 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID1 210 60 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID1 211 61 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID1 212 62 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID2 213 63 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID2 214 64 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID2 215 65 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID3 216 66 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID3 217 67 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID3 218 68 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID4 219 69 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID4 220 70 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID4 221 71 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID5 222 72 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID5 223 73 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID5 224 74 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID6 225 75 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID6 226 76 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID6 227 77 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID7 228 78 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID7 229 79 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID7 230 80 #define AR_TKN_U32_MODULE_HW_IF_IDX 250 81 #define AR_TKN_U32_MODULE_HW_IF_TYPE 251 82 #define AR_TKN_U32_MODULE_FMT_INTERLEAVE 252 83 #define AR_TKN_U32_MODULE_FMT_DATA 253 84 #define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE 254 85 #define AR_TKN_U32_MODULE_FMT_BIT_DEPTH 255 86 #define AR_TKN_U32_MODULE_SD_LINE_IDX 256 87 #define AR_TKN_U32_MODULE_WS_SRC 257 88 #define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR 258 89 #define AR_TKN_U32_MODULE_LOG_CODE 259 90 #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260 91 #define AR_TKN_U32_MODULE_LOG_MODE 261 92 #endif 93