1 /* 2 * Copyright (c) 2020-2022 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef SRC_CORE_COMMON_REGISTRARS_H 25 #define SRC_CORE_COMMON_REGISTRARS_H 26 27 #if defined(ENABLE_FP16_KERNELS) 28 29 #if defined(ARM_COMPUTE_ENABLE_SVE) 30 #define REGISTER_FP16_SVE(func_name) &(func_name) 31 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ 32 #define REGISTER_FP16_SVE(func_name) nullptr 33 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ 34 35 #if defined(ARM_COMPUTE_ENABLE_SVE2) 36 #define REGISTER_FP16_SVE2(func_name) &(func_name) 37 #else /* !defined(ARM_COMPUTE_ENABLE_SVE2) */ 38 #define REGISTER_FP16_SVE2(func_name) nullptr 39 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ 40 41 #if defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) 42 #define REGISTER_FP16_NEON(func_name) &(func_name) 43 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */ 44 #define REGISTER_FP16_NEON(func_name) nullptr 45 #endif /* defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ 46 47 #else /* !defined(ENABLE_FP16_KERNELS) */ 48 #define REGISTER_FP16_NEON(func_name) nullptr 49 #define REGISTER_FP16_SVE(func_name) nullptr 50 #define REGISTER_FP16_SVE2(func_name) nullptr 51 #endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */ 52 53 #if defined(ENABLE_FP32_KERNELS) 54 55 #if defined(ARM_COMPUTE_ENABLE_SVE) 56 #define REGISTER_FP32_SVE(func_name) &(func_name) 57 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ 58 #define REGISTER_FP32_SVE(func_name) nullptr 59 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ 60 61 #if defined(ARM_COMPUTE_ENABLE_SVE2) 62 #define REGISTER_FP32_SVE2(func_name) &(func_name) 63 #else /* !defined(ARM_COMPUTE_ENABLE_SVE2) */ 64 #define REGISTER_FP32_SVE2(func_name) nullptr 65 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ 66 67 #if defined(ARM_COMPUTE_ENABLE_NEON) 68 #define REGISTER_FP32_NEON(func_name) &(func_name) 69 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */ 70 #define REGISTER_FP32_NEON(func_name) nullptr 71 #endif /* defined(ARM_COMPUTE_ENABLE_NEON) */ 72 73 #else /* defined(ENABLE_FP32_KERNELS) */ 74 #define REGISTER_FP32_NEON(func_name) nullptr 75 #define REGISTER_FP32_SVE(func_name) nullptr 76 #define REGISTER_FP32_SVE2(func_name) nullptr 77 #endif /* defined(ENABLE_FP32_KERNELS) */ 78 79 #if defined(ENABLE_QASYMM8_SIGNED_KERNELS) 80 81 #define REGISTER_QASYMM8_SIGNED_NEON(func_name) &(func_name) 82 83 #if defined(ARM_COMPUTE_ENABLE_SVE) 84 #define REGISTER_QASYMM8_SIGNED_SVE(func_name) &(func_name) 85 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ 86 #define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr 87 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ 88 89 #if defined(ARM_COMPUTE_ENABLE_SVE2) 90 #define REGISTER_QASYMM8_SIGNED_SVE2(func_name) &(func_name) 91 #else /* !defined(ARM_COMPUTE_ENABLE_SVE2) */ 92 #define REGISTER_QASYMM8_SIGNED_SVE2(func_name) nullptr 93 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ 94 95 #else /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ 96 #define REGISTER_QASYMM8_SIGNED_NEON(func_name) nullptr 97 #define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr 98 #define REGISTER_QASYMM8_SIGNED_SVE2(func_name) nullptr 99 #endif /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ 100 101 #if defined(ENABLE_QASYMM8_KERNELS) 102 #define REGISTER_QASYMM8_NEON(func_name) &(func_name) 103 104 #if defined(ARM_COMPUTE_ENABLE_SVE) 105 #define REGISTER_QASYMM8_SVE(func_name) &(func_name) 106 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ 107 #define REGISTER_QASYMM8_SVE(func_name) nullptr 108 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ 109 110 #if defined(ARM_COMPUTE_ENABLE_SVE2) 111 #define REGISTER_QASYMM8_SVE2(func_name) &(func_name) 112 #else /* !defined(ARM_COMPUTE_ENABLE_SVE2) */ 113 #define REGISTER_QASYMM8_SVE2(func_name) nullptr 114 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ 115 116 #else /* defined(ENABLE_QASYMM8_KERNELS) */ 117 #define REGISTER_QASYMM8_NEON(func_name) nullptr 118 #define REGISTER_QASYMM8_SVE(func_name) nullptr 119 #define REGISTER_QASYMM8_SVE2(func_name) nullptr 120 #endif /* defined(ENABLE_QASYMM8_KERNELS) */ 121 122 #if defined(ENABLE_QSYMM16_KERNELS) 123 124 #define REGISTER_QSYMM16_NEON(func_name) &(func_name) 125 126 #if defined(ARM_COMPUTE_ENABLE_SVE) 127 #define REGISTER_QSYMM16_SVE(func_name) &(func_name) 128 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ 129 #define REGISTER_QSYMM16_SVE(func_name) nullptr 130 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ 131 132 #if defined(ARM_COMPUTE_ENABLE_SVE2) 133 #define REGISTER_QSYMM16_SVE2(func_name) &(func_name) 134 #else /* !defined(ARM_COMPUTE_ENABLE_SVE2) */ 135 #define REGISTER_QSYMM16_SVE2(func_name) nullptr 136 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ 137 138 #else /* defined(ENABLE_QSYMM16_KERNELS) */ 139 #define REGISTER_QSYMM16_NEON(func_name) nullptr 140 #define REGISTER_QSYMM16_SVE(func_name) nullptr 141 #define REGISTER_QSYMM16_SVE2(func_name) nullptr 142 #endif /* defined(ENABLE_QSYMM16_KERNELS) */ 143 144 #if defined(ENABLE_QASYMM8_KERNELS) || defined(ENABLE_QASYMM8_SIGNED_KERNELS) 145 #define REGISTER_Q8_NEON(func_name) &(func_name) 146 #else /* !defined(ENABLE_QASYMM8_KERNELS) && !defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ 147 #define REGISTER_Q8_NEON(func_name) nullptr 148 #endif /* defined(ENABLE_QASYMM8_KERNELS) || defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ 149 150 #if defined(ENABLE_INTEGER_KERNELS) 151 152 #if defined(ARM_COMPUTE_ENABLE_SVE) 153 #define REGISTER_INTEGER_SVE(func_name) &(func_name) 154 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ 155 #define REGISTER_INTEGER_SVE(func_name) nullptr 156 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ 157 158 #if defined(ARM_COMPUTE_ENABLE_SVE2) 159 #define REGISTER_INTEGER_SVE2(func_name) &(func_name) 160 #else /* !defined(ARM_COMPUTE_ENABLE_SVE2) */ 161 #define REGISTER_INTEGER_SVE2(func_name) nullptr 162 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ 163 164 #if defined(ARM_COMPUTE_ENABLE_NEON) 165 #define REGISTER_INTEGER_NEON(func_name) &(func_name) 166 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */ 167 #define REGISTER_INTEGER_NEON(func_name) nullptr 168 #endif /* defined(ARM_COMPUTE_ENABLE_NEON) */ 169 170 #else /* defined(ENABLE_INTEGER_KERNELS) */ 171 #define REGISTER_INTEGER_NEON(func_name) nullptr 172 #define REGISTER_INTEGER_SVE(func_name) nullptr 173 #define REGISTER_INTEGER_SVE2(func_name) nullptr 174 #endif /* defined(ENABLE_INTEGER_KERNELS) */ 175 176 #if defined(ARM_COMPUTE_ENABLE_BF16) 177 #define REGISTER_BF16_NEON(func_name) &(func_name) 178 #else /* !(defined(ARM_COMPUTE_ENABLE_BF16))*/ 179 #define REGISTER_BF16_NEON(func_name) nullptr 180 #endif /* defined(ARM_COMPUTE_ENABLE_BF16)*/ 181 182 #endif /* SRC_CORE_COMMON_REGISTRARS_H */ 183