1 /*
2 * Copyright (c) 2018-2019 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "SpaceToBatch.h"
25
26 #include "tests/validation/Helpers.h"
27
28 namespace arm_compute
29 {
30 namespace test
31 {
32 namespace validation
33 {
34 namespace reference
35 {
36 // Space to Batch
37 template <typename T>
space_to_batch(const SimpleTensor<T> & src,const SimpleTensor<int32_t> & block_shape,const SimpleTensor<int32_t> & paddings,const TensorShape & dst_shape)38 SimpleTensor<T> space_to_batch(const SimpleTensor<T> &src, const SimpleTensor<int32_t> &block_shape, const SimpleTensor<int32_t> &paddings, const TensorShape &dst_shape)
39 {
40 SimpleTensor<T> result(dst_shape, src.data_type(), 1, src.quantization_info());
41
42 const auto width_out = static_cast<int>(dst_shape[0]);
43 const auto height_out = static_cast<int>(dst_shape[1]);
44 const auto batch_out = static_cast<int>(dst_shape[3]);
45
46 const auto width_in = static_cast<int>(src.shape()[0]);
47 const auto height_in = static_cast<int>(src.shape()[1]);
48 const auto batch_in = static_cast<int>(src.shape()[3]);
49
50 const auto channel = static_cast<int>(src.shape()[2]);
51
52 const auto block_width = block_shape[0];
53 const auto block_height = block_shape[1];
54
55 const auto padding_left = paddings[0];
56 const auto padding_top = paddings[2];
57
58 // Pad value must be logic zero
59 const auto pad_value = is_data_type_quantized(src.data_type()) ? src.quantization_info().uniform().offset : 0;
60
61 int out_pos = 0;
62 for(int outB = 0; outB < batch_out; ++outB)
63 {
64 unsigned int inB = outB % batch_in;
65
66 int shift_w = (outB / batch_in) % block_width;
67 int shift_h = (outB / batch_in) / block_width;
68
69 for(int c = 0; c < channel; ++c)
70 {
71 for(int outH = 0; outH < height_out; ++outH)
72 {
73 for(int outW = 0; outW < width_out; ++outW)
74 {
75 const auto in_pos = ((inB * channel + c) * height_in + ((outH * block_height + shift_h) - padding_top)) * width_in + (outW * block_width + shift_w) - padding_left;
76
77 if(outH * block_height + shift_h < padding_top || outH * block_height + shift_h >= padding_top + height_in || outW * block_width + shift_w < padding_left
78 || outW * block_width + shift_w >= padding_left + width_in)
79 {
80 result[out_pos] = pad_value;
81 }
82 else
83 {
84 result[out_pos] = src[in_pos];
85 }
86 ++out_pos;
87 }
88 }
89 }
90 }
91 return result;
92 }
93
94 template SimpleTensor<float> space_to_batch(const SimpleTensor<float> &src, const SimpleTensor<int32_t> &block_shape, const SimpleTensor<int32_t> &paddings, const TensorShape &dst_shape);
95 template SimpleTensor<half> space_to_batch(const SimpleTensor<half> &src, const SimpleTensor<int32_t> &block_shape, const SimpleTensor<int32_t> &paddings, const TensorShape &dst_shape);
96 template SimpleTensor<uint8_t> space_to_batch(const SimpleTensor<uint8_t> &src, const SimpleTensor<int32_t> &block_shape, const SimpleTensor<int32_t> &paddings, const TensorShape &dst_shape);
97 } // namespace reference
98 } // namespace validation
99 } // namespace test
100 } // namespace arm_compute
101