1 //
2 // Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #pragma once
7
8 #include <tensorflow/lite/builtin_ops.h>
9 #include <tensorflow/lite/c/builtin_op_data.h>
10 #include <tensorflow/lite/c/common.h>
11 #include <tensorflow/lite/minimal_logging.h>
12
13 namespace armnnDelegate
14 {
15
VisitPadOperator(DelegateData & delegateData,TfLiteContext * tfLiteContext,TfLiteNode * tfLiteNode,int nodeIndex,int32_t tfLitePadOperatorCode)16 TfLiteStatus VisitPadOperator(DelegateData& delegateData,
17 TfLiteContext* tfLiteContext,
18 TfLiteNode* tfLiteNode,
19 int nodeIndex,
20 int32_t tfLitePadOperatorCode)
21 {
22 TF_LITE_ENSURE_STATUS(ValidateNumOutputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
23
24 switch(tfLitePadOperatorCode)
25 {
26 case kTfLiteBuiltinMirrorPad:
27 case kTfLiteBuiltinPad:
28 TF_LITE_ENSURE_STATUS(ValidateNumInputs(tfLiteContext, tfLiteNode, 2, nodeIndex));
29 break;
30 case kTfLiteBuiltinPadv2:
31 TF_LITE_ENSURE_STATUS(ValidateNumInputs(tfLiteContext, tfLiteNode, 3, nodeIndex));
32 break;
33 default:
34 return kTfLiteError;
35 }
36
37 const TfLiteTensor* tfLiteTensors = tfLiteContext->tensors;
38 const TfLiteTensor& tfLiteInputTensor = tfLiteTensors[tfLiteNode->inputs->data[0]];
39 const TfLiteTensor& tfLitepaddingTensor = tfLiteTensors[tfLiteNode->inputs->data[1]];
40
41 if (IsDynamicTensor(tfLiteInputTensor))
42 {
43 TF_LITE_MAYBE_KERNEL_LOG(
44 tfLiteContext,
45 "TfLiteArmnnDelegate: Dynamic input tensors are not supported in operator #%d node #%d: ",
46 tfLitePadOperatorCode, nodeIndex);
47 return kTfLiteError;
48 }
49
50 const TfLiteTensor& tfLiteOutputTensor = tfLiteTensors[tfLiteNode->outputs->data[0]];
51 if (IsDynamicTensor(tfLiteOutputTensor))
52 {
53 TF_LITE_MAYBE_KERNEL_LOG(
54 tfLiteContext,
55 "TfLiteArmnnDelegate: Dynamic output tensors are not supported in operator #%d node #%d: ",
56 tfLitePadOperatorCode, nodeIndex);
57 return kTfLiteError;
58 }
59
60 const armnn::TensorInfo& inputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteInputTensor);
61 const armnn::TensorInfo& paddingTensorInfo = GetTensorInfoForTfLiteTensor(tfLitepaddingTensor);
62 const armnn::TensorInfo& outputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteOutputTensor, true);
63
64 // Get the padding data from the input tensor
65 auto* paddingData = tflite::GetTensorData<int32_t>(&tfLitepaddingTensor);
66
67 size_t step = 2;
68 armnn::PadDescriptor descriptor;
69 for (unsigned int i = 0; i < paddingTensorInfo.GetNumElements() / step; ++i)
70 {
71 descriptor.m_PadList.emplace_back(paddingData[i * step], paddingData[i * step + 1]);
72 }
73
74 if (tfLitePadOperatorCode == kTfLiteBuiltinPad && inputTensorInfo.IsQuantized())
75 {
76 descriptor.m_PadValue = inputTensorInfo.GetQuantizationOffset();
77 }
78 else if (tfLitePadOperatorCode == kTfLiteBuiltinPadv2)
79 {
80 const TfLiteTensor& tfLitepaddingValue = tfLiteTensors[tfLiteNode->inputs->data[2]];
81 armnn::TensorInfo paddingValueTensorInfo = GetTensorInfoForTfLiteTensor(tfLitepaddingValue);
82 if (paddingValueTensorInfo.GetNumElements() != 1)
83 {
84 TF_LITE_MAYBE_KERNEL_LOG(
85 tfLiteContext,
86 "TfLiteArmnnDelegate: Multiple padding value are not supported in operator #%d node #%d: ",
87 tfLitePadOperatorCode, nodeIndex);
88 return kTfLiteError;
89 }
90 // Get the padding value from the input tensor
91 switch (tfLitepaddingValue.type)
92 {
93 case kTfLiteFloat32:
94 descriptor.m_PadValue = tflite::GetTensorData<float>(&tfLitepaddingValue)[0];
95 break;
96 case kTfLiteUInt8:
97 descriptor.m_PadValue = tflite::GetTensorData<uint8>(&tfLitepaddingValue)[0];
98 break;
99 case kTfLiteInt8:
100 descriptor.m_PadValue = tflite::GetTensorData<int8>(&tfLitepaddingValue)[0];
101 break;
102 default:
103 TF_LITE_MAYBE_KERNEL_LOG(
104 tfLiteContext,
105 "TfLiteArmnnDelegate: Padding value datatype is not supported in operator #%d node #%d: ",
106 tfLitePadOperatorCode, nodeIndex);
107 return kTfLiteError;
108 }
109 }
110 else if (tfLitePadOperatorCode == kTfLiteBuiltinMirrorPad)
111 {
112 TfLiteMirrorPaddingParams* options = reinterpret_cast<TfLiteMirrorPaddingParams*>(tfLiteNode->builtin_data);
113
114
115 if (options->mode == TfLiteMirrorPaddingMode::kTfLiteMirrorPaddingReflect)
116 {
117 descriptor.m_PaddingMode = armnn::PaddingMode::Reflect;
118 }
119 else if (options->mode == TfLiteMirrorPaddingMode::kTfLiteMirrorPaddingSymmetric)
120 {
121 descriptor.m_PaddingMode = armnn::PaddingMode::Symmetric;
122 }
123 else
124 {
125 TF_LITE_MAYBE_KERNEL_LOG(
126 tfLiteContext,
127 "TfLiteArmnnDelegate: PaddingMode must be either REFLECT or SYMMETRIC in operator #%d node #%d: ",
128 tfLitePadOperatorCode, nodeIndex);
129 }
130
131 // If padding mode is Reflect then both paddings must be no greater than inputShape(i) - 1.
132 // If padding mode is Symmetric then both paddings must be no greater than inputShape(i).
133 auto inputShape = inputTensorInfo.GetShape();
134 auto padList = descriptor.m_PadList;
135
136 const unsigned int isReflect =
137 static_cast<unsigned int>(descriptor.m_PaddingMode == armnn::PaddingMode::Reflect);
138 for(unsigned int i = 0; i < padList.size(); ++i)
139 {
140 if(padList.at(i).first > (inputShape[i] - isReflect) ||
141 padList.at(i).second > (inputShape[i] - isReflect))
142 {
143 TF_LITE_MAYBE_KERNEL_LOG(
144 tfLiteContext,
145 "TfLiteArmnnDelegate: Padding values must be less (Reflect) or "
146 "equal (Symmetric) to the dimension size in operator #%d node #%d: ",
147 tfLitePadOperatorCode, nodeIndex);
148 }
149 }
150 }
151
152 armnn::BackendId setBackend;
153 if (!delegateData.m_Network)
154 {
155 bool isSupported = false;
156 FORWARD_LAYER_SUPPORT_FUNC("PAD",
157 tfLiteContext,
158 IsPadSupported,
159 delegateData.m_Backends,
160 isSupported,
161 setBackend,
162 inputTensorInfo,
163 outputTensorInfo,
164 descriptor);
165
166 return isSupported ? kTfLiteOk : kTfLiteError;
167 }
168
169 armnn::IConnectableLayer* padLayer = delegateData.m_Network->AddPadLayer(descriptor);
170 padLayer->SetBackendId(setBackend);
171 ARMNN_ASSERT(padLayer != nullptr);
172
173 armnn::IOutputSlot& outputSlot = padLayer->GetOutputSlot(0);
174 outputSlot.SetTensorInfo(outputTensorInfo);
175
176 return Connect(padLayer, tfLiteNode, delegateData);
177 }
178
179 } // namespace armnnDelegate
180