1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "RefConvolution3dWorkload.hpp"
7
8 #include "Conv3dImpl.hpp"
9 #include "RefWorkloadUtils.hpp"
10
11 #include "Profiling.hpp"
12
13 namespace armnn
14 {
RefConvolution3dWorkload(const Convolution3dQueueDescriptor & descriptor,const WorkloadInfo & info)15 RefConvolution3dWorkload::RefConvolution3dWorkload(
16 const Convolution3dQueueDescriptor& descriptor, const WorkloadInfo& info)
17 : RefBaseWorkload<Convolution3dQueueDescriptor>(descriptor, info)
18 {
19 WorkloadInfo detailsInfo;
20 detailsInfo.m_InputTensorInfos = info.m_InputTensorInfos;
21 detailsInfo.m_OutputTensorInfos = info.m_OutputTensorInfos;
22 detailsInfo.m_WeightsTensorInfo = armnn::Optional<armnn::TensorInfo>(info.m_InputTensorInfos[1]);
23 if (descriptor.m_Parameters.m_BiasEnabled)
24 {
25 detailsInfo.m_BiasTensorInfo = armnn::Optional<armnn::TensorInfo>(info.m_InputTensorInfos[2]);
26 }
27
28 // Report Profiling Details
29 ARMNN_REPORT_PROFILING_WORKLOAD_DESC("RefConvolution3dWorkload_Construct",
30 descriptor.m_Parameters,
31 detailsInfo,
32 this->GetGuid());
33 }
34
Execute() const35 void RefConvolution3dWorkload::Execute() const
36 {
37 Execute(m_Data.m_Inputs, m_Data.m_Outputs);
38 }
39
ExecuteAsync(ExecutionData & executionData)40 void RefConvolution3dWorkload::ExecuteAsync(ExecutionData& executionData)
41 {
42 WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
43 Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
44 }
45
Execute(std::vector<ITensorHandle * > inputs,std::vector<ITensorHandle * > outputs) const46 void RefConvolution3dWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
47 {
48 ARMNN_SCOPED_PROFILING_EVENT_GUID(Compute::CpuRef, "RefConvolution3dWorkload_Execute", this->GetGuid());
49
50 std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]), inputs[0]->Map());
51 std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]), outputs[0]->Map());
52
53 const TensorShape& inputShape = GetTensorInfo(inputs[0]).GetShape();
54 const TensorShape& outputShape = GetTensorInfo(outputs[0]).GetShape();
55
56 const auto& filterInfo = GetTensorInfo(inputs[1]);
57 std::unique_ptr<Decoder<float>> filterDecoder = MakeDecoder<float>(GetTensorInfo(inputs[1]), inputs[1]->Map());
58 std::unique_ptr<Decoder<float>> biasDecoder;
59
60 if (m_Data.m_Parameters.m_BiasEnabled)
61 {
62 biasDecoder = MakeDecoder<float>(GetTensorInfo(inputs[2]), inputs[2]->Map());
63 }
64
65 Convolve3d(inputShape, *inputDecoder, outputShape, *outputEncoder, filterInfo.GetShape(),
66 *filterDecoder, m_Data.m_Parameters.m_BiasEnabled, biasDecoder.get(),
67 m_Data.m_Parameters.m_DataLayout,
68 m_Data.m_Parameters.m_PadTop, m_Data.m_Parameters.m_PadLeft, m_Data.m_Parameters.m_PadFront,
69 m_Data.m_Parameters.m_StrideX, m_Data.m_Parameters.m_StrideY, m_Data.m_Parameters.m_StrideZ,
70 m_Data.m_Parameters.m_DilationX, m_Data.m_Parameters.m_DilationY, m_Data.m_Parameters.m_DilationZ);
71 }
72
73 } //namespace armnn
74