1 /* Copyright (c) 2022, Robert Nagy <[email protected]>
2 *
3 * Permission to use, copy, modify, and/or distribute this software for any
4 * purpose with or without fee is hereby granted, provided that the above
5 * copyright notice and this permission notice appear in all copies.
6 *
7 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
8 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
10 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
11 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
12 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
13 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
14
15 #include <openssl/cpu.h>
16
17 #if defined(OPENSSL_AARCH64) && defined(OPENSSL_OPENBSD) && \
18 !defined(OPENSSL_STATIC_ARMCAP)
19
20 #include <sys/sysctl.h>
21 #include <machine/cpu.h>
22 #include <machine/armreg.h>
23
24 #include <openssl/arm_arch.h>
25
26 #include "internal.h"
27
28
OPENSSL_cpuid_setup(void)29 void OPENSSL_cpuid_setup(void) {
30 int isar0_mib[] = { CTL_MACHDEP, CPU_ID_AA64ISAR0 };
31 uint64_t cpu_id = 0;
32 size_t len = sizeof(cpu_id);
33
34 if (sysctl(isar0_mib, 2, &cpu_id, &len, NULL, 0) < 0) {
35 return;
36 }
37
38 OPENSSL_armcap_P |= ARMV7_NEON;
39
40 if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_BASE) {
41 OPENSSL_armcap_P |= ARMV8_AES;
42 }
43
44 if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_PMULL) {
45 OPENSSL_armcap_P |= ARMV8_PMULL;
46 }
47
48 if (ID_AA64ISAR0_SHA1(cpu_id) >= ID_AA64ISAR0_SHA1_BASE) {
49 OPENSSL_armcap_P |= ARMV8_SHA1;
50 }
51
52 if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_BASE) {
53 OPENSSL_armcap_P |= ARMV8_SHA256;
54 }
55
56 if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_512) {
57 OPENSSL_armcap_P |= ARMV8_SHA512;
58 }
59 }
60
61 #endif // OPENSSL_AARCH64 && OPENSSL_OPENBSD && !OPENSSL_STATIC_ARMCAP
62