1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3 #include <commonlib/helpers.h> 4 #include <spi_flash.h> 5 #include <spi-generic.h> 6 7 #include "spi_flash_internal.h" 8 9 /* GD25Pxx-specific commands */ 10 #define CMD_GD25_WREN 0x06 /* Write Enable */ 11 #define CMD_GD25_WRDI 0x04 /* Write Disable */ 12 #define CMD_GD25_RDSR 0x05 /* Read Status Register */ 13 #define CMD_GD25_WRSR 0x01 /* Write Status Register */ 14 #define CMD_GD25_READ 0x03 /* Read Data Bytes */ 15 #define CMD_GD25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ 16 #define CMD_GD25_PP 0x02 /* Page Program */ 17 #define CMD_GD25_SE 0x20 /* Sector (4K) Erase */ 18 #define CMD_GD25_BE 0xd8 /* Block (64K) Erase */ 19 #define CMD_GD25_CE 0xc7 /* Chip Erase */ 20 #define CMD_GD25_DP 0xb9 /* Deep Power-down */ 21 #define CMD_GD25_RES 0xab /* Release from DP, and Read Signature */ 22 23 static const struct spi_flash_part_id flash_table[] = { 24 { 25 /* GD25T80 */ 26 .id[0] = 0x3114, 27 .nr_sectors_shift = 8, 28 }, 29 { 30 /* GD25Q80 */ 31 .id[0] = 0x4014, 32 .nr_sectors_shift = 8, 33 .fast_read_dual_output_support = 1, 34 .fast_read_dual_io_support = 1, 35 }, /* also GD25Q80B */ 36 { 37 /* GD25Q16 */ 38 .id[0] = 0x4015, 39 .nr_sectors_shift = 9, 40 .fast_read_dual_output_support = 1, 41 .fast_read_dual_io_support = 1, 42 }, /* also GD25Q16B */ 43 { 44 /* GD25Q32B */ 45 .id[0] = 0x4016, 46 .nr_sectors_shift = 10, 47 .fast_read_dual_output_support = 1, 48 .fast_read_dual_io_support = 1, 49 }, /* also GD25Q32B */ 50 { 51 /* GD25Q64 */ 52 .id[0] = 0x4017, 53 .nr_sectors_shift = 11, 54 .fast_read_dual_output_support = 1, 55 .fast_read_dual_io_support = 1, 56 }, /* also GD25Q64B, GD25B64C */ 57 { 58 /* GD25Q128 */ 59 .id[0] = 0x4018, 60 .nr_sectors_shift = 12, 61 .fast_read_dual_output_support = 1, 62 .fast_read_dual_io_support = 1, 63 }, /* also GD25Q128B */ 64 { 65 /* GD25VQ80C */ 66 .id[0] = 0x4214, 67 .nr_sectors_shift = 8, 68 .fast_read_dual_output_support = 1, 69 .fast_read_dual_io_support = 1, 70 }, 71 { 72 /* GD25VQ16C */ 73 .id[0] = 0x4215, 74 .nr_sectors_shift = 9, 75 .fast_read_dual_output_support = 1, 76 .fast_read_dual_io_support = 1, 77 }, 78 { 79 /* GD25LQ80 */ 80 .id[0] = 0x6014, 81 .nr_sectors_shift = 8, 82 .fast_read_dual_output_support = 1, 83 .fast_read_dual_io_support = 1, 84 }, 85 { 86 /* GD25LQ16 */ 87 .id[0] = 0x6015, 88 .nr_sectors_shift = 9, 89 .fast_read_dual_output_support = 1, 90 .fast_read_dual_io_support = 1, 91 }, 92 { 93 /* GD25LQ32 */ 94 .id[0] = 0x6016, 95 .nr_sectors_shift = 10, 96 .fast_read_dual_output_support = 1, 97 .fast_read_dual_io_support = 1, 98 }, 99 { 100 /* GD25LQ64C */ 101 .id[0] = 0x6017, 102 .nr_sectors_shift = 11, 103 .fast_read_dual_output_support = 1, 104 .fast_read_dual_io_support = 1, 105 }, /* also GD25LB64C */ 106 { 107 /* GD25LQ128 */ 108 .id[0] = 0x6018, 109 .nr_sectors_shift = 12, 110 .fast_read_dual_output_support = 1, 111 .fast_read_dual_io_support = 1, 112 }, 113 { 114 /* GD25LQ255E */ 115 .id[0] = 0x6019, 116 .nr_sectors_shift = 13, 117 .fast_read_dual_output_support = 1, 118 .fast_read_dual_io_support = 1, 119 }, 120 { 121 /* GD25LR256E */ 122 .id[0] = 0x6719, 123 .nr_sectors_shift = 13, 124 .fast_read_dual_output_support = 1, 125 .fast_read_dual_io_support = 1, 126 }, 127 { 128 /* GD25LR512ME - 64MiB */ 129 .id[0] = 0x671A, 130 .nr_sectors_shift = 14, 131 .fast_read_dual_output_support = 1, 132 .fast_read_dual_io_support = 1, 133 }, 134 }; 135 136 const struct spi_flash_vendor_info spi_flash_gigadevice_vi = { 137 .id = VENDOR_ID_GIGADEVICE, 138 .page_size_shift = 8, 139 .sector_size_kib_shift = 2, 140 .match_id_mask[0] = 0xffff, 141 .ids = flash_table, 142 .nr_part_ids = ARRAY_SIZE(flash_table), 143 .desc = &spi_flash_pp_0x20_sector_desc, 144 }; 145