xref: /aosp_15_r20/external/coreboot/src/drivers/spi/stmicro.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <commonlib/helpers.h>
4 #include <spi_flash.h>
5 #include <spi-generic.h>
6 
7 #include "spi_flash_internal.h"
8 
9 /* M25Pxx-specific commands */
10 #define CMD_M25PXX_WREN		0x06	/* Write Enable */
11 #define CMD_M25PXX_WRDI		0x04	/* Write Disable */
12 #define CMD_M25PXX_RDSR		0x05	/* Read Status Register */
13 #define CMD_M25PXX_WRSR		0x01	/* Write Status Register */
14 #define CMD_M25PXX_READ		0x03	/* Read Data Bytes */
15 #define CMD_M25PXX_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
16 #define CMD_M25PXX_PP		0x02	/* Page Program */
17 #define CMD_M25PXX_SSE		0x20	/* Subsector Erase */
18 #define CMD_M25PXX_SE		0xd8	/* Sector Erase */
19 #define CMD_M25PXX_BE		0xc7	/* Bulk Erase */
20 #define CMD_M25PXX_DP		0xb9	/* Deep Power-down */
21 #define CMD_M25PXX_RES		0xab	/* Release from DP, and Read Signature */
22 
23 /*
24  * Device ID = (memory_type << 8) + memory_capacity
25  */
26 #define STM_ID_M25P10		0x2011
27 #define STM_ID_M25P20		0x2012
28 #define STM_ID_M25P40		0x2013
29 #define STM_ID_M25P80		0x2014
30 #define STM_ID_M25P16		0x2015
31 #define STM_ID_M25P32		0x2016
32 #define STM_ID_M25P64		0x2017
33 #define STM_ID_M25P128		0x2018
34 #define STM_ID_M25PX80		0x7114
35 #define STM_ID_M25PX16		0x7115
36 #define STM_ID_M25PX32		0x7116
37 #define STM_ID_M25PX64		0x7117
38 #define STM_ID_M25PE80		0x8014
39 #define STM_ID_M25PE16		0x8015
40 #define STM_ID_M25PE32		0x8016
41 #define STM_ID_M25PE64		0x8017
42 #define STM_ID_N25Q016__3E	0xba15
43 #define STM_ID_N25Q032__3E	0xba16
44 #define STM_ID_N25Q064__3E	0xba17
45 #define STM_ID_N25Q128__3E	0xba18
46 #define STM_ID_N25Q256__3E	0xba19
47 #define STM_ID_N25Q016__1E	0xbb15
48 #define STM_ID_N25Q032__1E	0xbb16
49 #define STM_ID_N25Q064__1E	0xbb17
50 #define STM_ID_N25Q128__1E	0xbb18
51 #define STM_ID_N25Q256__1E	0xbb19
52 
53 static const struct spi_flash_part_id flash_table_se32k[] = {
54 	{
55 		/* M25P10 */
56 		.id[0] = STM_ID_M25P10,
57 		.nr_sectors_shift = 2,
58 	},
59 };
60 
61 static const struct spi_flash_part_id flash_table_se64k[] = {
62 	{
63 		/* M25P16 */
64 		.id[0] = STM_ID_M25P16,
65 		.nr_sectors_shift = 5,
66 	},
67 	{
68 		/* M25P20 */
69 		.id[0] = STM_ID_M25P20,
70 		.nr_sectors_shift = 2,
71 	},
72 	{
73 		/* M25P32 */
74 		.id[0] = STM_ID_M25P32,
75 		.nr_sectors_shift = 6,
76 	},
77 	{
78 		/* M25P40 */
79 		.id[0] = STM_ID_M25P40,
80 		.nr_sectors_shift = 3,
81 	},
82 	{
83 		/* M25P64 */
84 		.id[0] = STM_ID_M25P64,
85 		.nr_sectors_shift = 7,
86 	},
87 	{
88 		/* M25P80 */
89 		.id[0] = STM_ID_M25P80,
90 		.nr_sectors_shift = 4,
91 	},
92 	{
93 		/* M25PX80 */
94 		.id[0] = STM_ID_M25PX80,
95 		.nr_sectors_shift = 4,
96 	},
97 	{
98 		/* M25PX16 */
99 		.id[0] = STM_ID_M25PX16,
100 		.nr_sectors_shift = 5,
101 	},
102 	{
103 		/* M25PX32 */
104 		.id[0] = STM_ID_M25PX32,
105 		.nr_sectors_shift = 6,
106 	},
107 	{
108 		/* M25PX64 */
109 		.id[0] = STM_ID_M25PX64,
110 		.nr_sectors_shift = 7,
111 	},
112 	{
113 		/* M25PE80 */
114 		.id[0] = STM_ID_M25PE80,
115 		.nr_sectors_shift = 4,
116 	},
117 	{
118 		/* M25PE16 */
119 		.id[0] = STM_ID_M25PE16,
120 		.nr_sectors_shift = 5,
121 	},
122 	{
123 		/* M25PE32 */
124 		.id[0] = STM_ID_M25PE32,
125 		.nr_sectors_shift = 6,
126 	},
127 	{
128 		/* M25PE64 */
129 		.id[0] = STM_ID_M25PE64,
130 		.nr_sectors_shift = 7,
131 	},
132 };
133 
134 static const struct spi_flash_part_id flash_table_se256k[] = {
135 	{
136 		/* M25P128 */
137 		.id[0] = STM_ID_M25P128,
138 		.nr_sectors_shift = 6,
139 	},
140 };
141 
142 static const struct spi_flash_part_id flash_table_sse[] = {
143 	{
144 		/* N25Q016..3E */
145 		.id[0] = STM_ID_N25Q016__3E,
146 		.nr_sectors_shift = 9,
147 	},
148 	{
149 		/* N25Q032..3E */
150 		.id[0] = STM_ID_N25Q032__3E,
151 		.nr_sectors_shift = 10,
152 	},
153 	{
154 		/* N25Q064..3E */
155 		.id[0] = STM_ID_N25Q064__3E,
156 		.nr_sectors_shift = 11,
157 	},
158 	{
159 		/* N25Q128..3E */
160 		.id[0] = STM_ID_N25Q128__3E,
161 		.nr_sectors_shift = 12,
162 	},
163 	{
164 		/* N25Q256..3E */
165 		.id[0] = STM_ID_N25Q256__3E,
166 		.nr_sectors_shift = 13,
167 	},
168 	{
169 		/* N25Q016..1E */
170 		.id[0] = STM_ID_N25Q016__1E,
171 		.nr_sectors_shift = 9,
172 	},
173 	{
174 		/* N25Q032..1E */
175 		.id[0] = STM_ID_N25Q032__1E,
176 		.nr_sectors_shift = 10,
177 	},
178 	{
179 		/* N25Q064..1E */
180 		.id[0] = STM_ID_N25Q064__1E,
181 		.nr_sectors_shift = 11,
182 	},
183 	{
184 		/* N25Q128..1E */
185 		.id[0] = STM_ID_N25Q128__1E,
186 		.nr_sectors_shift = 12,
187 	},
188 	{
189 		/* N25Q256..1E */
190 		.id[0] = STM_ID_N25Q256__1E,
191 		.nr_sectors_shift = 13,
192 	},
193 };
194 
stmicro_release_deep_sleep_identify(const struct spi_slave * spi,u8 * idcode)195 int stmicro_release_deep_sleep_identify(const struct spi_slave *spi, u8 *idcode)
196 {
197 	if (spi_flash_cmd(spi, CMD_M25PXX_RES, idcode, 4))
198 		return -1;
199 
200 	/* Assuming ST parts identify with 0x1X to release from deep
201 	   power down and read electronic signature. */
202 	if ((idcode[3] & 0xf0) != 0x10)
203 		return -1;
204 
205 	/* Fix up the idcode to mimic rdid jedec instruction. */
206 	idcode[0] = 0x20;
207 	idcode[1] = 0x20;
208 	idcode[2] = idcode[3] + 1;
209 
210 	return 0;
211 }
212 
213 const struct spi_flash_vendor_info spi_flash_stmicro1_vi = {
214 	.id = VENDOR_ID_STMICRO,
215 	.page_size_shift = 8,
216 	.sector_size_kib_shift = 5,
217 	.match_id_mask[0] = 0xffff,
218 	.ids = flash_table_se32k,
219 	.nr_part_ids = ARRAY_SIZE(flash_table_se32k),
220 	.desc = &spi_flash_pp_0xd8_sector_desc,
221 };
222 
223 const struct spi_flash_vendor_info spi_flash_stmicro2_vi = {
224 	.id = VENDOR_ID_STMICRO,
225 	.page_size_shift = 8,
226 	.sector_size_kib_shift = 6,
227 	.match_id_mask[0] = 0xffff,
228 	.ids = flash_table_se64k,
229 	.nr_part_ids = ARRAY_SIZE(flash_table_se64k),
230 	.desc = &spi_flash_pp_0xd8_sector_desc,
231 };
232 
233 const struct spi_flash_vendor_info spi_flash_stmicro3_vi = {
234 	.id = VENDOR_ID_STMICRO,
235 	.page_size_shift = 8,
236 	.sector_size_kib_shift = 8,
237 	.match_id_mask[0] = 0xffff,
238 	.ids = flash_table_se256k,
239 	.nr_part_ids = ARRAY_SIZE(flash_table_se256k),
240 	.desc = &spi_flash_pp_0xd8_sector_desc,
241 };
242 
243 const struct spi_flash_vendor_info spi_flash_stmicro4_vi = {
244 	.id = VENDOR_ID_STMICRO,
245 	.page_size_shift = 8,
246 	.sector_size_kib_shift = 2,
247 	.match_id_mask[0] = 0xffff,
248 	.ids = flash_table_sse,
249 	.nr_part_ids = ARRAY_SIZE(flash_table_sse),
250 	.desc = &spi_flash_pp_0x20_sector_desc,
251 };
252