1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 /*
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <[email protected]>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17 #ifndef PCI_H
18 #define PCI_H
19
20 #if CONFIG(PCI)
21
22 /* When <device/pci.h> is needed, it supposed to provide <device/pci_{def,type}.h> */
23 #include <device/device.h>
24 #include <device/pci_def.h> /* IWYU pragma: export */
25 #include <device/pci_ops.h>
26 #include <device/pci_rom.h>
27 #include <device/pci_type.h> /* IWYU pragma: export */
28 #include <stddef.h>
29 #include <stdint.h>
30
31 /* Common pci operations without a standard interface */
32 struct pci_operations {
33 /* set the Subsystem IDs for the PCI device */
34 void (*set_subsystem)(struct device *dev, unsigned int vendor,
35 unsigned int device);
36 void (*get_ltr_max_latencies)(u16 *max_snoop, u16 *max_nosnoop);
37 };
38
39 struct pci_driver {
40 const struct device_operations *ops;
41 unsigned short vendor;
42 unsigned short device;
43 const unsigned short *devices;
44 };
45
46 struct msix_entry {
47 union {
48 struct {
49 u32 lower_addr;
50 u32 upper_addr;
51 };
52 struct {
53 u64 addr;
54 };
55 };
56 u32 data;
57 u32 vec_control;
58 };
59
60 #if ENV_RAMSTAGE
61 #define __pci_driver __attribute__((used, __section__(".rodata.pci_driver")))
62 #else
63 #define __pci_driver __attribute__((unused))
64 #endif
65
66 /** start of compile time generated pci driver array */
67 extern struct pci_driver _pci_drivers[];
68 /** end of compile time generated pci driver array */
69 extern struct pci_driver _epci_drivers[];
70
71 /* Set Subsystem ID operation for PCI devices */
72 extern struct pci_operations pci_dev_ops_pci;
73 extern struct device_operations default_pci_ops_dev;
74 extern struct device_operations default_pci_ops_bus;
75
76 void pci_dev_read_resources(struct device *dev);
77 void pci_bus_read_resources(struct device *dev);
78 void pci_dev_set_resources(struct device *dev);
79 void pci_dev_enable_resources(struct device *dev);
80 void pci_bus_enable_resources(struct device *dev);
81 void pci_bus_reset(struct bus *bus);
82 struct device *pci_probe_dev(struct device *dev, struct bus *bus,
83 unsigned int devfn);
84 void do_pci_scan_bridge(struct device *dev,
85 void (*do_scan_bus)(struct bus *bus,
86 unsigned int min_devfn, unsigned int max_devfn));
87
88 void pci_scan_bridge(struct device *bus);
89 void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
90 unsigned int max_devfn);
91
92 uint8_t pci_moving_config8(struct device *dev, unsigned int reg);
93 uint16_t pci_moving_config16(struct device *dev, unsigned int reg);
94 uint32_t pci_moving_config32(struct device *dev, unsigned int reg);
95 struct resource *pci_get_resource(struct device *dev, unsigned long index);
96 void pci_dev_set_subsystem(struct device *dev, unsigned int vendor,
97 unsigned int device);
98 void pci_dev_init(struct device *dev);
99 unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev);
100 uint16_t pci_find_cap_recursive(const struct device *dev, uint16_t cap);
101
102 const char *pin_to_str(int pin);
103 int get_pci_irq_pins(struct device *dev, struct device **parent_bdg);
104 void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4]);
105 const char *get_pci_class_name(struct device *dev);
106 const char *get_pci_subclass_name(struct device *dev);
107
108 size_t pci_msix_table_size(struct device *dev);
109 int pci_msix_table_bar(struct device *dev, u32 *offset, u8 *idx);
110 struct msix_entry *pci_msix_get_table(struct device *dev);
111
112 #define PCI_IO_BRIDGE_ALIGN 4096
113 #define PCI_MEM_BRIDGE_ALIGN (1024*1024)
114
115 #define PCI_ID(VENDOR_ID, DEVICE_ID) \
116 ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
117
118 pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev);
119 pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id, unsigned int bus);
120
121 void pci_s_assert_secondary_reset(pci_devfn_t p2p_bridge);
122 void pci_s_deassert_secondary_reset(pci_devfn_t p2p_bridge);
123 void pci_s_bridge_set_secondary(pci_devfn_t p2p_bridge, u8 secondary);
124
125 int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);
126
pci_base_address_is_memory_space(unsigned int attr)127 static inline int pci_base_address_is_memory_space(unsigned int attr)
128 {
129 return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
130 }
131
132 void pci_dev_disable_bus_master(const struct device *dev);
133
134 static __always_inline
135 #if ENV_PCI_SIMPLE_DEVICE
pci_dev_request_bus_master(pci_devfn_t dev)136 void pci_dev_request_bus_master(pci_devfn_t dev)
137 #else
138 void pci_dev_request_bus_master(struct device *dev)
139 #endif /* ENV_PCI_SIMPLE_DEVICE */
140 {
141 if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE))
142 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
143 }
144
145 #endif /* CONFIG_PCI */
146
147 void pci_early_bridge_init(void);
148
149 #endif /* PCI_H */
150