1# layout for firmware residing at top of 4GB address space 2# +-------------+ <-- 4GB - ROM_SIZE / start of flash 3# | unspecified | 4# +-------------+ <-- 4GB - BIOS_SIZE 5# | FMAP | 6# +-------------+ <-- 4GB - BIOS_SIZE + FMAP_SIZE 7# | CBFS | 8# +-------------+ <-- 4GB / end of flash 9 10FLASH@##ROM_BASE## ##ROM_SIZE## { 11 BIOS@##BIOS_BASE## ##BIOS_SIZE## { 12 ##CONSOLE_ENTRY## 13 ##MRC_CACHE_ENTRY## 14 ##SMMSTORE_ENTRY## 15 ##SPD_CACHE_ENTRY## 16 ##VPD_ENTRY## 17 ##HSPHY_FW_ENTRY## 18 FMAP@##FMAP_BASE## ##FMAP_SIZE## 19 COREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE## 20 } 21} 22