1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <stdio.h>
4 #include <commonlib/bsd/helpers.h>
5 #include "me.h"
6
7 /* HFS1[3:0] Current Working State Values */
8 static const char *me_cws_values[] = {
9 [ME_HFS_CWS_RESET] = "Reset",
10 [ME_HFS_CWS_INIT] = "Initializing",
11 [ME_HFS_CWS_REC] = "Recovery",
12 [ME_HFS_CWS_TEST] = "Test",
13 [ME_HFS_CWS_DISABLED] = "Disabled",
14 [ME_HFS_CWS_NORMAL] = "Normal",
15 [ME_HFS_CWS_WAIT] = "Platform Disable Wait",
16 [ME_HFS_CWS_TRANS] = "OP State Transition",
17 [ME_HFS_CWS_INVALID] = "Invalid CPU Plugged In"
18 };
19
20 /* HFS1[8:6] Current Operation State Values */
21 static const char *me_opstate_values[] = {
22 [ME_HFS_STATE_PREBOOT] = "Preboot",
23 [ME_HFS_STATE_M0_UMA] = "M0 with UMA",
24 [ME_HFS_STATE_M3] = "M3 without UMA",
25 [ME_HFS_STATE_M0] = "M0 without UMA",
26 [ME_HFS_STATE_BRINGUP] = "Bring up",
27 [ME_HFS_STATE_ERROR] = "M0 without UMA but with error"
28 };
29
30 /* HFS[19:16] Current Operation Mode Values */
31 static const char *me_opmode_values[] = {
32 [ME_HFS_MODE_NORMAL] = "Normal",
33 [ME_HFS_MODE_DEBUG] = "Debug",
34 [ME_HFS_MODE_DIS] = "Soft Temporary Disable",
35 [ME_HFS_MODE_OVER_JMPR] = "Security Override via Jumper",
36 [ME_HFS_MODE_OVER_MEI] = "Security Override via MEI Message"
37 };
38
39 /* HFS[15:12] Error Code Values */
40 static const char *me_error_values[] = {
41 [ME_HFS_ERROR_NONE] = "No Error",
42 [ME_HFS_ERROR_UNCAT] = "Uncategorized Failure",
43 [ME_HFS_ERROR_DISABLED] = "Disabled",
44 [ME_HFS_ERROR_IMAGE] = "Image Failure",
45 [ME_HFS_ERROR_DEBUG] = "Debug Failure"
46 };
47
48 /* GMES[31:28] ME Progress Code */
49 static const char *me_progress_values[] = {
50 [ME_GMES_PHASE_ROM] = "ROM Phase",
51 [ME_GMES_PHASE_BUP] = "BUP Phase",
52 [ME_GMES_PHASE_UKERNEL] = "uKernel Phase",
53 [ME_GMES_PHASE_POLICY] = "Policy Module",
54 [ME_GMES_PHASE_MODULE] = "Module Loading",
55 [ME_GMES_PHASE_UNKNOWN] = "Unknown",
56 [ME_GMES_PHASE_HOST] = "Host Communication"
57 };
58
59 /* GMES[27:24] Power Management Event */
60 static const char *me_pmevent_values[] = {
61 [0x00] = "Clean Moff->Mx wake",
62 [0x01] = "Moff->Mx wake after an error",
63 [0x02] = "Clean global reset",
64 [0x03] = "Global reset after an error",
65 [0x04] = "Clean Intel ME reset",
66 [0x05] = "Intel ME reset due to exception",
67 [0x06] = "Pseudo-global reset",
68 [0x07] = "S0/M0->Sx/M3",
69 [0x08] = "Sx/M3->S0/M0",
70 [0x09] = "Non-power cycle reset",
71 [0x0a] = "Power cycle reset through M3",
72 [0x0b] = "Power cycle reset through Moff",
73 [0x0c] = "Sx/Mx->Sx/Moff"
74 };
75
76 /* Progress Code 0 states */
77 static const char *me_progress_rom_values[] = {
78 [0x00] = "BEGIN",
79 [0x06] = "DISABLE"
80 };
81
82 /* Progress Code 1 states */
83 static const char *me_progress_bup_values[] = {
84 [0x00] = "Initialization starts",
85 [0x01] = "Disable the host wake event",
86 [0x04] = "Flow determination start process",
87 [0x08] = "Error reading/matching the VSCC table in the descriptor",
88 [0x0a] = "Check to see if straps say ME DISABLED",
89 [0x0b] = "Timeout waiting for PWROK",
90 [0x0d] = "Possibly handle BUP manufacturing override strap",
91 [0x11] = "Bringup in M3",
92 [0x12] = "Bringup in M0",
93 [0x13] = "Flow detection error",
94 [0x15] = "M3 clock switching error",
95 [0x18] = "M3 kernel load",
96 [0x1c] = "T34 missing - cannot program ICC",
97 [0x1f] = "Waiting for DID BIOS message",
98 [0x20] = "Waiting for DID BIOS message failure",
99 [0x21] = "DID reported an error",
100 [0x22] = "Enabling UMA",
101 [0x23] = "Enabling UMA error",
102 [0x24] = "Sending DID Ack to BIOS",
103 [0x25] = "Sending DID Ack to BIOS error",
104 [0x26] = "Switching clocks in M0",
105 [0x27] = "Switching clocks in M0 error",
106 [0x28] = "ME in temp disable",
107 [0x32] = "M0 kernel load",
108 };
109
110 /* Progress Code 3 states */
111 static const char *me_progress_policy_values[] = {
112 [0x00] = "Entery into Policy Module",
113 [0x03] = "Received S3 entry",
114 [0x04] = "Received S4 entry",
115 [0x05] = "Received S5 entry",
116 [0x06] = "Received UPD entry",
117 [0x07] = "Received PCR entry",
118 [0x08] = "Received NPCR entry",
119 [0x09] = "Received host wake",
120 [0x0a] = "Received AC<>DC switch",
121 [0x0b] = "Received DRAM Init Done",
122 [0x0c] = "VSCC Data not found for flash device",
123 [0x0d] = "VSCC Table is not valid",
124 [0x0e] = "Flash Partition Boundary is outside address space",
125 [0x0f] = "ME cannot access the chipset descriptor region",
126 [0x10] = "Required VSCC values for flash parts do not match",
127 };
128
intel_me_status(uint32_t hfs,uint32_t gmes)129 void intel_me_status(uint32_t hfs, uint32_t gmes)
130 {
131 /* Check Current States */
132 printf("ME: FW Partition Table : %s\n",
133 ((hfs & 0x20) >> 5) ? "BAD" : "OK");
134 printf("ME: Bringup Loader Failure : %s\n",
135 ((hfs & 0x400) >> 10) ? "YES" : "NO");
136 printf("ME: Firmware Init Complete : %s\n",
137 ((hfs & 0x200) >> 9) ? "YES" : "NO");
138 printf("ME: Manufacturing Mode : %s\n",
139 ((hfs & 0x10) >> 4) ? "YES" : "NO");
140 printf("ME: Boot Options Present : %s\n",
141 ((hfs & 0x1000000) >> 24) ? "YES" : "NO");
142 printf("ME: Update In Progress : %s\n",
143 ((hfs & 0x800) >> 11) ? "YES" : "NO");
144 printf("ME: Current Working State : %s\n",
145 me_cws_values[hfs & 0xf]);
146 printf("ME: Current Operation State : %s\n",
147 me_opstate_values[(hfs & 0x1c0) >> 6]);
148 printf("ME: Current Operation Mode : %s\n",
149 me_opmode_values[(hfs & 0xf0000) >> 16]);
150 printf("ME: Error Code : %s\n",
151 me_error_values[(hfs & 0xf000) >> 12]);
152 printf("ME: Progress Phase : %s\n",
153 me_progress_values[(gmes & 0xf0000000) >> 28]);
154 printf("ME: Power Management Event : %s\n",
155 me_pmevent_values[(gmes & 0xf000000) >> 24]);
156
157 printf("ME: Progress Phase State : ");
158 switch ((gmes & 0xf0000000) >> 28) {
159 case ME_GMES_PHASE_ROM: /* ROM Phase */
160 printf("%s", me_progress_rom_values[(gmes & 0xff0000) >> 16]);
161 break;
162
163 case ME_GMES_PHASE_BUP: /* Bringup Phase */
164 if ((gmes & 0xff0000) >> 16 < ARRAY_SIZE(me_progress_bup_values)
165 && me_progress_bup_values[(gmes & 0xff0000) >> 16])
166 printf("%s",
167 me_progress_bup_values[(gmes & 0xff0000) >> 16]);
168 else
169 printf("0x%02x", (gmes & 0xff0000) >> 16);
170 break;
171
172 case ME_GMES_PHASE_POLICY: /* Policy Module Phase */
173 if ((gmes & 0xff0000) >> 16 < ARRAY_SIZE(me_progress_policy_values)
174 && me_progress_policy_values[(gmes & 0xff0000) >> 16])
175 printf("%s",
176 me_progress_policy_values[(gmes & 0xff0000) >> 16]);
177 else
178 printf("0x%02x", (gmes & 0xff0000) >> 16);
179 break;
180
181 case ME_GMES_PHASE_HOST: /* Host Communication Phase */
182 if (!((gmes & 0xff0000) >> 16))
183 printf("Host communication established");
184 else
185 printf("0x%02x", (gmes & 0xff0000) >> 16);
186 break;
187
188 default:
189 printf("Unknown 0x%02x", (gmes & 0xff0000) >> 16);
190 }
191 printf("\n");
192 }
193