1 /* inteltool - dump all registers on an Intel CPU + chipset based system */
2 /* SPDX-License-Identifier: GPL-2.0-only */
3
4 #include <stddef.h>
5 #include <stdio.h>
6 #include <stdlib.h>
7 #include "inteltool.h"
8
9 #define AMB_CONFIG_SPACE_SIZE 0x20000
10
11 #define AMB_ADDR(fn, reg) (((fn & 7) << 8) | ((reg & 0xff)))
12
amb_read_config32(volatile void * base,int fn,int reg)13 static uint32_t amb_read_config32(volatile void *base, int fn, int reg)
14 {
15 return read32(base + AMB_ADDR(fn, reg));
16 }
17
amb_printreg32(volatile void * base,int fn,int reg,const char * name,int printzero)18 static void amb_printreg32(volatile void *base, int fn, int reg,
19 const char *name, int printzero)
20 {
21 uint32_t val = amb_read_config32(base, fn, reg);
22 if (!val && !printzero)
23 return;
24 printf("%d:%2.2x %-16.16s: 0x%08x\n", fn, reg, name, val);
25 }
26
amb_read_config16(volatile void * base,int fn,int reg)27 static uint16_t amb_read_config16(volatile void *base, int fn, int reg)
28 {
29 return read16(base + AMB_ADDR(fn, reg));
30 }
31
amb_printreg16(volatile void * base,int fn,int reg,const char * name,int printzero)32 static void amb_printreg16(volatile void *base, int fn, int reg,
33 const char *name, int printzero)
34 {
35 uint16_t val = amb_read_config16(base, fn, reg);
36 if (!val && !printzero)
37 return;
38 printf("%d:%2.2x %-16.16s: 0x%04x\n", fn, reg, name, val);
39
40 }
41
amb_read_config8(volatile void * base,int fn,int reg)42 static uint8_t amb_read_config8(volatile void *base, int fn, int reg)
43 {
44 return read8(base + AMB_ADDR(fn, reg));
45 }
46
amb_printreg8(volatile void * base,int fn,int reg,const char * name,int printzero)47 static void amb_printreg8(volatile void *base, int fn, int reg,
48 const char *name, int printzero)
49 {
50 uint8_t val = amb_read_config8(base, fn, reg);
51 if (!val && !printzero)
52 return;
53 printf("%d:%2.2x %-16.16s: 0x%02x\n", fn, reg, name, val);
54
55 }
56
amb_printreg24(volatile void * base,int fn,int reg,const char * name,int printzero)57 static void amb_printreg24(volatile void *base, int fn, int reg,
58 const char *name, int printzero)
59 {
60 uint32_t val;
61
62 if (reg & 1) {
63 val = amb_read_config8(base, fn, reg) |
64 (amb_read_config16(base, fn, reg + 1) << 8);
65 } else {
66 val = amb_read_config16(base, fn, reg) |
67 (amb_read_config8(base, fn, reg + 2) << 16);
68 }
69
70 if (!val && !printzero)
71 return;
72
73 printf("%d:%2.2x %-16.16s: 0x%06x\n", fn, reg, name, val);
74 }
75
76
77 struct amb_register {
78 int fn;
79 int offset;
80 const char *name;
81 void (*printfunc)(volatile void *, int, int, const char *, int);
82 int width;
83 } amb_registers[] = {
84 { 0, 0x00, "VID", NULL, 2 },
85 { 0, 0x02, "DID", NULL, 2 },
86 { 0, 0x08, "RID", NULL, 1 },
87 { 0, 0x09, "CCR", NULL, 3 },
88 { 0, 0x0e, "HDR", NULL, 1 },
89 { 1, 0x40, "FBDS0", NULL, 1 },
90 { 1, 0x41, "FBDS1", NULL, 1 },
91 { 1, 0x42, "FBDS2", NULL, 1 },
92 { 1, 0x43, "FBDS3", NULL, 1 },
93 { 1, 0x50, "FBDSBCFGCUR", NULL, 1 },
94 { 1, 0x51, "FBDNBCFGCUR", NULL, 1 },
95 { 1, 0x52, "LINKPARCUR", NULL, 2 },
96 { 1, 0x54, "FBDSBCFGNXT", NULL, 1 },
97 { 1, 0x55, "FBDNBCFGNXT", NULL, 1 },
98 { 1, 0x56, "LINKPARNXT", NULL, 2 },
99 { 1, 0x5a, "SBRXMAR", NULL, 1 },
100 { 1, 0x5b, "NBRXMAR", NULL, 1 },
101 { 1, 0x5c, "MODES", NULL, 1 },
102 { 1, 0x60, "FEATURES", NULL, 2 },
103 { 1, 0x64, "FBDLIS", NULL, 3 },
104 { 1, 0x68, "FBDLOCKTO", NULL, 2 },
105 { 1, 0x6c, "FBDHAC", NULL, 1 },
106 { 1, 0x6e, "FBDLS", NULL, 1 },
107 { 1, 0x70, "RECALDUR", NULL, 1 },
108 { 1, 0x74, "LOSDUR", NULL, 1 },
109 { 1, 0x78, "SYNCTRAININT", NULL, 1 },
110 { 1, 0x7c, "SBCALSTATUS", NULL, 2 },
111 { 1, 0x7e, "NBCALSTATUS", NULL, 2 },
112 { 1, 0x88, "CBC", NULL, 1 },
113 { 1, 0x8c, "EMASK", NULL, 1 },
114 { 1, 0x90, "FERR", NULL, 1 },
115 { 1, 0x94, "NERR", NULL, 1 },
116 { 1, 0x98, "RECCFG", NULL, 2 },
117 { 1, 0x9c, "RECFBD0", NULL, 2 },
118 { 1, 0x9e, "RECFBD1", NULL, 2 },
119 { 1, 0xa0, "RECFBD2", NULL, 2 },
120 { 1, 0xa2, "RECFBD3", NULL, 2 },
121 { 1, 0xa4, "RECFBD4", NULL, 2 },
122 { 1, 0xa6, "RECFBD5", NULL, 2 },
123 { 1, 0xa8, "RECFBD6", NULL, 2 },
124 { 1, 0xaa, "RECFBD7", NULL, 2 },
125 { 1, 0xac, "RECFBD8", NULL, 2 },
126 { 1, 0xae, "RECFBD9", NULL, 2 },
127 { 1, 0xb0, "PERSBYTE0NXT", NULL, 1 },
128 { 1, 0xb1, "PERSBYTE1NXT", NULL, 1 },
129 { 1, 0xb2, "PERSBYTE2NXT", NULL, 1 },
130 { 1, 0xb3, "PERSBYTE3NXT", NULL, 1 },
131 { 1, 0xb4, "PERSBYTE4NXT", NULL, 1 },
132 { 1, 0xb5, "PERSBYTE5NXT", NULL, 1 },
133 { 1, 0xb6, "PERSBYTE6NXT", NULL, 1 },
134 { 1, 0xb7, "PERSBYTE7NXT", NULL, 1 },
135 { 1, 0xb8, "PERSBYTE8NXT", NULL, 1 },
136 { 1, 0xb9, "PERSBYTE9NXT", NULL, 1 },
137 { 1, 0xba, "PERSBYTE10NXT", NULL, 1 },
138 { 1, 0xbb, "PERSBYTE11NXT", NULL, 1 },
139 { 1, 0xbc, "PERSBYTE12NXT", NULL, 1 },
140 { 1, 0xbd, "PERSBYTE13NXT", NULL, 1 },
141 { 1, 0xc0, "PERSBYTE0CUR", NULL, 1 },
142 { 1, 0xc1, "PERSBYTE1CUR", NULL, 1 },
143 { 1, 0xc2, "PERSBYTE2CUR", NULL, 1 },
144 { 1, 0xc3, "PERSBYTE3CUR", NULL, 1 },
145 { 1, 0xc4, "PERSBYTE4CUR", NULL, 1 },
146 { 1, 0xc5, "PERSBYTE5CUR", NULL, 1 },
147 { 1, 0xc6, "PERSBYTE6CUR", NULL, 1 },
148 { 1, 0xc7, "PERSBYTE7CUR", NULL, 1 },
149 { 1, 0xc8, "PERSBYTE8CUR", NULL, 1 },
150 { 1, 0xc9, "PERSBYTE9CUR", NULL, 1 },
151 { 1, 0xca, "PERSBYTE10CUR", NULL, 1 },
152 { 1, 0xcb, "PERSBYTE11CUR", NULL, 1 },
153 { 1, 0xcc, "PERSBYTE12CUR", NULL, 1 },
154 { 1, 0xcd, "PERSBYTE13CUR", NULL, 1 },
155 { 1, 0xe8, "CMD2DATANXT", NULL, 1 },
156 { 1, 0xe9, "CMD2DATACUR", NULL, 1 },
157 { 1, 0xea, "C2DINCRNXT", NULL, 1 },
158 { 1, 0xeb, "C2DINCRCUR", NULL, 1 },
159 { 1, 0xec, "C2DDECRNXT", NULL, 1 },
160 { 1, 0xed, "C2DDECRCUR", NULL, 1 },
161 { 2, 0x40, "SBDRVCFG", NULL, 1 },
162 { 2, 0x41, "NBDRVCFG", NULL, 1 },
163 { 2, 0x42, "FBDPDCFG", NULL, 1 },
164 { 2, 0x44, "RTERMCFG", NULL, 3 },
165 { 2, 0x47, "IDTCTRLCFG", NULL, 1 },
166 { 2, 0x48, "FBDBUFCFG", NULL, 1 },
167 { 2, 0x50, "SBRQOFFS0", NULL, 1 },
168 { 2, 0x51, "SBRQOFFS1", NULL, 1 },
169 { 2, 0x52, "SBRQOFFS2", NULL, 1 },
170 { 2, 0x53, "SBRQOFFS3", NULL, 1 },
171 { 2, 0x54, "SBRQOFFS4", NULL, 1 },
172 { 2, 0x55, "SBRQOFFS5", NULL, 1 },
173 { 2, 0x56, "SBRQOFFS6", NULL, 1 },
174 { 2, 0x57, "SBRQOFFS7", NULL, 1 },
175 { 2, 0x58, "SBRQOFFS8", NULL, 1 },
176 { 2, 0x59, "SBRQOFFS9", NULL, 1 },
177
178 { 2, 0x60, "NBRQOFFS0", NULL, 1 },
179 { 2, 0x61, "NBRQOFFS1", NULL, 1 },
180 { 2, 0x62, "NBRQOFFS2", NULL, 1 },
181 { 2, 0x63, "NBRQOFFS3", NULL, 1 },
182 { 2, 0x64, "NBRQOFFS4", NULL, 1 },
183 { 2, 0x65, "NBRQOFFS5", NULL, 1 },
184 { 2, 0x66, "NBRQOFFS6", NULL, 1 },
185 { 2, 0x67, "NBRQOFFS7", NULL, 1 },
186 { 2, 0x68, "NBRQOFFS8", NULL, 1 },
187 { 2, 0x69, "NBRQOFFS9", NULL, 1 },
188 { 2, 0x6a, "NBRQOFFS10", NULL, 1 },
189 { 2, 0x6b, "NBRQOFFS11", NULL, 1 },
190 { 2, 0x6c, "NBRQOFFS12", NULL, 1 },
191 { 2, 0x6d, "NBRQOFFS13", NULL, 1 },
192 { 2, 0x90, "TESTCFG", NULL, 1 },
193 { 2, 0x94, "SBTXENCFG", NULL, 2 },
194 { 2, 0x96, "NBTXENCFG", NULL, 2 },
195 { 2, 0x98, "IDLEDETCFG", NULL, 2 },
196 { 2, 0xa4, "SBRXSTATUS", NULL, 4 },
197 { 2, 0xa8, "SBRXSTATUS", NULL, 1 },
198 { 3, 0x3c, "MBIDT", NULL, 1 },
199 { 3, 0x40, "MBCSR", NULL, 4 },
200 { 3, 0x44, "MBADDR", NULL, 4 },
201 { 3, 0x40, "MBDATA0", NULL, 4 },
202 { 3, 0x41, "MBDATA1", NULL, 4 },
203 { 3, 0x42, "MBDATA2", NULL, 4 },
204 { 3, 0x43, "MBDATA3", NULL, 4 },
205 { 3, 0x44, "MBDATA4", NULL, 4 },
206 { 3, 0x45, "MBDATA5", NULL, 4 },
207 { 3, 0x46, "MBDATA6", NULL, 4 },
208 { 3, 0x47, "MBDATA7", NULL, 4 },
209 { 3, 0x48, "MBDATA8", NULL, 4 },
210 { 3, 0x49, "MBDATA9", NULL, 4 },
211 { 3, 0x70, "DAREFTC", NULL, 4 },
212 { 3, 0x74, "DSREFTC", NULL, 3 },
213 { 3, 0x77, "MTR", NULL, 1 },
214 { 3, 0x78, "DRT", NULL, 4 },
215 { 3, 0x7c, "DRC", NULL, 4 },
216 { 3, 0x80, "TEMPLO", NULL, 1 },
217 { 3, 0x81, "TEMPMID", NULL, 1 },
218 { 3, 0x82, "TEMPHI", NULL, 1 },
219 { 3, 0x83, "UPDATED", NULL, 1 },
220 { 3, 0x84, "TEMPSTAT", NULL, 1 },
221 { 3, 0x85, "TEMP", NULL, 1 },
222 { 3, 0x86, "TEMPOFFSET", NULL, 1 },
223 { 3, 0x9c, "MB_START_ADDR", NULL, 4 },
224 { 3, 0xa0, "MB_END_ADDR", NULL, 4 },
225 { 3, 0xa4, "MBLFSRSEED", NULL, 4 },
226 { 3, 0xa8, "MBFADDRPTR", NULL, 4 },
227 { 3, 0xb0, "MB_ERR_DATA00", NULL, 4 },
228 { 3, 0xb4, "MB_ERR_DATA01", NULL, 4 },
229 { 3, 0xb8, "MB_ERR_DATA02", NULL, 4 },
230 { 3, 0xbc, "MB_ERR_DATA03", NULL, 4 },
231 { 3, 0xc0, "MB_ERR_DATA04", NULL, 2 },
232 { 3, 0xc4, "MB_ERR_DATA10", NULL, 4 },
233 { 3, 0xc8, "MB_ERR_DATA11", NULL, 4 },
234 { 3, 0xcc, "MB_ERR_DATA12", NULL, 4 },
235 { 3, 0xd0, "MB_ERR_DATA13", NULL, 4 },
236 { 3, 0xd4, "MB_ERR_DATA14", NULL, 2 },
237
238 { 4, 0x40, "DCALCSR", NULL, 4 },
239 { 4, 0x44, "DCALADDR", NULL, 4 },
240 { 4, 0x98, "DSRETC", NULL, 4 },
241 { 4, 0xa4, "S3RESTORE0", NULL, 4 },
242 { 4, 0xa8, "S3RESTORE1", NULL, 4 },
243 { 4, 0xac, "S3RESTORE2", NULL, 4 },
244 { 4, 0xb0, "S3RESTORE3", NULL, 4 },
245 { 4, 0xb4, "S3RESTORE4", NULL, 4 },
246 { 4, 0xb8, "S3RESTORE5", NULL, 4 },
247 { 4, 0xbc, "S3RESTORE6", NULL, 4 },
248 { 4, 0xc0, "S3RESTORE7", NULL, 4 },
249 { 4, 0xc4, "S3RESTORE8", NULL, 4 },
250 { 4, 0xc8, "S3RESTORE9", NULL, 4 },
251 { 4, 0xcc, "S3RESTORE10", NULL, 4 },
252 { 4, 0xe8, "FIVESREG", NULL, 4 },
253 { 4, 0xea, "AAAAREG", NULL, 4 },
254
255 { 5, 0x3c, "TRANSCFG", NULL, 4 },
256 { 5, 0x40, "TRANDERR0", NULL, 2 },
257 { 5, 0x42, "TRANDERR1", NULL, 2 },
258 { 5, 0x44, "TRANDERR2", NULL, 2 },
259 { 5, 0x46, "TRANDERR3", NULL, 2 },
260 { 5, 0x48, "TRANDERR4", NULL, 2 },
261 { 5, 0x4a, "TRANDERR5", NULL, 2 },
262 { 5, 0x4c, "TRANDERR6", NULL, 2 },
263 { 5, 0x4e, "TRANDERR7", NULL, 2 },
264 { 5, 0x50, "TRANDERR8", NULL, 2 },
265 { 5, 0x80, "TRANSCTRL", NULL, 1 },
266 { 5, 0xbc, "SBMATCHU", NULL, 3 },
267 { 5, 0xc0, "SBMATCHL0", NULL, 4 },
268 { 5, 0xcc, "SBMASKU", NULL, 3 },
269 { 5, 0xd0, "SBMASKL0", NULL, 4 },
270 { 5, 0xe0, "EVENTSEL0", NULL, 3 },
271 { 5, 0xfc, "EICNTL", NULL, 1 },
272 { 5, 0xfe, "STUCKL", NULL, 1 },
273
274 { 6, 0x50, "NBRXSTATUS", NULL, 4 },
275 { 6, 0x7c, "SPAD0", NULL, 4 },
276 { 6, 0x80, "SBFIBPORTCTL", NULL, 4 },
277 { 6, 0x84, "SBFIBPGCTL", NULL, 4 },
278 { 6, 0x88, "SBFIBPATTBUF1", NULL, 3 },
279 { 6, 0x8c, "SBFIBTXMSK", NULL, 2 },
280 { 6, 0x90, "SBFIBRXMSK", NULL, 2 },
281 { 6, 0x94, "SBFIBTXSHFT", NULL, 2 },
282 { 6, 0x98, "SBFIBRXSHFT", NULL, 2 },
283 { 6, 0x9c, "SBFIBRXLNERR", NULL, 2 },
284 { 6, 0xa0, "SBFIBPATTBUF2", NULL, 3 },
285 { 6, 0xa4, "SBFIBPATT2EN", NULL, 2 },
286 { 6, 0xb0, "SBFIBINIT", NULL, 4 },
287 { 6, 0xb4, "SBIBISTMISC", NULL, 3 },
288 { 6, 0xc0, "NBFIBPORTCTL", NULL, 4 },
289 { 6, 0xc4, "NBFIBPGCTL", NULL, 4 },
290 { 6, 0xc8, "NBFIBPATTBUF1", NULL, 3 },
291 { 6, 0xcc, "NBFIBTXMSK", NULL, 2 },
292 { 6, 0xd0, "NBFIBRXMSK", NULL, 2 },
293 { 6, 0xd4, "NBFIBTXSHFT", NULL, 2 },
294 { 6, 0xd8, "NBFIBRXSHFT", NULL, 2 },
295 { 6, 0xdc, "NBFIBRXLNERR", NULL, 2 },
296 { 6, 0xe0, "NBFIBPATTBUF2", NULL, 3 },
297 { 6, 0xe4, "NBFIBPATT2EN", NULL, 2 },
298 { 6, 0xf0, "NBFIBINIT", NULL, 4 },
299 { 6, 0xf4, "NBIBISTMISC", NULL, 3 },
300
301 { 7, 0x40, "ODRV_ADJ_ADDR_A", NULL, 3 },
302 { 7, 0x43, "ODRV_ADJ_CAS_A", NULL, 3 },
303 { 7, 0x46, "ODRV_ADJ_CKE_A", NULL, 3 },
304 { 7, 0x49, "ODRV_ADJ_ODT_A", NULL, 3 },
305 { 7, 0x4c, "ODRV_ADJ_ADDR_B", NULL, 3 },
306 { 7, 0x4f, "ODRV_ADJ_CAS_B", NULL, 3 },
307 { 7, 0x52, "ODRV_ADJ_CKE_B", NULL, 3 },
308 { 7, 0x55, "ODRV_ADJ_ODT_B", NULL, 3 },
309 { 7, 0x58, "ODRV_ADJ_CLK0", NULL, 3 },
310 { 7, 0x5b, "ODRV_ADJ_CLK1", NULL, 3 },
311 { 7, 0x5e, "ODRV_ADJ_CLK2", NULL, 3 },
312 { 7, 0x61, "ODRV_ADJ_CLK3", NULL, 3 },
313 { 7, 0x64, "ODRV_ADJ_DQ_DQS", NULL, 3 },
314 { 7, 0x67, "DDR_ODTCTL", NULL, 1 },
315 { 7, 0x69, "DDR_ZCAL", NULL, 2 },
316 { 7, 0x6c, "DDR_ZCTL", NULL, 4 },
317 { 7, 0x78, "VHOSTCNTL", NULL, 1 },
318 { 7, 0x79, "DQSDLY_SMBUSCTL", NULL, 1 },
319 { 7, 0x7c, "SPAD1", NULL, 4 },
320 { 7, 0x80, "CTL_ADDR_A", NULL, 1 },
321 { 7, 0x81, "CTL_CAS_A", NULL, 1 },
322 { 7, 0x82, "CTL_CKE_A", NULL, 1 },
323 { 7, 0x83, "CTL_ODT_A", NULL, 1 },
324 { 7, 0x84, "CTL_ADDR_B", NULL, 1 },
325 { 7, 0x85, "CTL_CAS_B", NULL, 1 },
326 { 7, 0x86, "CTL_CKE_B", NULL, 1 },
327 { 7, 0x87, "CTL_ODT_B", NULL, 1 },
328 { 7, 0x88, "CTL_CLK0", NULL, 1 },
329 { 7, 0x89, "CTL_CLK1", NULL, 1 },
330 { 7, 0x8a, "CTL_CLK2", NULL, 1 },
331 { 7, 0x8b, "CTL_CLK3", NULL, 1 },
332 { 7, 0x8c, "CTL_DQ", NULL, 1 },
333 { 7, 0x8d, "CTL_DQS", NULL, 1 },
334 { 0, 0x00, NULL, NULL, 0 },
335 };
336
dump_amb(volatile void * ambconfig,int branch,int channel,int amb)337 static void dump_amb(volatile void *ambconfig, int branch, int channel, int amb)
338 {
339 struct amb_register *reg;
340 static int lastreg, lastfn;
341 int bytes;
342
343 volatile void *base = ambconfig + \
344 ((branch << 16) | (channel << 15) | (amb << 11));
345
346 if ((amb_read_config32(base, 0, 0) == 0xffffffff) |
347 (amb_read_config32(base, 0, 0) == 0x00000000))
348 return;
349
350 printf("AMB %d, branch %d, channel %d register dump:\n"
351 "============================================\n",
352 amb, branch, channel);
353
354 for(reg = amb_registers; reg->name; reg++) {
355 if (reg->fn == lastfn && reg->offset > 0 && reg->offset - lastreg) {
356 bytes = reg->offset - lastreg;
357
358 do {
359 if (!(lastreg & 3) && bytes >= 4) {
360 amb_printreg32(base, reg->fn, lastreg, "RESERVED", 0);
361 bytes -= 4;
362 lastreg += 4;
363 } else if (!(lastreg & 1) && bytes >= 2) {
364 amb_printreg16(base, reg->fn, lastreg, "RESERVED", 0);
365 bytes -= 2;
366 lastreg += 2;
367 } else {
368 amb_printreg8(base, reg->fn, lastreg, "RESERVED", 0);
369 bytes -= 1;
370 lastreg += 1;
371 }
372 } while(bytes > 0);
373 }
374
375 switch(reg->width) {
376 case 1:
377 amb_printreg8(base, reg->fn, reg->offset, reg->name, 1);
378 break;
379 case 2:
380 amb_printreg16(base, reg->fn, reg->offset, reg->name, 1);
381 break;
382
383 case 3:
384 amb_printreg24(base, reg->fn, reg->offset, reg->name, 1);
385 break;
386
387 case 4:
388 amb_printreg32(base, reg->fn, reg->offset, reg->name, 1);
389 break;
390
391 default:
392 break;
393 }
394
395 if (reg->printfunc)
396 reg->printfunc(base, reg->fn, reg->offset, reg->name, 1);
397 lastreg = reg->offset + reg->width;
398 lastfn = reg->fn;
399 }
400 printf("\n\n");
401 }
402
print_ambs(struct pci_dev * dev,struct pci_access * pacc)403 int print_ambs(struct pci_dev *dev, struct pci_access *pacc)
404 {
405 struct pci_dev *dev16;
406 int branch, channel, amb;
407 int max_branch, max_channel, max_amb;
408 volatile void *ambconfig;
409 uint64_t ambconfig_phys;
410
411 printf("\n============= AMBs ============\n\n");
412
413 switch (dev->device_id) {
414 case PCI_DEVICE_ID_INTEL_I5000P:
415 case PCI_DEVICE_ID_INTEL_I5000X:
416 case PCI_DEVICE_ID_INTEL_I5000Z:
417
418 max_branch = 2;
419
420 if (!(dev16 = pci_get_dev(pacc, 0, 0, 0x10, 0))) {
421 perror("Error: no device 0:16.0\n");
422 return 1;
423 }
424
425 ambconfig_phys = ((uint64_t)pci_read_long(dev16, 0x4c) << 32) |
426 pci_read_long(dev16, 0x48);
427
428 max_channel = pci_read_byte(dev16, 0x56)/max_branch;
429 max_amb = pci_read_byte(dev16, 0x57);
430 pci_free_dev(dev16);
431 break;
432
433 default:
434 fprintf(stderr, "Error: Dumping AMBs on this MCH is not (yet) supported.\n");
435 return 1;
436 }
437
438 if (!(ambconfig = map_physical(ambconfig_phys, AMB_CONFIG_SPACE_SIZE))) {
439 fprintf(stderr, "Error mapping AMB config space\n");
440 return 1;
441 }
442
443 for(branch = 0; branch < max_branch; branch++) {
444 for(channel = 0; channel < max_channel; channel++) {
445 for(amb = 0; amb < max_amb; amb++) {
446 dump_amb(ambconfig, branch, channel, amb);
447 }
448 }
449 }
450 unmap_physical((void *)ambconfig, AMB_CONFIG_SPACE_SIZE);
451 return 0;
452 }
453