xref: /aosp_15_r20/external/coreboot/util/superiotool/aspeed.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include "superiotool.h"
4 
5 #define DEVICE_SCRATCH_REG	0x21
6 
7 static const struct superio_registers reg_table[] = {
8 	{0x00, "AST2400", {
9 		{NOLDN, NULL,
10 			{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
11 			 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
12 			{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
13 			 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
14 		{0x02, "SUART1",
15 			{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
16 			{0x00,0x03,0xf8,0x04,0x02,RSVD,EOT}},
17 		{0x03, "SUART2",
18 			{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
19 			{0x00,0x02,0xf8,0x03,0x02,0x00,EOT}},
20 		{0x04, "SWC",
21 			{0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,
22 			 0x70,0x71,EOT},
23 			{0x00,0x08,0xe6,0x08,0xe0,0x08,0xe4,0x08,0xe8,
24 			 0x09,0x01,EOT}},
25 		{0x05, "Keyboard config (KBC)",
26 			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x72,0x73,
27 			 0xf0,EOT},
28 			{0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x0c,0x02,
29 			 0x83,EOT}},
30 		{0x07, "GPIO",
31 			{0x30,0x38,0x70,0x71,EOT},
32 			{0x00,0x00,0x0b,0x01,EOT}},
33 		{0x0b, "SUART3",
34 			{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
35 			{0x00,0x03,0xe8,0x06,0x02,0x00,EOT}},
36 		{0x0c, "SUART4",
37 			{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
38 			{0x00,0x02,0xe8,0x05,0x02,0x00,EOT}},
39 		{0x0d, "iLPC2AHB",
40 			{0x30,0x70,0x71,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
41 			 0xf6,0xf7,0xf8,0xfe,EOT},
42 			{0x00,0x09,0x01,NANA,NANA,NANA,NANA,NANA,NANA,
43 			 NANA,NANA,0x00,0x00,EOT}},
44 		{0x0e, "Mailbox",
45 			{0x30,0x60,0x61,0x70,0x71,EOT},
46 			{0x00,0x08,0xc0,0x09,0x01,EOT}},
47 		{EOT}}},
48 	{EOT}
49 };
50 
enter_conf_mode_ast(uint16_t port)51 static void enter_conf_mode_ast(uint16_t port)
52 {
53 	OUTB(0xa5, port);
54 	OUTB(0xa5, port);
55 }
56 
exit_conf_mode_ast(uint16_t port)57 static void exit_conf_mode_ast(uint16_t port)
58 {
59 	OUTB(0xaa, port);
60 }
61 
detect_ast_superio(uint16_t port)62 static int detect_ast_superio(uint16_t port)
63 {
64 	int i;
65 	enter_conf_mode_ast(port);
66 
67 	/* Aspeed devices doesn't have a DEVICE_ID_REG.
68 	 * Host cycles that aren't decoded read as 0xff.
69 	 * Probe for the scratch register that are initialized to zero.
70 	 * The firmware might overwrite that, but it's the best we have.
71 	 */
72 
73 	for (i = DEVICE_SCRATCH_REG; i < 0x30; i++) {
74 		if (regval(port, i) != 0xff)
75 			break;
76 	}
77 	if (i == 0x30) {
78 		if (verbose)
79 			printf(NOTFOUND
80 			       "scratch registers all read as 0xff\n");
81 	}
82 	exit_conf_mode_ast(port);
83 
84 	return i < 0x30;
85 }
86 
probe_idregs_aspeed(uint16_t port)87 void probe_idregs_aspeed(uint16_t port)
88 {
89 	uint16_t chip_id = 0;
90 
91 	probing_for("Aspeed", "", port);
92 
93 	if (!detect_ast_superio(port))
94 		return;
95 
96 	if (superio_unknown(reg_table, chip_id)) {
97 		if (verbose)
98 			printf(NOTFOUND "id=0x%02x\n", chip_id);
99 		return;
100 	}
101 
102 	printf("Found Aspeed %s (id=0x%02x) at 0x%x\n",
103 	       get_superio_name(reg_table, chip_id), chip_id, port);
104 	chip_found = 1;
105 
106 	enter_conf_mode_ast(port);
107 	dump_superio("Aspeed", reg_table, port, chip_id, LDN_SEL);
108 	exit_conf_mode_ast(port);
109 }
110 
print_aspeed_chips(void)111 void print_aspeed_chips(void)
112 {
113 	print_vendor_chips("Aspeed", reg_table);
114 }
115