1 // Copyright 2017 Google LLC 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 // Interface to retrieve hardware capabilities. It relies on Linux's getauxval 16 // or `/proc/self/auxval` under the hood. 17 #ifndef CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_ 18 #define CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_ 19 20 #include <stdbool.h> 21 #include <stdint.h> 22 23 #include "cpu_features_macros.h" 24 25 CPU_FEATURES_START_CPP_NAMESPACE 26 27 // To avoid depending on the linux kernel we reproduce the architecture specific 28 // constants here. 29 30 // http://elixir.free-electrons.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h 31 #define AARCH64_HWCAP_FP (1UL << 0) 32 #define AARCH64_HWCAP_ASIMD (1UL << 1) 33 #define AARCH64_HWCAP_EVTSTRM (1UL << 2) 34 #define AARCH64_HWCAP_AES (1UL << 3) 35 #define AARCH64_HWCAP_PMULL (1UL << 4) 36 #define AARCH64_HWCAP_SHA1 (1UL << 5) 37 #define AARCH64_HWCAP_SHA2 (1UL << 6) 38 #define AARCH64_HWCAP_CRC32 (1UL << 7) 39 #define AARCH64_HWCAP_ATOMICS (1UL << 8) 40 #define AARCH64_HWCAP_FPHP (1UL << 9) 41 #define AARCH64_HWCAP_ASIMDHP (1UL << 10) 42 #define AARCH64_HWCAP_CPUID (1UL << 11) 43 #define AARCH64_HWCAP_ASIMDRDM (1UL << 12) 44 #define AARCH64_HWCAP_JSCVT (1UL << 13) 45 #define AARCH64_HWCAP_FCMA (1UL << 14) 46 #define AARCH64_HWCAP_LRCPC (1UL << 15) 47 #define AARCH64_HWCAP_DCPOP (1UL << 16) 48 #define AARCH64_HWCAP_SHA3 (1UL << 17) 49 #define AARCH64_HWCAP_SM3 (1UL << 18) 50 #define AARCH64_HWCAP_SM4 (1UL << 19) 51 #define AARCH64_HWCAP_ASIMDDP (1UL << 20) 52 #define AARCH64_HWCAP_SHA512 (1UL << 21) 53 #define AARCH64_HWCAP_SVE (1UL << 22) 54 #define AARCH64_HWCAP_ASIMDFHM (1UL << 23) 55 #define AARCH64_HWCAP_DIT (1UL << 24) 56 #define AARCH64_HWCAP_USCAT (1UL << 25) 57 #define AARCH64_HWCAP_ILRCPC (1UL << 26) 58 #define AARCH64_HWCAP_FLAGM (1UL << 27) 59 #define AARCH64_HWCAP_SSBS (1UL << 28) 60 #define AARCH64_HWCAP_SB (1UL << 29) 61 #define AARCH64_HWCAP_PACA (1UL << 30) 62 #define AARCH64_HWCAP_PACG (1UL << 31) 63 64 #define AARCH64_HWCAP2_DCPODP (1UL << 0) 65 #define AARCH64_HWCAP2_SVE2 (1UL << 1) 66 #define AARCH64_HWCAP2_SVEAES (1UL << 2) 67 #define AARCH64_HWCAP2_SVEPMULL (1UL << 3) 68 #define AARCH64_HWCAP2_SVEBITPERM (1UL << 4) 69 #define AARCH64_HWCAP2_SVESHA3 (1UL << 5) 70 #define AARCH64_HWCAP2_SVESM4 (1UL << 6) 71 #define AARCH64_HWCAP2_FLAGM2 (1UL << 7) 72 #define AARCH64_HWCAP2_FRINT (1UL << 8) 73 #define AARCH64_HWCAP2_SVEI8MM (1UL << 9) 74 #define AARCH64_HWCAP2_SVEF32MM (1UL << 10) 75 #define AARCH64_HWCAP2_SVEF64MM (1UL << 11) 76 #define AARCH64_HWCAP2_SVEBF16 (1UL << 12) 77 #define AARCH64_HWCAP2_I8MM (1UL << 13) 78 #define AARCH64_HWCAP2_BF16 (1UL << 14) 79 #define AARCH64_HWCAP2_DGH (1UL << 15) 80 #define AARCH64_HWCAP2_RNG (1UL << 16) 81 #define AARCH64_HWCAP2_BTI (1UL << 17) 82 #define AARCH64_HWCAP2_MTE (1UL << 18) 83 #define AARCH64_HWCAP2_ECV (1UL << 19) 84 #define AARCH64_HWCAP2_AFP (1UL << 20) 85 #define AARCH64_HWCAP2_RPRES (1UL << 21) 86 #define AARCH64_HWCAP2_MTE3 (1UL << 22) 87 #define AARCH64_HWCAP2_SME (1UL << 23) 88 #define AARCH64_HWCAP2_SME_I16I64 (1UL << 24) 89 #define AARCH64_HWCAP2_SME_F64F64 (1UL << 25) 90 #define AARCH64_HWCAP2_SME_I8I32 (1UL << 26) 91 #define AARCH64_HWCAP2_SME_F16F32 (1UL << 27) 92 #define AARCH64_HWCAP2_SME_B16F32 (1UL << 28) 93 #define AARCH64_HWCAP2_SME_F32F32 (1UL << 29) 94 #define AARCH64_HWCAP2_SME_FA64 (1UL << 30) 95 #define AARCH64_HWCAP2_WFXT (1UL << 31) 96 #define AARCH64_HWCAP2_EBF16 (1UL << 32) 97 #define AARCH64_HWCAP2_SVE_EBF16 (1UL << 33) 98 #define AARCH64_HWCAP2_CSSC (1UL << 34) 99 #define AARCH64_HWCAP2_RPRFM (1UL << 35) 100 #define AARCH64_HWCAP2_SVE2P1 (1UL << 36) 101 #define AARCH64_HWCAP2_SME2 (1UL << 37) 102 #define AARCH64_HWCAP2_SME2P1 (1UL << 38) 103 #define AARCH64_HWCAP2_SME_I16I32 (1UL << 39) 104 #define AARCH64_HWCAP2_SME_BI32I32 (1UL << 40) 105 #define AARCH64_HWCAP2_SME_B16B16 (1UL << 41) 106 #define AARCH64_HWCAP2_SME_F16F16 (1UL << 42) 107 108 // http://elixir.free-electrons.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h 109 #define ARM_HWCAP_SWP (1UL << 0) 110 #define ARM_HWCAP_HALF (1UL << 1) 111 #define ARM_HWCAP_THUMB (1UL << 2) 112 #define ARM_HWCAP_26BIT (1UL << 3) 113 #define ARM_HWCAP_FAST_MULT (1UL << 4) 114 #define ARM_HWCAP_FPA (1UL << 5) 115 #define ARM_HWCAP_VFP (1UL << 6) 116 #define ARM_HWCAP_EDSP (1UL << 7) 117 #define ARM_HWCAP_JAVA (1UL << 8) 118 #define ARM_HWCAP_IWMMXT (1UL << 9) 119 #define ARM_HWCAP_CRUNCH (1UL << 10) 120 #define ARM_HWCAP_THUMBEE (1UL << 11) 121 #define ARM_HWCAP_NEON (1UL << 12) 122 #define ARM_HWCAP_VFPV3 (1UL << 13) 123 #define ARM_HWCAP_VFPV3D16 (1UL << 14) 124 #define ARM_HWCAP_TLS (1UL << 15) 125 #define ARM_HWCAP_VFPV4 (1UL << 16) 126 #define ARM_HWCAP_IDIVA (1UL << 17) 127 #define ARM_HWCAP_IDIVT (1UL << 18) 128 #define ARM_HWCAP_VFPD32 (1UL << 19) 129 #define ARM_HWCAP_LPAE (1UL << 20) 130 #define ARM_HWCAP_EVTSTRM (1UL << 21) 131 #define ARM_HWCAP2_AES (1UL << 0) 132 #define ARM_HWCAP2_PMULL (1UL << 1) 133 #define ARM_HWCAP2_SHA1 (1UL << 2) 134 #define ARM_HWCAP2_SHA2 (1UL << 3) 135 #define ARM_HWCAP2_CRC32 (1UL << 4) 136 137 // http://elixir.free-electrons.com/linux/latest/source/arch/mips/include/uapi/asm/hwcap.h 138 #define MIPS_HWCAP_R6 (1UL << 0) 139 #define MIPS_HWCAP_MSA (1UL << 1) 140 #define MIPS_HWCAP_CRC32 (1UL << 2) 141 #define MIPS_HWCAP_MIPS16 (1UL << 3) 142 #define MIPS_HWCAP_MDMX (1UL << 4) 143 #define MIPS_HWCAP_MIPS3D (1UL << 5) 144 #define MIPS_HWCAP_SMARTMIPS (1UL << 6) 145 #define MIPS_HWCAP_DSP (1UL << 7) 146 #define MIPS_HWCAP_DSP2 (1UL << 8) 147 #define MIPS_HWCAP_DSP3 (1UL << 9) 148 149 // http://elixir.free-electrons.com/linux/latest/source/arch/powerpc/include/uapi/asm/cputable.h 150 #ifndef _UAPI__ASM_POWERPC_CPUTABLE_H 151 /* in AT_HWCAP */ 152 #define PPC_FEATURE_32 0x80000000 153 #define PPC_FEATURE_64 0x40000000 154 #define PPC_FEATURE_601_INSTR 0x20000000 155 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 156 #define PPC_FEATURE_HAS_FPU 0x08000000 157 #define PPC_FEATURE_HAS_MMU 0x04000000 158 #define PPC_FEATURE_HAS_4xxMAC 0x02000000 159 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 160 #define PPC_FEATURE_HAS_SPE 0x00800000 161 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 162 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 163 #define PPC_FEATURE_NO_TB 0x00100000 164 #define PPC_FEATURE_POWER4 0x00080000 165 #define PPC_FEATURE_POWER5 0x00040000 166 #define PPC_FEATURE_POWER5_PLUS 0x00020000 167 #define PPC_FEATURE_CELL 0x00010000 168 #define PPC_FEATURE_BOOKE 0x00008000 169 #define PPC_FEATURE_SMT 0x00004000 170 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 171 #define PPC_FEATURE_ARCH_2_05 0x00001000 172 #define PPC_FEATURE_PA6T 0x00000800 173 #define PPC_FEATURE_HAS_DFP 0x00000400 174 #define PPC_FEATURE_POWER6_EXT 0x00000200 175 #define PPC_FEATURE_ARCH_2_06 0x00000100 176 #define PPC_FEATURE_HAS_VSX 0x00000080 177 178 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT 0x00000040 179 180 /* Reserved - do not use 0x00000004 */ 181 #define PPC_FEATURE_TRUE_LE 0x00000002 182 #define PPC_FEATURE_PPC_LE 0x00000001 183 184 /* in AT_HWCAP2 */ 185 #define PPC_FEATURE2_ARCH_2_07 0x80000000 186 #define PPC_FEATURE2_HTM 0x40000000 187 #define PPC_FEATURE2_DSCR 0x20000000 188 #define PPC_FEATURE2_EBB 0x10000000 189 #define PPC_FEATURE2_ISEL 0x08000000 190 #define PPC_FEATURE2_TAR 0x04000000 191 #define PPC_FEATURE2_VEC_CRYPTO 0x02000000 192 #define PPC_FEATURE2_HTM_NOSC 0x01000000 193 #define PPC_FEATURE2_ARCH_3_00 0x00800000 194 #define PPC_FEATURE2_HAS_IEEE128 0x00400000 195 #define PPC_FEATURE2_DARN 0x00200000 196 #define PPC_FEATURE2_SCV 0x00100000 197 #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 198 #endif 199 200 // https://elixir.bootlin.com/linux/v6.0-rc6/source/arch/s390/include/asm/elf.h 201 #define HWCAP_S390_ESAN3 1 202 #define HWCAP_S390_ZARCH 2 203 #define HWCAP_S390_STFLE 4 204 #define HWCAP_S390_MSA 8 205 #define HWCAP_S390_LDISP 16 206 #define HWCAP_S390_EIMM 32 207 #define HWCAP_S390_DFP 64 208 #define HWCAP_S390_HPAGE 128 209 #define HWCAP_S390_ETF3EH 256 210 #define HWCAP_S390_HIGH_GPRS 512 211 #define HWCAP_S390_TE 1024 212 #define HWCAP_S390_VX 2048 213 #define HWCAP_S390_VXRS HWCAP_S390_VX 214 #define HWCAP_S390_VXD 4096 215 #define HWCAP_S390_VXRS_BCD HWCAP_S390_VXD 216 #define HWCAP_S390_VXE 8192 217 #define HWCAP_S390_VXRS_EXT HWCAP_S390_VXE 218 #define HWCAP_S390_GS 16384 219 #define HWCAP_S390_VXRS_EXT2 32768 220 #define HWCAP_S390_VXRS_PDE 65536 221 #define HWCAP_S390_SORT 131072 222 #define HWCAP_S390_DFLT 262144 223 #define HWCAP_S390_VXRS_PDE2 524288 224 #define HWCAP_S390_NNPA 1048576 225 #define HWCAP_S390_PCI_MIO 2097152 226 #define HWCAP_S390_SIE 4194304 227 228 // https://elixir.bootlin.com/linux/latest/source/arch/riscv/include/uapi/asm/hwcap.h 229 #define RISCV_HWCAP_32 0x32 230 #define RISCV_HWCAP_64 0x64 231 #define RISCV_HWCAP_128 0x128 232 #define RISCV_HWCAP_M (1UL << ('M' - 'A')) 233 #define RISCV_HWCAP_A (1UL << ('A' - 'A')) 234 #define RISCV_HWCAP_F (1UL << ('F' - 'A')) 235 #define RISCV_HWCAP_D (1UL << ('D' - 'A')) 236 #define RISCV_HWCAP_Q (1UL << ('Q' - 'A')) 237 #define RISCV_HWCAP_C (1UL << ('C' - 'A')) 238 #define RISCV_HWCAP_V (1UL << ('V' - 'A')) 239 240 // https://github.com/torvalds/linux/blob/master/arch/loongarch/include/uapi/asm/hwcap.h 241 #define HWCAP_LOONGARCH_CPUCFG (1 << 0) 242 #define HWCAP_LOONGARCH_LAM (1 << 1) 243 #define HWCAP_LOONGARCH_UAL (1 << 2) 244 #define HWCAP_LOONGARCH_FPU (1 << 3) 245 #define HWCAP_LOONGARCH_LSX (1 << 4) 246 #define HWCAP_LOONGARCH_LASX (1 << 5) 247 #define HWCAP_LOONGARCH_CRC32 (1 << 6) 248 #define HWCAP_LOONGARCH_COMPLEX (1 << 7) 249 #define HWCAP_LOONGARCH_CRYPTO (1 << 8) 250 #define HWCAP_LOONGARCH_LVZ (1 << 9) 251 #define HWCAP_LOONGARCH_LBT_X86 (1 << 10) 252 #define HWCAP_LOONGARCH_LBT_ARM (1 << 11) 253 #define HWCAP_LOONGARCH_LBT_MIPS (1 << 12) 254 #define HWCAP_LOONGARCH_PTW (1 << 13) 255 256 typedef struct { 257 unsigned long hwcaps; 258 unsigned long hwcaps2; 259 } HardwareCapabilities; 260 261 // Retrieves values from auxiliary vector for types AT_HWCAP and AT_HWCAP2. 262 // First tries to call getauxval(), if not available falls back to reading 263 // "/proc/self/auxv". 264 HardwareCapabilities CpuFeatures_GetHardwareCapabilities(void); 265 266 // Checks whether value for AT_HWCAP (or AT_HWCAP2) match hwcaps_mask. 267 bool CpuFeatures_IsHwCapsSet(const HardwareCapabilities hwcaps_mask, 268 const HardwareCapabilities hwcaps); 269 270 // Get pointer for the AT_PLATFORM type. 271 const char* CpuFeatures_GetPlatformPointer(void); 272 // Get pointer for the AT_BASE_PLATFORM type. 273 const char* CpuFeatures_GetBasePlatformPointer(void); 274 275 CPU_FEATURES_END_CPP_NAMESPACE 276 277 #endif // CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_ 278