1 // Copyright 2017 Google LLC
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "cpuinfo_mips.h"
16
17 #include "filesystem_for_testing.h"
18 #include "gtest/gtest.h"
19 #include "hwcaps_for_testing.h"
20 #include "internal/stack_line_reader.h"
21 #include "internal/string_view.h"
22
23 namespace cpu_features {
24
25 namespace {
26
TEST(CpuinfoMipsTest,MipsFeaturesEnum)27 TEST(CpuinfoMipsTest, MipsFeaturesEnum) {
28 const char *last_name = GetMipsFeaturesEnumName(MIPS_LAST_);
29 EXPECT_STREQ(last_name, "unknown_feature");
30 for (int i = static_cast<int>(MIPS_MSA); i != static_cast<int>(MIPS_LAST_); ++i) {
31 const auto feature = static_cast<MipsFeaturesEnum>(i);
32 const char *name = GetMipsFeaturesEnumName(feature);
33 ASSERT_FALSE(name == nullptr);
34 EXPECT_STRNE(name, "");
35 EXPECT_STRNE(name, last_name);
36 }
37 }
38
TEST(CpuinfoMipsTest,FromHardwareCapBoth)39 TEST(CpuinfoMipsTest, FromHardwareCapBoth) {
40 ResetHwcaps();
41 SetHardwareCapabilities(MIPS_HWCAP_MSA | MIPS_HWCAP_R6, 0);
42 GetEmptyFilesystem(); // disabling /proc/cpuinfo
43 const auto info = GetMipsInfo();
44 EXPECT_TRUE(info.features.msa);
45 EXPECT_FALSE(info.features.eva);
46 EXPECT_TRUE(info.features.r6);
47 }
48
TEST(CpuinfoMipsTest,FromHardwareCapOnlyOne)49 TEST(CpuinfoMipsTest, FromHardwareCapOnlyOne) {
50 ResetHwcaps();
51 SetHardwareCapabilities(MIPS_HWCAP_MSA, 0);
52 GetEmptyFilesystem(); // disabling /proc/cpuinfo
53 const auto info = GetMipsInfo();
54 EXPECT_TRUE(info.features.msa);
55 EXPECT_FALSE(info.features.eva);
56 }
57
TEST(CpuinfoMipsTest,Ci40)58 TEST(CpuinfoMipsTest, Ci40) {
59 ResetHwcaps();
60 auto& fs = GetEmptyFilesystem();
61 fs.CreateFile("/proc/cpuinfo", R"(system type : IMG Pistachio SoC (B0)
62 machine : IMG Marduk – Ci40 with cc2520
63 processor : 0
64 cpu model : MIPS interAptiv (multi) V2.0 FPU V0.0
65 BogoMIPS : 363.72
66 wait instruction : yes
67 microsecond timers : yes
68 tlb_entries : 64
69 extra interrupt vector : yes
70 hardware watchpoint : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
71 isa : mips1 mips2 mips32r1 mips32r2
72 ASEs implemented : mips16 dsp mt eva
73 shadow register sets : 1
74 kscratch registers : 0
75 package : 0
76 core : 0
77 VCED exceptions : not available
78 VCEI exceptions : not available
79 VPE : 0
80 )");
81 const auto info = GetMipsInfo();
82 EXPECT_FALSE(info.features.msa);
83 EXPECT_TRUE(info.features.eva);
84 EXPECT_FALSE(info.features.r6);
85 EXPECT_TRUE(info.features.mips16);
86 EXPECT_FALSE(info.features.mdmx);
87 EXPECT_FALSE(info.features.mips3d);
88 EXPECT_FALSE(info.features.smart);
89 EXPECT_TRUE(info.features.dsp);
90 }
91
TEST(CpuinfoMipsTest,AR7161)92 TEST(CpuinfoMipsTest, AR7161) {
93 ResetHwcaps();
94 auto& fs = GetEmptyFilesystem();
95 fs.CreateFile("/proc/cpuinfo",
96 R"(system type : Atheros AR7161 rev 2
97 machine : NETGEAR WNDR3700/WNDR3800/WNDRMAC
98 processor : 0
99 cpu model : MIPS 24Kc V7.4
100 BogoMIPS : 452.19
101 wait instruction : yes
102 microsecond timers : yes
103 tlb_entries : 16
104 extra interrupt vector : yes
105 hardware watchpoint : yes, count: 4, address/irw mask: [0x0000, 0x0f98, 0x0f78, 0x0df8]
106 ASEs implemented : mips16
107 shadow register sets : 1
108 kscratch registers : 0
109 core : 0
110 VCED exceptions : not available
111 VCEI exceptions : not available
112 )");
113 const auto info = GetMipsInfo();
114 EXPECT_FALSE(info.features.msa);
115 EXPECT_FALSE(info.features.eva);
116 EXPECT_TRUE(info.features.mips16);
117 }
118
TEST(CpuinfoMipsTest,Goldfish)119 TEST(CpuinfoMipsTest, Goldfish) {
120 ResetHwcaps();
121 auto& fs = GetEmptyFilesystem();
122 fs.CreateFile("/proc/cpuinfo", R"(system type : MIPS-Goldfish
123 Hardware : goldfish
124 Revison : 1
125 processor : 0
126 cpu model : MIPS 24Kc V0.0 FPU V0.0
127 BogoMIPS : 1042.02
128 wait instruction : yes
129 microsecond timers : yes
130 tlb_entries : 16
131 extra interrupt vector : yes
132 hardware watchpoint : yes, count: 1, address/irw mask: [0x0ff8]
133 ASEs implemented :
134 shadow register sets : 1
135 core : 0
136 VCED exceptions : not available
137 VCEI exceptions : not available
138 )");
139 const auto info = GetMipsInfo();
140 EXPECT_FALSE(info.features.msa);
141 EXPECT_FALSE(info.features.eva);
142 }
143
TEST(CpuinfoMipsTest,BCM1250)144 TEST(CpuinfoMipsTest, BCM1250) {
145 ResetHwcaps();
146 auto& fs = GetEmptyFilesystem();
147 fs.CreateFile("/proc/cpuinfo", R"(system type : SiByte BCM91250A (SWARM)
148 processor : 0
149 cpu model : SiByte SB1 V0.2 FPU V0.2
150 BogoMIPS : 532.48
151 wait instruction : no
152 microsecond timers : yes
153 tlb_entries : 64
154 extra interrupt vector : yes
155 hardware watchpoint : yes, count: 1, address/irw mask: [0x0ff8]
156 isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
157 ASEs implemented : mdmx mips3d
158 shadow register sets : 1
159 kscratch registers : 0
160 package : 0
161 core : 0
162 VCED exceptions : not available
163 VCEI exceptions : not available
164 )");
165 const auto info = GetMipsInfo();
166 EXPECT_FALSE(info.features.msa);
167 EXPECT_FALSE(info.features.eva);
168 EXPECT_FALSE(info.features.mips16);
169 EXPECT_TRUE(info.features.mdmx);
170 EXPECT_TRUE(info.features.mips3d);
171 EXPECT_FALSE(info.features.smart);
172 EXPECT_FALSE(info.features.dsp);
173 }
174
175 } // namespace
176 } // namespace cpu_features
177