1 // Copyright 2022 Google LLC
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "cpuinfo_riscv.h"
16
17 #include "filesystem_for_testing.h"
18 #include "gtest/gtest.h"
19 #include "hwcaps_for_testing.h"
20
21 namespace cpu_features {
22 namespace {
23
TEST(CpuinfoRiscvTest,Sipeed_Lichee_RV_FromCpuInfo)24 TEST(CpuinfoRiscvTest, Sipeed_Lichee_RV_FromCpuInfo) {
25 ResetHwcaps();
26 auto& fs = GetEmptyFilesystem();
27 fs.CreateFile("/proc/cpuinfo", R"(processor : 0
28 hart : 0
29 isa : rv64imafdc
30 mmu : sv39
31 uarch : thead,c906)");
32 const auto info = GetRiscvInfo();
33 EXPECT_STREQ(info.uarch, "c906");
34 EXPECT_STREQ(info.vendor, "thead");
35
36 EXPECT_FALSE(info.features.RV32I);
37 EXPECT_TRUE(info.features.RV64I);
38 EXPECT_TRUE(info.features.M);
39 EXPECT_TRUE(info.features.A);
40 EXPECT_TRUE(info.features.F);
41 EXPECT_TRUE(info.features.D);
42 EXPECT_FALSE(info.features.Q);
43 EXPECT_TRUE(info.features.C);
44 EXPECT_FALSE(info.features.V);
45 }
46
47 // https://github.com/ThomasKaiser/sbc-bench/blob/284e82b016ec1beeac42a5fcbe556b670f68441a/results/Kendryte-K510-4.17.0.cpuinfo
TEST(CpuinfoRiscvTest,Kendryte_K510_FromCpuInfo)48 TEST(CpuinfoRiscvTest, Kendryte_K510_FromCpuInfo) {
49 ResetHwcaps();
50 auto& fs = GetEmptyFilesystem();
51 fs.CreateFile("/proc/cpuinfo", R"(
52 hart : 0
53 isa : rv64i2p0m2p0a2p0f2p0d2p0c2p0xv5-0p0
54 mmu : sv39
55
56 hart : 1
57 isa : rv64i2p0m2p0a2p0f2p0d2p0c2p0xv5-0p0
58 mmu : sv39");
59 const auto info = GetRiscvInfo();
60 EXPECT_STREQ(info.uarch, "");
61 EXPECT_STREQ(info.vendor, "");
62
63 EXPECT_FALSE(info.features.RV32I);
64 EXPECT_TRUE(info.features.RV64I);
65 EXPECT_TRUE(info.features.M);
66 EXPECT_TRUE(info.features.A);
67 EXPECT_TRUE(info.features.F);
68 EXPECT_TRUE(info.features.D);
69 EXPECT_FALSE(info.features.Q);
70 EXPECT_TRUE(info.features.C);
71 EXPECT_FALSE(info.features.V);
72 }
73
74 // https://github.com/ThomasKaiser/sbc-bench/blob/284e82b016ec1beeac42a5fcbe556b670f68441a/results/T-Head-C910-5.10.4.cpuinfo
75 TEST(CpuinfoRiscvTest, T_Head_C910_FromCpuInfo) {
76 ResetHwcaps();
77 auto& fs = GetEmptyFilesystem();
78 fs.CreateFile("/proc/cpuinfo", R"(
79 processor : 0
80 hart : 0
81 isa : rv64imafdcsu
82 mmu : sv39
83 cpu-freq : 1.2Ghz
84 cpu-icache : 64KB
85 cpu-dcache : 64KB
86 cpu-l2cache : 2MB
87 cpu-tlb : 1024 4-ways
88 cpu-cacheline : 64Bytes
89 cpu-vector : 0.7.1
90
91 processor : 1
92 hart : 1
93 isa : rv64imafdcsu
94 mmu : sv39
95 cpu-freq : 1.2Ghz
96 cpu-icache : 64KB
97 cpu-dcache : 64KB
98 cpu-l2cache : 2MB
99 cpu-tlb : 1024 4-ways
100 cpu-cacheline : 64Bytes
101 cpu-vector : 0.7.1");
102 const auto info = GetRiscvInfo();
103 EXPECT_STREQ(info.uarch, "");
104 EXPECT_STREQ(info.vendor, "");
105
106 EXPECT_FALSE(info.features.RV32I);
107 EXPECT_TRUE(info.features.RV64I);
108 EXPECT_TRUE(info.features.M);
109 EXPECT_TRUE(info.features.A);
110 EXPECT_TRUE(info.features.F);
111 EXPECT_TRUE(info.features.D);
112 EXPECT_FALSE(info.features.Q);
113 EXPECT_TRUE(info.features.C);
114 EXPECT_FALSE(info.features.V);
115 }
116
117 TEST(CpuinfoRiscvTest, UnknownFromCpuInfo) {
118 ResetHwcaps();
119 auto& fs = GetEmptyFilesystem();
120 fs.CreateFile("/proc/cpuinfo", R"(
121 processor : 0
122 hart : 2
123 isa : rv64imafdc
124 mmu : sv39
125 uarch : sifive,bullet0
126
127 processor : 1
128 hart : 1
129 isa : rv64imafdc
130 mmu : sv39
131 uarch : sifive,bullet0
132
133 processor : 2
134 hart : 3
135 isa : rv64imafdc
136 mmu : sv39
137 uarch : sifive,bullet0
138
139 processor : 3
140 hart : 4
141 isa : rv64imafdc
142 mmu : sv39
143 uarch : sifive,bullet0)");
144 const auto info = GetRiscvInfo();
145 EXPECT_STREQ(info.uarch, "bullet0");
146 EXPECT_STREQ(info.vendor, "sifive");
147
148 EXPECT_FALSE(info.features.RV32I);
149 EXPECT_TRUE(info.features.RV64I);
150 EXPECT_TRUE(info.features.M);
151 EXPECT_TRUE(info.features.A);
152 EXPECT_TRUE(info.features.F);
153 EXPECT_TRUE(info.features.D);
154 EXPECT_FALSE(info.features.Q);
155 EXPECT_TRUE(info.features.C);
156 EXPECT_FALSE(info.features.V);
157 }
158
TEST(CpuinfoRiscvTest,QemuCpuInfo)159 TEST(CpuinfoRiscvTest, QemuCpuInfo) {
160 ResetHwcaps();
161 auto& fs = GetEmptyFilesystem();
162 fs.CreateFile("/proc/cpuinfo", R"(
163 processor : 0
164 hart : 0
165 isa : rv64imafdcvh_zba_zbb_zbc_zbs
166 mmu : sv48)");
167 const auto info = GetRiscvInfo();
168 EXPECT_FALSE(info.features.RV32I);
169 EXPECT_TRUE(info.features.RV64I);
170 EXPECT_TRUE(info.features.M);
171 EXPECT_TRUE(info.features.A);
172 EXPECT_TRUE(info.features.F);
173 EXPECT_TRUE(info.features.D);
174 EXPECT_FALSE(info.features.Q);
175 EXPECT_TRUE(info.features.C);
176 EXPECT_TRUE(info.features.V);
177 }
178
179 } // namespace
180 } // namespace cpu_features
181