xref: /aosp_15_r20/external/flashrom/atapromise.c (revision 0d6140be3aa665ecc836e8907834fcd3e3b018fc)
1 /*
2  * This file is part of the flashrom project.
3  *
4  * Copyright (C) 2015 Joseph C. Lehner <[email protected]>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <string.h>
18 #include <stdlib.h>
19 #include "flash.h"
20 #include "programmer.h"
21 #include "hwaccess_x86_io.h"
22 #include "hwaccess_physmap.h"
23 #include "platform/pci.h"
24 
25 #define MAX_ROM_DECODE (32 * 1024)
26 #define ADDR_MASK (MAX_ROM_DECODE - 1)
27 
28 /*
29  * In the absence of any public docs on the PDC2026x family, this programmer was created through a mix of
30  * reverse-engineering and trial and error.
31  *
32  * The only device tested is an Ultra100 controller, but the logic for programming the other 2026x controllers
33  * is the same, so it should, in theory, work for those as well.
34  *
35  * While the tested Ultra100 controller used a 128 kB MX29F001T chip, A16 and A15 showed continuity to ground,
36  * thus limiting the the programmer on this card to 32 kB. Without other controllers to test this programmer on,
37  * this is currently a hard limit. Note that ROM files for these controllers are 16 kB only.
38  *
39  * Since flashrom does not support accessing flash chips larger than the size limit of the programmer (the
40  * tested Ultra100 uses a 128 kB MX29F001T chip), the chip size is hackishly adjusted in atapromise_limit_chip.
41  */
42 
43 struct atapromise_data {
44 	uint32_t io_base_addr;
45 	uint32_t rom_base_addr;
46 	uint8_t *bar;
47 	size_t rom_size;
48 };
49 
50 static const struct dev_entry ata_promise[] = {
51 	{0x105a, 0x4d38, NT, "Promise", "PDC20262 (FastTrak66/Ultra66)"},
52 	{0x105a, 0x0d30, NT, "Promise", "PDC20265 (FastTrak100 Lite/Ultra100)"},
53 	{0x105a, 0x4d30, OK, "Promise", "PDC20267 (FastTrak100/Ultra100)"},
54 	{0},
55 };
56 
atapromise_limit_chip(struct flashchip * chip,size_t rom_size)57 static void atapromise_limit_chip(struct flashchip *chip, size_t rom_size)
58 {
59 	unsigned int i, size;
60 	unsigned int usable_erasers = 0;
61 
62 	size = chip->total_size * 1024;
63 
64 	/* Chip is small enough or already limited. */
65 	if (size <= rom_size)
66 		return;
67 
68 	/* Undefine all block_erasers that don't operate on the whole chip,
69 	 * and adjust the eraseblock size of those which do.
70 	 */
71 	for (i = 0; i < NUM_ERASEFUNCTIONS; ++i) {
72 		if (chip->block_erasers[i].eraseblocks[0].size != size) {
73 			chip->block_erasers[i].eraseblocks[0].count = 0;
74 			chip->block_erasers[i].block_erase = NO_BLOCK_ERASE_FUNC;
75 		} else {
76 			chip->block_erasers[i].eraseblocks[0].size = rom_size;
77 			usable_erasers++;
78 		}
79 	}
80 
81 	if (usable_erasers) {
82 		chip->total_size = rom_size / 1024;
83 		if (chip->page_size > rom_size)
84 			chip->page_size = rom_size;
85 	} else {
86 		msg_pdbg("Failed to adjust size of chip \"%s\" (%d kB).\n", chip->name, chip->total_size);
87 	}
88 }
89 
atapromise_chip_writeb(const struct flashctx * flash,uint8_t val,chipaddr addr)90 static void atapromise_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
91 {
92 	const struct atapromise_data *data = flash->mst->par.data;
93 	uint32_t value;
94 
95 	atapromise_limit_chip(flash->chip, data->rom_size);
96 	value = (data->rom_base_addr + (addr & ADDR_MASK)) << 8 | val;
97 	OUTL(value, data->io_base_addr + 0x14);
98 }
99 
atapromise_chip_readb(const struct flashctx * flash,const chipaddr addr)100 static uint8_t atapromise_chip_readb(const struct flashctx *flash, const chipaddr addr)
101 {
102 	const struct atapromise_data *data = flash->mst->par.data;
103 
104 	atapromise_limit_chip(flash->chip, data->rom_size);
105 	return pci_mmio_readb(data->bar + (addr & ADDR_MASK));
106 }
107 
atapromise_shutdown(void * par_data)108 static int atapromise_shutdown(void *par_data)
109 {
110 	free(par_data);
111 	return 0;
112 }
113 
114 static const struct par_master par_master_atapromise = {
115 	.chip_readb	= atapromise_chip_readb,
116 	.chip_writeb	= atapromise_chip_writeb,
117 	.shutdown	= atapromise_shutdown,
118 };
119 
atapromise_init(const struct programmer_cfg * cfg)120 static int atapromise_init(const struct programmer_cfg *cfg)
121 {
122 	struct pci_dev *dev = NULL;
123 	uint32_t io_base_addr;
124 	uint32_t rom_base_addr;
125 	uint8_t *bar;
126 	size_t rom_size;
127 
128 	if (rget_io_perms())
129 		return 1;
130 
131 	dev = pcidev_init(cfg, ata_promise, PCI_BASE_ADDRESS_4);
132 	if (!dev)
133 		return 1;
134 
135 	io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4) & 0xfffe;
136 	if (!io_base_addr) {
137 		return 1;
138 	}
139 
140 	/* Not exactly sure what this does, because flashing seems to work
141 	 * well without it. However, PTIFLASH does it, so we do it too.
142 	 */
143 	OUTB(1, io_base_addr + 0x10);
144 
145 	rom_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5);
146 	if (!rom_base_addr) {
147 		msg_pdbg("Failed to read BAR5\n");
148 		return 1;
149 	}
150 
151 	rom_size = dev->rom_size > MAX_ROM_DECODE ? MAX_ROM_DECODE : dev->rom_size;
152 	bar = (uint8_t*)rphysmap("Promise", rom_base_addr, rom_size);
153 	if (bar == ERROR_PTR) {
154 		return 1;
155 	}
156 
157 	msg_pwarn("Do not use this device as a generic programmer. It will leave anything outside\n"
158 		  "the first %zu kB of the flash chip in an undefined state. It works fine for the\n"
159 		  "purpose of updating the firmware of this device (padding may necessary).\n",
160 		  rom_size / 1024);
161 
162 	struct atapromise_data *data = calloc(1, sizeof(*data));
163 	if (!data) {
164 		msg_perr("Unable to allocate space for PAR master data\n");
165 		return 1;
166 	}
167 	data->io_base_addr = io_base_addr;
168 	data->rom_base_addr = rom_base_addr;
169 	data->bar = bar;
170 	data->rom_size = rom_size;
171 
172 	max_rom_decode.parallel = rom_size;
173 	return register_par_master(&par_master_atapromise, BUS_PARALLEL, data);
174 }
175 
176 const struct programmer_entry programmer_atapromise = {
177 	.name			= "atapromise",
178 	.type			= PCI,
179 	.devs.dev		= ata_promise,
180 	.init			= atapromise_init,
181 };
182