xref: /aosp_15_r20/external/flashrom/edi.c (revision 0d6140be3aa665ecc836e8907834fcd3e3b018fc)
1 /*
2  * This file is part of the flashrom project.
3  *
4  * Copyright (C) 2015 Paul Kocialkowski <[email protected]>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <string.h>
18 #include "flash.h"
19 #include "chipdrivers.h"
20 #include "ene.h"
21 #include "edi.h"
22 
23 static unsigned int edi_read_buffer_length = EDI_READ_BUFFER_LENGTH_DEFAULT;
24 
25 static const struct ene_chip ene_kb9012 = {
26 	.hwversion = ENE_KB9012_HWVERSION,
27 	.ediid = ENE_KB9012_EDIID,
28 };
29 
edi_write_cmd(unsigned char * cmd,unsigned short address,unsigned char data)30 static void edi_write_cmd(unsigned char *cmd, unsigned short address, unsigned char data)
31 {
32 	cmd[0] = EDI_WRITE; /* EDI write command. */
33 	cmd[1] = 0x00; /* Address is only 2 bytes. */
34 	cmd[2] = (address >> 8) & 0xff; /* Address higher byte. */
35 	cmd[3] = (address >> 0) & 0xff; /* Address lower byte. */
36 	cmd[4] = data; /* Write data. */
37 }
38 
edi_read_cmd(unsigned char * cmd,unsigned short address)39 static void edi_read_cmd(unsigned char *cmd, unsigned short address)
40 {
41 	cmd[0] = EDI_READ; /* EDI read command. */
42 	cmd[1] = 0x00; /* Address is only 2 bytes. */
43 	cmd[2] = (address >> 8) & 0xff; /* Address higher byte. */
44 	cmd[3] = (address >> 0) & 0xff; /* Address lower byte. */
45 }
46 
edi_write(struct flashctx * flash,unsigned short address,unsigned char data)47 static int edi_write(struct flashctx *flash, unsigned short address, unsigned char data)
48 {
49 	unsigned char cmd[5];
50 	int rc;
51 
52 	edi_write_cmd(cmd, address, data);
53 
54 	rc = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
55 	if (rc)
56 		return -1;
57 
58 	return 0;
59 }
60 
edi_read_byte(struct flashctx * flash,unsigned short address,unsigned char * data)61 static int edi_read_byte(struct flashctx *flash, unsigned short address, unsigned char *data)
62 {
63 	unsigned char cmd[4];
64 	unsigned char buffer[edi_read_buffer_length];
65 	unsigned int index;
66 	unsigned int i;
67 	int rc;
68 
69 	edi_read_cmd(cmd, address);
70 
71 	rc = spi_send_command(flash, sizeof(cmd), sizeof(buffer), cmd, buffer);
72 	if (rc)
73 		return -1;
74 
75 	index = 0;
76 
77 	for (i = 0; i < sizeof(buffer); i++) {
78 		index = i;
79 
80 		if (buffer[i] == EDI_NOT_READY)
81 			continue;
82 
83 		if (buffer[i] == EDI_READY) {
84 			if (i == (sizeof(buffer) - 1)) {
85 				/*
86 				 * Buffer size was too small for receiving the value.
87 				 * This is as good as getting only EDI_NOT_READY.
88 				 */
89 
90 				buffer[i] = EDI_NOT_READY;
91 				break;
92 			}
93 
94 			*data = buffer[i + 1];
95 			return 0;
96 		}
97 	}
98 
99 	if (buffer[index] == EDI_NOT_READY)
100 		return -EDI_NOT_READY;
101 
102 	return -1;
103 }
104 
edi_read(struct flashctx * flash,unsigned short address,unsigned char * data)105 static int edi_read(struct flashctx *flash, unsigned short address, unsigned char *data)
106 {
107 	int rc;
108 
109 	do {
110 		rc = edi_read_byte(flash, address, data);
111 		if (rc == -EDI_NOT_READY) {
112 			/*
113 			 * Buffer size is increased, one step at a time,
114 			 * to hold more data if we only catch EDI_NOT_READY.
115 			 * Once CS is deasserted, no more data will be sent by the EC,
116 			 * so we cannot keep reading afterwards and have to start a new
117 			 * transaction with a longer buffer, to be safe.
118 			 */
119 
120 			if (edi_read_buffer_length < EDI_READ_BUFFER_LENGTH_MAX) {
121 				msg_pwarn("%s: Retrying read with greater buffer length!\n", __func__);
122 				edi_read_buffer_length++;
123 			} else {
124 				msg_perr("%s: Maximum buffer length reached and data still not ready!\n", __func__);
125 				return -1;
126 			}
127 		} else if (rc < 0) {
128 			return -1;
129 		}
130 	} while (rc == -EDI_NOT_READY);
131 
132 	return 0;
133 }
134 
edi_disable(struct flashctx * flash)135 static int edi_disable(struct flashctx *flash)
136 {
137 	unsigned char cmd = EDI_DISABLE;
138 	int rc;
139 
140 	rc = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL);
141 	if (rc)
142 		return -1;
143 
144 	return 0;
145 }
146 
edi_chip_probe(struct flashctx * flash,const struct ene_chip * chip)147 static int edi_chip_probe(struct flashctx *flash, const struct ene_chip *chip)
148 {
149 	unsigned char hwversion;
150 	unsigned char ediid;
151 	int rc;
152 
153 	rc = edi_read(flash, ENE_EC_HWVERSION, &hwversion);
154 	if (rc < 0) {
155 		msg_cdbg("%s: reading hwversion failed\n", __func__);
156 		return 0;
157 	}
158 
159 	rc = edi_read(flash, ENE_EC_EDIID, &ediid);
160 	if (rc < 0) {
161 		msg_cdbg("%s: reading ediid failed\n", __func__);
162 		return 0;
163 	}
164 
165 	msg_cdbg("%s: hwversion 0x%02x, ediid 0x%02x\n", __func__, hwversion, ediid);
166 
167 	if (chip->hwversion == hwversion && chip->ediid == ediid)
168 		return 1;
169 
170 	return 0;
171 }
172 
edi_spi_enable(struct flashctx * flash)173 static int edi_spi_enable(struct flashctx *flash)
174 {
175 	unsigned char buffer;
176 	int rc;
177 
178 	rc = edi_read(flash, ENE_XBI_EFCFG, &buffer);
179 	if (rc < 0)
180 		return -1;
181 
182 	buffer |= ENE_XBI_EFCFG_CMD_WE;
183 
184 	rc = edi_write(flash, ENE_XBI_EFCFG, buffer);
185 	if (rc < 0)
186 		return -1;
187 
188 	return 0;
189 }
190 
edi_spi_disable(struct flashctx * flash)191 static int edi_spi_disable(struct flashctx *flash)
192 {
193 	unsigned char buffer;
194 	int rc;
195 
196 	rc = edi_read(flash, ENE_XBI_EFCFG, &buffer);
197 	if (rc < 0)
198 		return -1;
199 
200 	buffer &= ~ENE_XBI_EFCFG_CMD_WE;
201 
202 	rc = edi_write(flash, ENE_XBI_EFCFG, buffer);
203 	if (rc < 0)
204 		return -1;
205 
206 	return 0;
207 }
208 
edi_spi_busy(struct flashctx * flash)209 static int edi_spi_busy(struct flashctx *flash)
210 {
211 	unsigned char buffer;
212 	int rc;
213 
214 	rc = edi_read(flash, ENE_XBI_EFCFG, &buffer);
215 	if (rc < 0)
216 		return -1;
217 
218 	return !!(buffer & ENE_XBI_EFCFG_BUSY);
219 }
220 
edi_spi_address(struct flashctx * flash,unsigned int start,unsigned int address)221 static int edi_spi_address(struct flashctx *flash, unsigned int start, unsigned int address)
222 {
223 	int rc;
224 
225 	if ((address == start) || (((address - 1) & 0xff) != (address & 0xff))) {
226 		rc = edi_write(flash, ENE_XBI_EFA0, ((address & 0xff) >> 0));
227 		if (rc < 0)
228 			return -1;
229 	}
230 
231 	if ((address == start) || (((address - 1) & 0xff00) != (address & 0xff00))) {
232 		rc = edi_write(flash, ENE_XBI_EFA1, ((address & 0xff00) >> 8));
233 		if (rc < 0)
234 			return -1;
235 	}
236 
237 	if ((address == start) || (((address - 1) & 0xff0000) != (address & 0xff0000))) {
238 		rc = edi_write(flash, ENE_XBI_EFA2, ((address & 0xff0000) >> 16));
239 		if (rc < 0)
240 			return -1;
241 	}
242 
243 	return 0;
244 }
245 
edi_8051_reset(struct flashctx * flash)246 static int edi_8051_reset(struct flashctx *flash)
247 {
248 	unsigned char buffer;
249 	int rc;
250 
251 	rc = edi_read(flash, ENE_EC_PXCFG, &buffer);
252 	if (rc < 0)
253 		return -1;
254 
255 	buffer |= ENE_EC_PXCFG_8051_RESET;
256 
257 	rc = edi_write(flash, ENE_EC_PXCFG, buffer);
258 	if (rc < 0)
259 		return -1;
260 
261 	return 0;
262 }
263 
edi_8051_execute(struct flashctx * flash)264 static int edi_8051_execute(struct flashctx *flash)
265 {
266 	unsigned char buffer;
267 	int rc;
268 
269 	rc = edi_read(flash, ENE_EC_PXCFG, &buffer);
270 	if (rc < 0)
271 		return -1;
272 
273 	buffer &= ~ENE_EC_PXCFG_8051_RESET;
274 
275 	rc = edi_write(flash, ENE_EC_PXCFG, buffer);
276 	if (rc < 0)
277 		return -1;
278 
279 	return 0;
280 }
281 
edi_chip_block_erase(struct flashctx * flash,unsigned int page,unsigned int size)282 int edi_chip_block_erase(struct flashctx *flash, unsigned int page, unsigned int size)
283 {
284 	unsigned int timeout = 64;
285 	int rc;
286 
287 	if (size != flash->chip->page_size) {
288 		msg_perr("%s: Block erase size is not page size!\n", __func__);
289 		return -1;
290 	}
291 
292 	rc = edi_spi_enable(flash);
293 	if (rc < 0) {
294 		msg_perr("%s: Unable to enable SPI!\n", __func__);
295 		return -1;
296 	}
297 
298 	rc = edi_spi_address(flash, page, page);
299 	if (rc < 0)
300 		return -1;
301 
302 	rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_ERASE);
303 	if (rc < 0)
304 		return -1;
305 
306 	while (edi_spi_busy(flash) == 1 && timeout) {
307 		programmer_delay(flash, 10);
308 		timeout--;
309 	}
310 
311 	if (!timeout) {
312 		msg_perr("%s: Timed out waiting for SPI not busy!\n", __func__);
313 		return -1;
314 	}
315 
316 	rc = edi_spi_disable(flash);
317 	if (rc < 0) {
318 		msg_perr("%s: Unable to disable SPI!\n", __func__);
319 		return -1;
320 	}
321 
322 	return 0;
323 }
324 
edi_chip_write(struct flashctx * flash,const uint8_t * buf,unsigned int start,unsigned int len)325 int edi_chip_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
326 {
327 	unsigned int address = start;
328 	unsigned int pages;
329 	unsigned int timeout;
330 	unsigned int i, j;
331 	int rc;
332 
333 	if ((start % flash->chip->page_size) != 0) {
334 		msg_perr("%s: Start address is not page-aligned!\n", __func__);
335 		return -1;
336 	}
337 
338 	if ((len % flash->chip->page_size) != 0) {
339 		msg_perr("%s: Length is not page-aligned!\n", __func__);
340 		return -1;
341 	}
342 
343 	pages = len / flash->chip->page_size;
344 
345 	rc = edi_spi_enable(flash);
346 	if (rc < 0) {
347 		msg_perr("%s: Unable to enable SPI!\n", __func__);
348 		return -1;
349 	}
350 
351 	for (i = 0; i < pages; i++) {
352 		timeout = 64;
353 
354 		/* Clear page buffer. */
355 		rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_HVPL_CLEAR);
356 		if (rc < 0)
357 			return -1;
358 
359 		for (j = 0; j < flash->chip->page_size; j++) {
360 			rc = edi_spi_address(flash, start, address);
361 			if (rc < 0)
362 				return -1;
363 
364 			rc = edi_write(flash, ENE_XBI_EFDAT, *buf);
365 			if (rc < 0)
366 				return -1;
367 
368 			rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_HVPL_LATCH);
369 			if (rc < 0)
370 				return -1;
371 
372 			buf++;
373 			address++;
374 		}
375 
376 		/* Program page buffer to flash. */
377 		rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_PROGRAM);
378 		if (rc < 0)
379 			return -1;
380 
381 		while (edi_spi_busy(flash) == 1 && timeout) {
382 			programmer_delay(flash, 10);
383 			timeout--;
384 		}
385 
386 		if (!timeout) {
387 			msg_perr("%s: Timed out waiting for SPI not busy!\n", __func__);
388 			return -1;
389 		}
390 	}
391 
392 	rc = edi_spi_disable(flash);
393 	if (rc < 0) {
394 		msg_perr("%s: Unable to disable SPI!\n", __func__);
395 		return -1;
396 	}
397 
398 	return 0;
399 }
400 
edi_chip_read(struct flashctx * flash,uint8_t * buf,unsigned int start,unsigned int len)401 int edi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
402 {
403 	unsigned int address = start;
404 	unsigned int i;
405 	unsigned int timeout;
406 	int rc;
407 
408 	rc = edi_spi_enable(flash);
409 	if (rc < 0) {
410 		msg_perr("%s: Unable to enable SPI!\n", __func__);
411 		return -1;
412 	}
413 
414 	/*
415 	 * EDI brings such a drastic overhead that there is about no need to
416 	 * have any delay in between calls. The EDI protocol will handle wait
417 	 * I/O times on its own anyway.
418 	 */
419 
420 	for (i = 0; i < len; i++) {
421 		timeout = 64;
422 
423 		rc = edi_spi_address(flash, start, address);
424 		if (rc < 0)
425 			return -1;
426 
427 		rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_READ);
428 		if (rc < 0)
429 			return -1;
430 
431 		do {
432 			rc = edi_read(flash, ENE_XBI_EFDAT, buf);
433 			if (rc == 0)
434 				break;
435 
436 			/* Just in case. */
437 			while (edi_spi_busy(flash) == 1 && timeout) {
438 				programmer_delay(flash, 10);
439 				timeout--;
440 			}
441 
442 			if (!timeout) {
443 				msg_perr("%s: Timed out waiting for SPI not busy!\n", __func__);
444 				return -1;
445 			}
446 		} while (1);
447 
448 		buf++;
449 		address++;
450 	}
451 
452 	rc = edi_spi_disable(flash);
453 	if (rc < 0) {
454 		msg_perr("%s: Unable to disable SPI!\n", __func__);
455 		return -1;
456 	}
457 
458 	return 0;
459 }
460 
edi_shutdown(void * data)461 static int edi_shutdown(void *data)
462 {
463 	struct flashctx *flash;
464 	int rc;
465 
466 	if (data == NULL)
467 		return -1;
468 
469 	flash = (struct flashctx *)data;
470 
471 	rc = edi_8051_execute(flash);
472 	if (rc < 0) {
473 		msg_perr("%s: Unable to execute 8051!\n", __func__);
474 		return -1;
475 	}
476 
477 	rc = edi_disable(flash);
478 	if (rc < 0) {
479 		msg_perr("%s: Unable to disable EDI!\n", __func__);
480 		return -1;
481 	}
482 
483 	return 0;
484 }
485 
edi_probe_kb9012(struct flashctx * flash)486 int edi_probe_kb9012(struct flashctx *flash)
487 {
488 	int probe;
489 	int rc;
490 	unsigned char hwversion;
491 
492 	/*
493 	 * ENE chips enable EDI by detecting a clock frequency between 1 MHz and
494 	 * 8 MHz. In many cases, the chip won't be able to both detect the clock
495 	 * signal and serve the associated request at the same time.
496 	 *
497 	 * Thus, a dummy read has to be added to ensure that EDI is enabled and
498 	 * operational starting from the next request. This dummy read below
499 	 * draws the chip's attention and as result the chip enables its EDI.
500 	 */
501 	edi_read(flash, ENE_EC_HWVERSION, &hwversion);
502 
503 	probe = edi_chip_probe(flash, &ene_kb9012);
504 	if (!probe)
505 		return 0;
506 
507 	rc = edi_8051_reset(flash);
508 	if (rc < 0) {
509 		msg_perr("%s: Unable to reset 8051!\n", __func__);
510 		return 0;
511 	}
512 
513 	register_shutdown(edi_shutdown, (void *)flash);
514 
515 	return 1;
516 }
517