1 /*============================================================================== 2 Copyright(c) 2017 Intel Corporation 3 4 Permission is hereby granted, free of charge, to any person obtaining a 5 copy of this software and associated documentation files(the "Software"), 6 to deal in the Software without restriction, including without limitation 7 the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 and / or sell copies of the Software, and to permit persons to whom the 9 Software is furnished to do so, subject to the following conditions: 10 11 The above copyright notice and this permission notice shall be included 12 in all copies or substantial portions of the Software. 13 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 OTHER DEALINGS IN THE SOFTWARE. 21 ============================================================================*/ 22 23 #include "GmmCachePolicyConditionals.h" 24 25 #define EDRAM (SKU(FtrEDram)) 26 #define FBLLC (SKU(FtrFrameBufferLLC)) 27 28 //eDRAM-Only caching, for a usage that might be encrypted, must use ENCRYPTED_PARTIALS_EDRAM 29 #define ENCRYPTED_PARTIALS_EDRAM (EDRAM && !(pGmmLibContext->GetWaTable().WaEncryptedEdramOnlyPartials)) 30 31 // Cache Policy Definition 32 // AOM = Do not allocate on miss (0 = allocate on miss [normal cache behavior], 1 = don't allocate on miss) 33 // LeCC_SCC = LLC/eLLC skip caching control (disabled if LeCC_SCC = 0) 34 // L3_SCC = L3 skip caching control (disabled if L3_SCC = 0) 35 // SSO = Override MIDI self snoop settings (1 = never send to uncore, 3 = always send to uncore, 0 = [default] No override ) 36 // CoS = Class of Service ( allowed values 1, 2, 3 for class IDs 1, 2, 3 respectively, default class 1 => driver overrides 0->1) 37 // HDCL1 = HDC L1 cache control (1 = cached in HDC L1, 0 = not cached in HDC L1) 38 // Faster PushWrite(Gen10+) used iff !WT, eLLC-only cacheable - Globally visible surface (eg display surface) should be marked WT 39 //***************************************************************************************************************/ 40 // USAGE TYPE , LLC , ELLC , L3 , WT , AGE , LeCC_SCC , L3_SCC, SSO, CoS, HDCL1 ) 41 /****************************************************************************************************************/ 42 43 // KMD Usages 44 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BATCH_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 45 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMP_FRAME_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 46 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SWITCH_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 47 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CURSOR , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 48 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAY_STATIC_IMG_FOR_SMOOTH_ROTATION_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 49 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DUMMY_PAGE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 50 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GDI_SURFACE , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 51 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GENERIC_KMD_RESOURCE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 52 // GMM_RESOURCE_USAGE_GFX_RING is only used if WaEnableRingHostMapping is enabled. 53 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GFX_RING , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 54 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GTT_TRANSFER_REGION , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 55 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HW_CONTEXT , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 56 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATE_MANAGER_KERNEL_STATE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 57 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_STAGING_SURFACE , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 58 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MBM_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 59 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_NNDI_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 60 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OVERLAY_MBM , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 61 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRIMARY_SURFACE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 62 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SCREEN_PROTECTION_INTERMEDIATE_SURFACE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 63 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADOW_SURFACE , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 64 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SM_SCRATCH_STATE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 65 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATUS_PAGE , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 66 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TIMER_PERF_QUEUE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 67 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNKNOWN , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 68 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNMAP_PAGING_RESERVED_GTT_DMA_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 69 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VSC_BATCH_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 70 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WA_BATCH_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 71 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_OCA_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 72 73 74 // 75 // 3D Usages 76 // 77 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UMD_BATCH_BUFFER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 78 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BINDING_TABLE_POOL , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 79 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CCS , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 80 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONSTANT_BUFFER_POOL , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 81 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEPTH_BUFFER , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 82 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAYABLE_RENDER_TARGET , FBLLC, ENCRYPTED_PARTIALS_EDRAM, FBLLC, !FBLLC && ENCRYPTED_PARTIALS_EDRAM, 3 , 0, 0, 0, 0, 0); 83 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GATHER_POOL , 0 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 84 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_SURFACE_STATE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 85 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_DYNAMIC_STATE , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 86 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 87 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE_UC , 0 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 88 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_STATELESS_DATA_PORT , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 89 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INDIRECT_OBJECT , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 90 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INSTRUCTION , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 91 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HIZ , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 92 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 93 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MCS , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 94 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PUSH_CONSTANT_BUFFER , 0 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 95 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PULL_CONSTANT_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 1); 96 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_QUERY , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 97 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 98 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 99 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STAGING , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 100 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STENCIL_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 101 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAM_OUTPUT_BUFFER , 0 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 102 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_POOL , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 103 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PROCEDURAL_TEXTURE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 104 105 // Tiled Resource 106 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_DEPTH_BUFFER , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 107 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_HIZ , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 108 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_MCS , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 109 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_CCS , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 110 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 111 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET_AND_SHADER_RESOURCE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 112 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_SHADER_RESOURCE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 113 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_UAV , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 114 115 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UAV , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 116 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 117 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OGL_WSTN_VERTEX_BUFFER , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 118 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET_AND_SHADER_RESOURCE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 119 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WDDM_HISTORY_BUFFER , 0 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 120 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SAVE_RESTORE , 1 , 1 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 121 122 // 123 // CM USAGES 124 // 125 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_SurfaceState, 1 , 1 , 1 , 0 ,3 , 0, 0, 0, 0, 0); 126 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_L3_SurfaceState, 1 , 1 , 0 , 0 ,3, 0, 0, 0, 0, 0); 127 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_LLC_ELLC_SurfaceState, 0 , 0 , 1 , 0 ,3, 0, 0, 0, 0, 0); 128 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_LLC_SurfaceState, 0 , 1 , 1 , 0 ,3, 0, 0, 0, 0, 0); 129 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_ELLC_SurfaceState, 1 , 0 , 1 , 0 ,3, 0, 0, 0, 0, 0); 130 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_LLC_L3_SurfaceState, 0 , 1 , 0 , 0 ,3, 0, 0, 0, 0, 0); 131 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_ELLC_L3_SurfaceState, 1 , 0 , 0 , 0 ,3, 0, 0, 0, 0, 0); 132 DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_CACHE_SurfaceState, 0 , 0 , 0 , 0 ,3, 0, 0, 0, 0, 0); 133 134 // 135 // MP USAGES 136 // 137 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_BEGIN, 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0, 0); 138 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT, 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0, 0); 139 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState, 1 , EDRAM, 1 , 0 , 1, 0, 0, 0, 0, 0); 140 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_AGE3_SurfaceState, 1 , EDRAM, 1 , 0 , 3, 0, 0, 0, 0, 0); 141 DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_END, 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0, 0); 142 143 // MHW - SFC 144 DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_CurrentOutputSurface, 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0, 0); 145 DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_AvsLineBufferSurface, 1 , EDRAM, 1 , 0 , 1, 0, 0, 0, 0, 0); 146 DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_IefLineBufferSurface, 1 , EDRAM, 1 , 0 , 1, 0, 0, 0, 0, 0); 147 148 //Media GMM Resource USAGES 149 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRE_DEBLOCKING_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 150 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_POST_DEBLOCKING_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 151 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 152 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_DECODE , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 153 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAMOUT_DATA_CODEC , 0 , 0 , 0 , 0 , 3, 0, 0, 0, 0, 0); 154 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INTRA_ROWSTORE_SCRATCH_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 155 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_SCRATCH_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 156 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 157 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MACROBLOCK_STATUS_BUFFER_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 158 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFX_INDIRECT_BITSTREAM_OBJECT_DECODE , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 159 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFX_INDIRECT_MV_OBJECT_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 160 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFD_INDIRECT_IT_COEF_OBJECT_DECODE , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 161 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 162 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BSDMPC_ROWSTORE_SCRATCH_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 163 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MPR_ROWSTORE_SCRATCH_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 164 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BITPLANE_READ_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 165 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_AACSBIT_VECTOR_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 166 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DIRECTMV_BUFFER_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 167 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_CURR_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 168 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_REF_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 169 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 170 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 171 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE_DST , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 172 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 173 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_ME_DISTORTION_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 174 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PAK_OBJECT_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 175 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_FLATNESS_CHECK_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 176 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 177 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC , 1 , 0 , 0 , 0 , 3, 0, 0, 0, 0, 0); 178 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VDENC_STREAMIN_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 179 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MB_QP_CODEC , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 180 181 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 182 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 183 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_PROBABILITY_COUNTER_BUFFER_CODEC , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 184 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HUC_VIRTUAL_ADDR_REGION_BUFFER_CODEC , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 185 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SIZE_STREAMOUT_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 186 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMPRESSED_HEADER_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 187 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PROBABILITY_DELTA_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 188 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MV_CODEC , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 189 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_STATUS_ERROR_CODEC , 0 , 0 , 0 , 0 , 3, 0, 0, 0, 0, 0); 190 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_LCU_ILDB_STREAMOUT_CODEC , 0 , 0 , 0 , 0 , 3, 0, 0, 0, 0, 0); 191 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_PROBABILITY_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 192 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_SEGMENT_ID_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 193 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_HVD_ROWSTORE_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 194 195 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MACROBLOCK_ILDB_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0 , 0 , 3, 0, 0, 0, 0, 0); 196 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SSE_SRC_PIXEL_ROW_STORE_BUFFER_CODEC , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 197 198 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_UNCACHED , 0 , 0 , 0 , 0 , 3, 0, 0, 0, 0, 0); 199 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_ONLY , 0 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 200 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_LLC_ONLY , 1 , EDRAM , 0 , 0 , 3, 0, 0, 0, 0, 0); 201 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_LLC_L3 , 1 , EDRAM , 1 , 0 , 3, 0, 0, 0, 0, 0); 202 203 204 205 /**********************************************************************************/ 206 207 // 208 // OCL Usages 209 // 210 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 211 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 212 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CSR_UC , 0 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 213 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 214 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_IMAGE , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 215 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 216 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST_HDC , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 217 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SCRATCH , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 218 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRIVATE_MEM , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 219 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRINTF_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 220 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_STATE_HEAP_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 221 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 222 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER_CACHELINE_MISALIGNED , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 223 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_ISH_HEAP_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 224 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TAG_MEMORY_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 225 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TEXTURE_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 0, 0, 0); 226 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_IMAGE_FROM_BUFFER , 1 , 0 , 0 , 0 , 3 , 0, 0, 0, 0, 0); 227 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SELF_SNOOP_BUFFER , 1 , 0 , 1 , 0 , 3 , 0, 0, 3, 0, 0); 228 /**********************************************************************************/ 229 230 // Cross Adapter 231 DEFINE_CACHE_ELEMENT( GMM_RESOURCE_USAGE_XADAPTER_SHARED_RESOURCE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 232 /**********************************************************************************/ 233 234 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CAMERA_CAPTURE , CAM$, 0 , 0 , 0 , CAM$ , 0, 0, 0, 0, 0); 235 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMMAND_STREAMER , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 236 237 238 // Uncacheable copies 239 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_SOURCE , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 240 DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_DEST , 0 , 0 , 0 , 0 , 0 , 0, 0, 0, 0, 0); 241 242 #include "GmmCachePolicyUndefineConditionals.h" 243