1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Daniel Vetter <[email protected]>
25 *
26 */
27
28 #include "igt.h"
29 #include <stdlib.h>
30 #include <stdio.h>
31 #include <string.h>
32 #include <fcntl.h>
33 #include <inttypes.h>
34 #include <errno.h>
35 #include <sys/stat.h>
36 #include <sys/time.h>
37 #include <signal.h>
38 #include <sys/wait.h>
39
40 #include <drm.h>
41
42
43 IGT_TEST_DESCRIPTION("Test persistent relocations as used by uxa/libva.");
44
45 /*
46 * Testcase: Persistent relocations as used by uxa/libva
47 *
48 * Note: this currently fails on byt/full-ppgtt
49 * https://bugs.freedesktop.org/show_bug.cgi?id=84859
50 */
51
52 static drm_intel_bufmgr *bufmgr;
53 struct intel_batchbuffer *batch;
54
55 uint32_t blob[2048*2048];
56 #define NUM_TARGET_BOS 16
57 drm_intel_bo *pc_target_bo[NUM_TARGET_BOS];
58 drm_intel_bo *dummy_bo;
59 drm_intel_bo *special_bos[NUM_TARGET_BOS];
60 uint32_t relocs_bo_handle[NUM_TARGET_BOS];
61 void *gtt_relocs_ptr[NUM_TARGET_BOS];
62 uint32_t devid;
63 int special_reloc_ofs;
64 int special_line_ofs;
65 int special_batch_len;
66
67 int small_pitch = 64;
68
create_special_bo(void)69 static drm_intel_bo *create_special_bo(void)
70 {
71 drm_intel_bo *bo;
72 uint32_t data[1024];
73 int len = 0;
74 #define BATCH(dw) data[len++] = (dw);
75
76 memset(data, 0, 4096);
77 bo = drm_intel_bo_alloc(bufmgr, "special batch", 4096, 4096);
78
79 if (intel_gen(devid) >= 8) {
80 BATCH(MI_NOOP);
81 BATCH(XY_COLOR_BLT_CMD_NOLEN | 5 |
82 COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
83 } else {
84 BATCH(XY_COLOR_BLT_CMD_NOLEN | 4 |
85 COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
86 }
87
88 BATCH((3 << 24) | (0xf0 << 16) | small_pitch);
89 special_line_ofs = 4*len;
90 BATCH(0);
91 BATCH(1 << 16 | 1);
92 special_reloc_ofs = 4*len;
93 BATCH(0);
94 if (intel_gen(devid) >= 8)
95 BATCH(0); /* FIXME */
96 BATCH(0xdeadbeef);
97
98 #define CMD_POLY_STIPPLE_OFFSET 0x7906
99 /* batchbuffer end */
100 if (IS_GEN5(batch->devid)) {
101 BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
102 BATCH(0);
103 }
104 igt_assert_eq(len % 2, 0);
105 BATCH(MI_NOOP);
106 BATCH(MI_BATCH_BUFFER_END);
107
108 drm_intel_bo_subdata(bo, 0, 4096, data);
109 special_batch_len = len*4;
110
111 return bo;
112 }
113
emit_dummy_load(int pitch)114 static void emit_dummy_load(int pitch)
115 {
116 int i;
117 uint32_t tile_flags = 0;
118
119 if (IS_965(devid)) {
120 pitch /= 4;
121 tile_flags = XY_SRC_COPY_BLT_SRC_TILED |
122 XY_SRC_COPY_BLT_DST_TILED;
123 }
124
125 for (i = 0; i < 5; i++) {
126 BLIT_COPY_BATCH_START(tile_flags);
127 OUT_BATCH((3 << 24) | /* 32 bits */
128 (0xcc << 16) | /* copy ROP */
129 pitch);
130 OUT_BATCH(0 << 16 | 1024);
131 OUT_BATCH((2048) << 16 | (2048));
132 OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
133 OUT_BATCH(0 << 16 | 0);
134 OUT_BATCH(pitch);
135 OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
136 ADVANCE_BATCH();
137
138 if (batch->gen >= 6) {
139 BEGIN_BATCH(3, 0);
140 OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
141 OUT_BATCH(0);
142 OUT_BATCH(0);
143 ADVANCE_BATCH();
144 }
145 }
146 intel_batchbuffer_flush(batch);
147 }
148
faulting_reloc_and_emit(int fd,drm_intel_bo * target_bo,void * gtt_relocs,drm_intel_bo * special_bo)149 static void faulting_reloc_and_emit(int fd, drm_intel_bo *target_bo,
150 void *gtt_relocs, drm_intel_bo *special_bo)
151 {
152 struct drm_i915_gem_execbuffer2 execbuf;
153 struct drm_i915_gem_exec_object2 exec[2];
154 int ring;
155
156 if (intel_gen(devid) >= 6)
157 ring = I915_EXEC_BLT;
158 else
159 ring = 0;
160
161 exec[0].handle = target_bo->handle;
162 exec[0].relocation_count = 0;
163 exec[0].relocs_ptr = 0;
164 exec[0].alignment = 0;
165 exec[0].offset = 0;
166 exec[0].flags = 0;
167 exec[0].rsvd1 = 0;
168 exec[0].rsvd2 = 0;
169
170 exec[1].handle = special_bo->handle;
171 exec[1].relocation_count = 1;
172 /* A newly mmap gtt bo will fault on first access. */
173 exec[1].relocs_ptr = to_user_pointer(gtt_relocs);
174 exec[1].alignment = 0;
175 exec[1].offset = 0;
176 exec[1].flags = 0;
177 exec[1].rsvd1 = 0;
178 exec[1].rsvd2 = 0;
179
180 execbuf.buffers_ptr = to_user_pointer(exec);
181 execbuf.buffer_count = 2;
182 execbuf.batch_start_offset = 0;
183 execbuf.batch_len = special_batch_len;
184 execbuf.cliprects_ptr = 0;
185 execbuf.num_cliprects = 0;
186 execbuf.DR1 = 0;
187 execbuf.DR4 = 0;
188 execbuf.flags = ring;
189 i915_execbuffer2_set_context_id(execbuf, 0);
190 execbuf.rsvd2 = 0;
191
192 gem_execbuf(fd, &execbuf);
193 }
194
do_test(int fd,bool faulting_reloc)195 static void do_test(int fd, bool faulting_reloc)
196 {
197 uint32_t tiling_mode = I915_TILING_X;
198 unsigned long pitch, act_size;
199 uint32_t test;
200 int i, repeat;
201
202 if (faulting_reloc)
203 igt_disable_prefault();
204
205 act_size = 2048;
206 dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size,
207 4, &tiling_mode, &pitch, 0);
208
209 drm_intel_bo_subdata(dummy_bo, 0, act_size*act_size*4, blob);
210
211 for (i = 0; i < NUM_TARGET_BOS; i++) {
212 struct drm_i915_gem_relocation_entry reloc[1];
213
214 special_bos[i] = create_special_bo();
215 pc_target_bo[i] = drm_intel_bo_alloc(bufmgr, "special batch", 4096, 4096);
216 igt_assert(pc_target_bo[i]->offset == 0);
217
218 reloc[0].offset = special_reloc_ofs;
219 reloc[0].delta = 0;
220 reloc[0].target_handle = pc_target_bo[i]->handle;
221 reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
222 reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
223 reloc[0].presumed_offset = 0;
224
225 relocs_bo_handle[i] = gem_create(fd, 4096);
226 gem_write(fd, relocs_bo_handle[i], 0, reloc, sizeof(reloc));
227 gtt_relocs_ptr[i] = gem_mmap__gtt(fd, relocs_bo_handle[i], 4096,
228 PROT_READ | PROT_WRITE);
229 }
230
231 /* repeat must be smaller than 4096/small_pitch */
232 for (repeat = 0; repeat < 8; repeat++) {
233 for (i = 0; i < NUM_TARGET_BOS; i++) {
234 uint32_t data[2] = {
235 (repeat << 16) | 0,
236 ((repeat + 1) << 16) | 1
237 };
238
239 drm_intel_bo_subdata(special_bos[i], special_line_ofs, 8, &data);
240
241 emit_dummy_load(pitch);
242 faulting_reloc_and_emit(fd, pc_target_bo[i],
243 gtt_relocs_ptr[i],
244 special_bos[i]);
245 }
246 }
247
248 /* Only check at the end to avoid unnecessarily synchronous behaviour. */
249 for (i = 0; i < NUM_TARGET_BOS; i++) {
250 /* repeat must be smaller than 4096/small_pitch */
251 for (repeat = 0; repeat < 8; repeat++) {
252 drm_intel_bo_get_subdata(pc_target_bo[i],
253 repeat*small_pitch, 4, &test);
254 igt_assert_f(test == 0xdeadbeef,
255 "mismatch in buffer %i: 0x%08x instead of 0xdeadbeef at offset %i\n",
256 i, test, repeat*small_pitch);
257 }
258 drm_intel_bo_unreference(pc_target_bo[i]);
259 drm_intel_bo_unreference(special_bos[i]);
260 gem_close(fd, relocs_bo_handle[i]);
261 munmap(gtt_relocs_ptr[i], 4096);
262 }
263
264 drm_intel_gem_bo_map_gtt(dummy_bo);
265 drm_intel_gem_bo_unmap_gtt(dummy_bo);
266
267 drm_intel_bo_unreference(dummy_bo);
268
269 if (faulting_reloc)
270 igt_enable_prefault();
271 }
272
273 #define INTERRUPT (1 << 0)
274 #define FAULTING (1 << 1)
275 #define THRASH (1 << 2)
276 #define THRASH_INACTIVE (1 << 3)
277 #define ALL_FLAGS (INTERRUPT | FAULTING | THRASH | THRASH_INACTIVE)
do_forked_test(int fd,unsigned flags)278 static void do_forked_test(int fd, unsigned flags)
279 {
280 int num_threads = sysconf(_SC_NPROCESSORS_ONLN);
281 struct igt_helper_process thrasher = {};
282
283 if (flags & (THRASH | THRASH_INACTIVE)) {
284 igt_fork_helper(&thrasher) {
285 uint64_t val;
286
287 val = DROP_RETIRE | DROP_BOUND | DROP_UNBOUND;
288 if (!(flags & THRASH_INACTIVE))
289 val |= DROP_ACTIVE | DROP_SHRINK_ALL;
290
291 while (1) {
292 usleep(1000);
293 igt_drop_caches_set(fd, val);
294 }
295 }
296 }
297
298 igt_fork(i, num_threads) {
299 /* re-create process local data */
300 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
301 batch = intel_batchbuffer_alloc(bufmgr, devid);
302
303 if (flags & INTERRUPT)
304 igt_fork_signal_helper();
305
306 do_test(fd, flags & FAULTING);
307
308 if (flags & INTERRUPT)
309 igt_stop_signal_helper();
310 }
311
312 igt_waitchildren();
313 if (flags & (THRASH | THRASH_INACTIVE))
314 igt_stop_helper(&thrasher);
315 }
316
317 int fd;
318
319 #define MAX_BLT_SIZE 128
320 igt_main
321 {
322 igt_skip_on_simulation();
323
324 memset(blob, 'A', sizeof(blob));
325
326 igt_fixture {
327 fd = drm_open_driver(DRIVER_INTEL);
328 igt_require_gem(fd);
329
330 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
331 /* disable reuse, otherwise the test fails */
332 //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
333 devid = intel_get_drm_devid(fd);
334 batch = intel_batchbuffer_alloc(bufmgr, devid);
335 }
336
337 igt_subtest("normal")
338 do_test(fd, false);
339
340 igt_fork_signal_helper();
341 igt_subtest("interruptible")
342 do_test(fd, false);
343 igt_stop_signal_helper();
344
345 for (unsigned flags = 0; flags <= ALL_FLAGS; flags++) {
346 if ((flags & THRASH) && (flags & THRASH_INACTIVE))
347 continue;
348
349 igt_subtest_f("forked%s%s%s%s",
350 flags & INTERRUPT ? "-interruptible" : "",
351 flags & FAULTING ? "-faulting-reloc" : "",
352 flags & THRASH ? "-thrashing" : "",
353 flags & THRASH_INACTIVE ? "-thrash-inactive" : "")
354 do_forked_test(fd, flags);
355 }
356
357 igt_fixture {
358 intel_batchbuffer_free(batch);
359 drm_intel_bufmgr_destroy(bufmgr);
360
361 close(fd);
362 }
363 }
364