1 /* 2 * Copyright (c) 2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file cm_rt_g11.h 24 //! \brief Contains Definitions for CM on Gen 11 25 //! 26 27 #ifndef __CM_RT_G11_H__ 28 #define __CM_RT_G11_H__ 29 30 #define ICL_L3_PLANE_DEFAULT CM_L3_PLANE_DEFAULT 31 #define ICL_L3_PLANE_1 CM_L3_PLANE_1 32 #define ICL_L3_PLANE_2 CM_L3_PLANE_2 33 #define ICL_L3_PLANE_3 CM_L3_PLANE_3 34 #define ICL_L3_PLANE_4 CM_L3_PLANE_4 35 #define ICL_L3_PLANE_5 CM_L3_PLANE_5 36 #define ICL_L3_CONFIG_COUNT 6 37 38 #define ICLLP_L3_PLANE_DEFAULT CM_L3_PLANE_DEFAULT 39 #define ICLLP_L3_PLANE_1 CM_L3_PLANE_1 40 #define ICLLP_L3_PLANE_2 CM_L3_PLANE_2 41 #define ICLLP_L3_PLANE_3 CM_L3_PLANE_3 42 #define ICLLP_L3_PLANE_4 CM_L3_PLANE_4 43 #define ICLLP_L3_PLANE_5 CM_L3_PLANE_5 44 #define ICLLP_L3_PLANE_6 CM_L3_PLANE_6 45 #define ICLLP_L3_PLANE_7 CM_L3_PLANE_7 46 #define ICLLP_L3_PLANE_8 CM_L3_PLANE_8 47 #define ICLLP_L3_CONFIG_COUNT 9 48 49 static const L3ConfigRegisterValues ICLLP_L3_PLANES[ICLLP_L3_CONFIG_COUNT] = 50 { // URB Rest DC RO Z Color UTC CB Sum (in KB) 51 {0x80000080, 0xD, 0, 0}, // 128 128 0 0 0 0 0 0 256 52 {0x70000080, 0x40804D, 0, 0}, // 128 112 0 0 64 64 0 16 384 53 {0x41C060, 0x40804D, 0, 0}, // 96 0 32 112 64 64 0 16 384 54 {0x2C040, 0x20C04D, 0, 0}, // 64 0 0 176 32 96 0 16 384 55 {0x30000040, 0x81004D, 0, 0}, // 64 48 0 0 128 128 0 16 384 56 {0xC040, 0x8000004D, 0, 0}, // 64 0 0 48 0 0 256 16 384 57 {0xA0000420, 0xD, 0, 0}, // 64 320 0 0 0 0 0 0 384 58 {0xC0000040, 0x4000000D, 0, 0}, // 64 192 0 0 0 0 128 0 384 59 {0xB0000040, 0x4000004D, 0, 0}, // 64 176 0 0 0 0 128 16 384 60 }; 61 62 #endif //__CM_RT_G11_H__ 63