xref: /aosp_15_r20/external/llvm/test/CodeGen/SystemZ/vec-move-12.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1; Test insertions of memory values into a nonzero index of an undef.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
4
5; Test v16i8 insertion into an undef, with an arbitrary index.
6define <16 x i8> @f1(i8 *%ptr) {
7; CHECK-LABEL: f1:
8; CHECK: vlrepb %v24, 0(%r2)
9; CHECK-NEXT: br %r14
10  %val = load i8, i8 *%ptr
11  %ret = insertelement <16 x i8> undef, i8 %val, i32 12
12  ret <16 x i8> %ret
13}
14
15; Test v16i8 insertion into an undef, with the first good index for VLVGP.
16define <16 x i8> @f2(i8 *%ptr) {
17; CHECK-LABEL: f2:
18; CHECK: {{vlrepb|vllezb}} %v24, 0(%r2)
19; CHECK-NEXT: br %r14
20  %val = load i8, i8 *%ptr
21  %ret = insertelement <16 x i8> undef, i8 %val, i32 7
22  ret <16 x i8> %ret
23}
24
25; Test v16i8 insertion into an undef, with the second good index for VLVGP.
26define <16 x i8> @f3(i8 *%ptr) {
27; CHECK-LABEL: f3:
28; CHECK: vlrepb %v24, 0(%r2)
29; CHECK-NEXT: br %r14
30  %val = load i8, i8 *%ptr
31  %ret = insertelement <16 x i8> undef, i8 %val, i32 15
32  ret <16 x i8> %ret
33}
34
35; Test v8i16 insertion into an undef, with an arbitrary index.
36define <8 x i16> @f4(i16 *%ptr) {
37; CHECK-LABEL: f4:
38; CHECK: vlreph %v24, 0(%r2)
39; CHECK-NEXT: br %r14
40  %val = load i16, i16 *%ptr
41  %ret = insertelement <8 x i16> undef, i16 %val, i32 5
42  ret <8 x i16> %ret
43}
44
45; Test v8i16 insertion into an undef, with the first good index for VLVGP.
46define <8 x i16> @f5(i16 *%ptr) {
47; CHECK-LABEL: f5:
48; CHECK: {{vlreph|vllezh}} %v24, 0(%r2)
49; CHECK-NEXT: br %r14
50  %val = load i16, i16 *%ptr
51  %ret = insertelement <8 x i16> undef, i16 %val, i32 3
52  ret <8 x i16> %ret
53}
54
55; Test v8i16 insertion into an undef, with the second good index for VLVGP.
56define <8 x i16> @f6(i16 *%ptr) {
57; CHECK-LABEL: f6:
58; CHECK: vlreph %v24, 0(%r2)
59; CHECK-NEXT: br %r14
60  %val = load i16, i16 *%ptr
61  %ret = insertelement <8 x i16> undef, i16 %val, i32 7
62  ret <8 x i16> %ret
63}
64
65; Test v4i32 insertion into an undef, with an arbitrary index.
66define <4 x i32> @f7(i32 *%ptr) {
67; CHECK-LABEL: f7:
68; CHECK: vlrepf %v24, 0(%r2)
69; CHECK-NEXT: br %r14
70  %val = load i32, i32 *%ptr
71  %ret = insertelement <4 x i32> undef, i32 %val, i32 2
72  ret <4 x i32> %ret
73}
74
75; Test v4i32 insertion into an undef, with the first good index for VLVGP.
76define <4 x i32> @f8(i32 *%ptr) {
77; CHECK-LABEL: f8:
78; CHECK: {{vlrepf|vllezf}} %v24, 0(%r2)
79; CHECK-NEXT: br %r14
80  %val = load i32, i32 *%ptr
81  %ret = insertelement <4 x i32> undef, i32 %val, i32 1
82  ret <4 x i32> %ret
83}
84
85; Test v4i32 insertion into an undef, with the second good index for VLVGP.
86define <4 x i32> @f9(i32 *%ptr) {
87; CHECK-LABEL: f9:
88; CHECK: vlrepf %v24, 0(%r2)
89; CHECK-NEXT: br %r14
90  %val = load i32, i32 *%ptr
91  %ret = insertelement <4 x i32> undef, i32 %val, i32 3
92  ret <4 x i32> %ret
93}
94
95; Test v2i64 insertion into an undef.
96define <2 x i64> @f10(i64 *%ptr) {
97; CHECK-LABEL: f10:
98; CHECK: vlrepg %v24, 0(%r2)
99; CHECK-NEXT: br %r14
100  %val = load i64, i64 *%ptr
101  %ret = insertelement <2 x i64> undef, i64 %val, i32 1
102  ret <2 x i64> %ret
103}
104
105; Test v4f32 insertion into an undef.
106define <4 x float> @f11(float *%ptr) {
107; CHECK-LABEL: f11:
108; CHECK: vlrepf %v24, 0(%r2)
109; CHECK: br %r14
110  %val = load float, float *%ptr
111  %ret = insertelement <4 x float> undef, float %val, i32 2
112  ret <4 x float> %ret
113}
114
115; Test v2f64 insertion into an undef.
116define <2 x double> @f12(double *%ptr) {
117; CHECK-LABEL: f12:
118; CHECK: vlrepg %v24, 0(%r2)
119; CHECK: br %r14
120  %val = load double, double *%ptr
121  %ret = insertelement <2 x double> undef, double %val, i32 1
122  ret <2 x double> %ret
123}
124