xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/lea-2.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s
2; RUN: llc < %s -mtriple=x86_64-linux -x86-asm-syntax=intel | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -x86-asm-syntax=intel | FileCheck %s
4; RUN: llc < %s -mtriple=x86_64-nacl -x86-asm-syntax=intel | FileCheck %s
5
6define i32 @test1(i32 %A, i32 %B) {
7  %tmp1 = shl i32 %A, 2
8  %tmp3 = add i32 %B, -5
9  %tmp4 = add i32 %tmp3, %tmp1
10; The above computation of %tmp4 should match a single lea, without using
11; actual add instructions.
12; CHECK-NOT: add
13; CHECK: lea {{[a-z]+}}, [{{[a-z]+}} + 4*{{[a-z]+}} - 5]
14
15  ret i32 %tmp4
16}
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