xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/shift-coalesce.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
2; RUN:   grep "shld.*cl"
3; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
4; RUN:   not grep "mov cl, bl"
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6; PR687
7
8define i64 @foo(i64 %x, i64* %X) {
9        %tmp.1 = load i64, i64* %X           ; <i64> [#uses=1]
10        %tmp.3 = trunc i64 %tmp.1 to i8         ; <i8> [#uses=1]
11        %shift.upgrd.1 = zext i8 %tmp.3 to i64          ; <i64> [#uses=1]
12        %tmp.4 = shl i64 %x, %shift.upgrd.1             ; <i64> [#uses=1]
13        ret i64 %tmp.4
14}
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