xref: /aosp_15_r20/external/lzma/CPP/7zip/Compress/BranchRegister.cpp (revision f6dc9357d832569d4d1f5d24eacdb3935a1ae8e6)
1 // BranchRegister.cpp
2 
3 #include "StdAfx.h"
4 
5 #include "../Common/RegisterCodec.h"
6 
7 #include "BranchMisc.h"
8 
9 namespace NCompress {
10 namespace NBranch {
11 
12 #ifdef Z7_EXTRACT_ONLY
13 #define GET_CREATE_FUNC(x) NULL
14 #define CREATE_BRA_E(n)
15 #else
16 #define GET_CREATE_FUNC(x) x
17 #define CREATE_BRA_E(n) \
18     REGISTER_FILTER_CREATE(CreateBra_Encoder_ ## n, CCoder(Z7_BRANCH_CONV_ENC_2(n)))
19 #endif
20 
21 #define CREATE_BRA(n) \
22     REGISTER_FILTER_CREATE(CreateBra_Decoder_ ## n, CCoder(Z7_BRANCH_CONV_DEC_2(n))) \
23     CREATE_BRA_E(n)
24 
25 CREATE_BRA(BranchConv_PPC)
CREATE_BRA(BranchConv_IA64)26 CREATE_BRA(BranchConv_IA64)
27 CREATE_BRA(BranchConv_ARM)
28 CREATE_BRA(BranchConv_ARMT)
29 CREATE_BRA(BranchConv_SPARC)
30 
31 #define METHOD_ITEM(n, id, name) \
32     REGISTER_FILTER_ITEM( \
33       CreateBra_Decoder_ ## n, GET_CREATE_FUNC( \
34       CreateBra_Encoder_ ## n), \
35       0x3030000 + id, name)
36 
37 REGISTER_CODECS_VAR
38 {
39   METHOD_ITEM(BranchConv_PPC,   0x205, "PPC"),
40   METHOD_ITEM(BranchConv_IA64,  0x401, "IA64"),
41   METHOD_ITEM(BranchConv_ARM,   0x501, "ARM"),
42   METHOD_ITEM(BranchConv_ARMT,  0x701, "ARMT"),
43   METHOD_ITEM(BranchConv_SPARC, 0x805, "SPARC")
44 };
45 
46 REGISTER_CODECS(Branch)
47 
48 
49 #define REGISTER_FILTER_E_BRANCH(id, n, name, alignment) \
50     REGISTER_FILTER_E(n, \
51       CDecoder(Z7_BRANCH_CONV_DEC(n), alignment), \
52       CEncoder(Z7_BRANCH_CONV_ENC(n), alignment), \
53       id, name)
54 
55 REGISTER_FILTER_E_BRANCH(0xa, ARM64, "ARM64", 3)
56 REGISTER_FILTER_E_BRANCH(0xb, RISCV, "RISCV", 1)
57 
58 }}
59