1""" 2Copyright 2021 Alyssa Rosenzweig 3# SPDX-License-Identifier: MIT 4""" 5 6opcodes = {} 7immediates = {} 8enums = {} 9 10VARIABLE = ~0 11 12class Opcode(object): 13 def __init__(self, name, dests, srcs, imms, is_float, can_eliminate, 14 can_reorder, schedule_class, encoding_16, encoding_32): 15 self.name = name 16 self.dests = dests if dests != VARIABLE else 0 17 self.srcs = srcs if srcs != VARIABLE else 0 18 self.variable_srcs = (srcs == VARIABLE) 19 self.variable_dests = (dests == VARIABLE) 20 self.imms = imms 21 self.is_float = is_float 22 self.can_eliminate = can_eliminate 23 self.can_reorder = can_reorder 24 self.schedule_class = schedule_class 25 self.encoding_16 = encoding_16 26 self.encoding_32 = encoding_32 27 28class Immediate(object): 29 def __init__(self, name, ctype): 30 self.name = name 31 self.ctype = ctype 32 33class Encoding(object): 34 def __init__(self, description): 35 (exact, mask, length_short, length_long) = description 36 37 # Convenience 38 if length_long is None: 39 length_long = length_short 40 41 self.exact = exact 42 self.mask = mask 43 self.length_short = length_short 44 self.extensible = length_short != length_long 45 46 if self.extensible: 47 assert(length_long == length_short + (4 if length_short > 8 else 2)) 48 49def op(name, encoding_32, dests = 1, srcs = 0, imms = [], is_float = False, 50 can_eliminate = True, can_reorder = True, encoding_16 = None, 51 schedule_class = "none"): 52 encoding_16 = Encoding(encoding_16) if encoding_16 is not None else None 53 encoding_32 = Encoding(encoding_32) if encoding_32 is not None else None 54 55 opcodes[name] = Opcode(name, dests, srcs, imms, is_float, can_eliminate, 56 can_reorder, schedule_class, encoding_16, encoding_32) 57 58def immediate(name, ctype = "uint32_t"): 59 imm = Immediate(name, ctype) 60 immediates[name] = imm 61 return imm 62 63def enum(name, value_dict): 64 enums[name] = value_dict 65 return immediate(name, "enum agx_" + name) 66 67L = (1 << 15) 68_ = None 69 70FORMAT = immediate("format", "enum agx_format") 71IMM = immediate("imm", "uint64_t") 72WRITEOUT = immediate("writeout") 73INDEX = immediate("index") 74COMPONENT = immediate("component") 75CHANNELS = immediate("channels") 76TRUTH_TABLE = immediate("truth_table") 77ROUND = immediate("round", "enum agx_round") 78SHIFT = immediate("shift") 79MASK = immediate("mask") 80BFI_MASK = immediate("bfi_mask") 81LOD_MODE = immediate("lod_mode", "enum agx_lod_mode") 82PIXEL_OFFSET = immediate("pixel_offset") 83STACK_SIZE = immediate("stack_size", 'int16_t') 84EXPLICIT_COORDS = immediate("explicit_coords", "bool") 85 86DIM = enum("dim", { 87 0: '1d', 88 1: '1d_array', 89 2: '2d', 90 3: '2d_array', 91 4: '2d_ms', 92 5: '3d', 93 6: 'cube', 94 7: 'cube_array', 95 8: '2d_ms_array', 96}) 97 98GATHER = enum("gather", { 99 0b000: "none", 100 0b001: "r", 101 0b011: "g", 102 0b101: "b", 103 0b111: "a", 104}) 105 106OFFSET = immediate("offset", "bool") 107SHADOW = immediate("shadow", "bool") 108QUERY_LOD = immediate("query_lod", "bool") 109SCOREBOARD = immediate("scoreboard") 110ICOND = immediate("icond", "enum agx_icond") 111FCOND = immediate("fcond", "enum agx_fcond") 112NEST = immediate("nest") 113INVERT_COND = immediate("invert_cond") 114NEST = immediate("nest") 115TARGET = immediate("target", "agx_block *") 116ZS = immediate("zs") 117SR = enum("sr", { 118 0: 'threadgroup_position_in_grid.x', 119 1: 'threadgroup_position_in_grid.y', 120 2: 'threadgroup_position_in_grid.z', 121 4: 'threads_per_threadgroup.x', 122 5: 'threads_per_threadgroup.y', 123 6: 'threads_per_threadgroup.z', 124 8: 'dispatch_threads_per_threadgroup.x', 125 9: 'dispatch_threads_per_threadgroup.y', 126 10: 'dispatch_threads_per_threadgroup.z', 127 14: 'samples_log2', 128 20: 'core_id', 129 21: 'vm_slot', 130 48: 'thread_position_in_threadgroup.x', 131 49: 'thread_position_in_threadgroup.y', 132 50: 'thread_position_in_threadgroup.z', 133 51: 'thread_index_in_threadgroup', 134 52: 'thread_index_in_subgroup', 135 53: 'subgroup_index_in_threadgroup', 136 56: 'active_thread_index_in_quad', 137 57: 'total_active_threads_in_quad', 138 58: 'active_thread_index_in_subgroup', 139 59: 'total_active_threads_in_subgroup', 140 60: 'coverage_mask', 141 62: 'backfacing', 142 63: 'is_active_thread', 143 80: 'thread_position_in_grid.x', 144 81: 'thread_position_in_grid.y', 145 82: 'thread_position_in_grid.z', 146 124: 'input_sample_mask', 147 144: 'helper_op', 148 146: 'helper_arg_l', 149 147: 'helper_arg_h', 150}) 151 152ATOMIC_OPC = enum("atomic_opc", { 153 0: 'add', 154 1: 'sub', 155 2: 'xchg', 156 3: 'cmpxchg', 157 4: 'umin', 158 5: 'imin', 159 6: 'umax', 160 7: 'imax', 161 8: 'and', 162 9: 'or', 163 10: 'xor', 164}) 165 166INTERPOLATION = enum("interpolation", { 167 0: 'center', 168 1: 'sample', 169 2: 'centroid', 170 # We translate sample -> sample_register at pack time for simplicity 171 3: 'sample_register', 172}) 173 174SIMD_OP = enum("simd_op", { 175 0b00000: 'and', 176 0b00001: 'fadd', 177 0b00010: 'or', 178 0b00011: 'fmul', 179 0b00100: 'xor', 180 0b00101: 'fmin', 181 0b00111: 'fmax', 182 0b10000: 'iadd', 183 0b10100: 'smin', 184 0b10110: 'smax', 185 0b11100: 'umin', 186 0b11110: 'umax', 187}) 188 189FUNOP = lambda x: (x << 28) 190FUNOP_MASK = FUNOP((1 << 14) - 1) 191 192def funop(name, opcode, schedule_class = "none"): 193 op(name, (0x0A | (opcode << 28), 194 0x3F | (((1 << 14) - 1) << 28), 4, 6), 195 srcs = 1, is_float = True, schedule_class = schedule_class) 196 197def iunop(name, opcode): 198 assert(opcode < 4) 199 op(name, (0x3E | (opcode << 26), 200 0x7F | L | (((1 << 14) - 1) << 26), 201 6, _), 202 srcs = 1) 203 204# Listing of opcodes 205funop("floor", 0b000000) 206funop("srsqrt", 0b000001) 207funop("dfdx", 0b000100, schedule_class = "coverage") 208funop("dfdy", 0b000110, schedule_class = "coverage") 209funop("rcp", 0b001000) 210funop("rsqrt", 0b001001) 211funop("sin_pt_1", 0b001010) 212funop("log2", 0b001100) 213funop("exp2", 0b001101) 214funop("sin_pt_2", 0b001110) 215funop("ceil", 0b010000) 216funop("trunc", 0b100000) 217funop("roundeven", 0b110000) 218 219iunop("bitrev", 0b01) 220iunop("popcount", 0b10) 221iunop("ffs", 0b11) 222 223op("fadd", 224 encoding_16 = (0x26, 0x3F, 4, 6), 225 encoding_32 = (0x2A, 0x3F, 4, 6), 226 srcs = 2, is_float = True) 227 228op("fma", 229 encoding_16 = (0x36, 0x3F, 6, 8), 230 encoding_32 = (0x3A, 0x3F, 6, 8), 231 srcs = 3, is_float = True) 232 233op("fmul", 234 encoding_16 = (0x16, 0x3F, 4, 6), 235 encoding_32 = (0x1A, 0x3F, 4, 6), 236 srcs = 2, is_float = True) 237 238op("mov_imm", 239 encoding_32 = (0x62, 0xFF, 6, 8), 240 encoding_16 = (0x62, 0xFF, 4, 6), 241 imms = [IMM]) 242 243op("iadd", 244 encoding_32 = (0x0E, 0x3F | L, 8, _), 245 srcs = 2, imms = [SHIFT]) 246 247op("imad", 248 encoding_32 = (0x1E, 0x3F | L, 8, _), 249 srcs = 3, imms = [SHIFT]) 250 251op("bfi", 252 encoding_32 = (0x2E, 0x7F | (0x3 << 26), 8, _), 253 srcs = 3, imms = [BFI_MASK]) 254 255op("bfeil", 256 encoding_32 = (0x2E | L, 0x7F | L | (0x3 << 26), 8, _), 257 srcs = 3, imms = [BFI_MASK]) 258 259op("extr", 260 encoding_32 = (0x2E | (0x1 << 26), 0x7F | L | (0x3 << 26), 8, _), 261 srcs = 3, imms = [BFI_MASK]) 262 263op("asr", 264 encoding_32 = (0x2E | L | (0x1 << 26), 0x7F | L | (0x3 << 26), 8, _), 265 srcs = 2) 266 267def subgroup_op(name, opc): 268 exact = 0b01101111 | L | (opc << 29) 269 exact_mask = 0b11111111 | L | (0x3 << 29) 270 271 op(name, encoding_32 = (exact, exact_mask, 6, _), srcs = 1, imms = [SIMD_OP]) 272 273subgroup_op("quad_reduce", 0x0) 274subgroup_op("simd_reduce", 0x1) 275subgroup_op("quad_prefix", 0x2) 276subgroup_op("simd_prefix", 0x3) 277 278for window, w_bit in [('quad_', 0), ('', 1)]: 279 for s, shuffle in enumerate(['', '_xor', '_up', '_down']): 280 op(f"{window}shuffle{shuffle}", 281 encoding_32 = (0b01101111 | (w_bit << 26) | (s << 38), 282 0xFF | L | (1 << 47) | (3 << 38) | (3 << 26), 6, _), 283 srcs = 2) 284 285 # Pseudo-instruction ballotting a boolean 286 op(f"{window}ballot", _, srcs = 1) 287 288 for T, T_bit, cond in [('f', 0, FCOND), ('i', 1, ICOND)]: 289 op(f"{T}cmp_{window}ballot", 290 encoding_32 = (0b0100010 | (T_bit << 4) | (w_bit << 48), 0, 8, _), 291 srcs = 2, imms = [cond, INVERT_COND]) 292 293op("icmpsel", 294 encoding_32 = (0x12, 0x7F, 8, 10), 295 srcs = 4, imms = [ICOND]) 296 297op("fcmpsel", 298 encoding_32 = (0x02, 0x7F, 8, 10), 299 srcs = 4, imms = [FCOND]) 300 301# Pseudo-instructions for compares returning 1/0 302op("icmp", _, srcs = 2, imms = [ICOND, INVERT_COND]) 303op("fcmp", _, srcs = 2, imms = [FCOND, INVERT_COND]) 304 305# sources are coordinates, LOD, texture bindless base (zero for texture state 306# registers), texture, sampler, shadow/offset 307# TODO: anything else? 308op("texture_sample", 309 encoding_32 = (0x31, 0x7F, 8, 10), # XXX WRONG SIZE 310 srcs = 6, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET, SHADOW, 311 QUERY_LOD, GATHER]) 312for memory, can_reorder in [("texture", True), ("image", False)]: 313 op(f"{memory}_load", encoding_32 = (0x71, 0x7F, 8, 10), # XXX WRONG SIZE 314 srcs = 6, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET], 315 can_reorder = can_reorder, 316 schedule_class = "none" if can_reorder else "load") 317 318# sources are base, index 319op("device_load", 320 encoding_32 = (0x05, 0x7F, 6, 8), 321 srcs = 2, imms = [FORMAT, MASK, SHIFT, SCOREBOARD], can_reorder = False, 322 schedule_class = "load") 323 324# sources are base (relative to workgroup memory), index 325op("local_load", 326 encoding_32 = (0b1101001, 0, 6, 8), 327 srcs = 2, imms = [FORMAT, MASK], can_reorder = False, 328 schedule_class = "load") 329 330# sources are value, base, index 331# TODO: Consider permitting the short form 332op("device_store", 333 encoding_32 = (0x45 | (1 << 47), 0, 8, _), 334 dests = 0, srcs = 3, imms = [FORMAT, MASK, SHIFT, SCOREBOARD], can_eliminate = False, 335 schedule_class = "store") 336 337# sources are value, base, index 338op("local_store", 339 encoding_32 = (0b0101001, 0, 6, 8), 340 dests = 0, srcs = 3, imms = [FORMAT, MASK], 341 can_eliminate=False, schedule_class = "store") 342 343# sources are value, index 344# TODO: Consider permitting the short form 345op("uniform_store", 346 encoding_32 = ((0b111 << 27) | 0b1000101 | (1 << 47), 0, 8, _), 347 dests = 0, srcs = 2, imms = [MASK], can_eliminate = False) 348 349# sources are value, base, index 350op("atomic", 351 encoding_32 = (0x15 | (1 << 26) | (1 << 31) | (5 << 44), 0x3F | (1 << 26) | (1 << 31) | (5 << 44), 8, _), 352 dests = 1, srcs = 3, imms = [ATOMIC_OPC, SCOREBOARD], 353 can_eliminate = False, schedule_class = "atomic") 354 355# XXX: stop hardcoding the long form 356op("local_atomic", 357 encoding_32 = (0x19 | (1 << 15) | (1 << 36) | (1 << 47), 0x3F | (1 << 36) | (1 << 47), 10, _), 358 dests = 1, srcs = 3, imms = [ATOMIC_OPC], schedule_class = "atomic", 359 can_eliminate = False) 360 361op("wait", (0x38, 0xFF, 2, _), dests = 0, 362 can_eliminate = False, imms = [SCOREBOARD], schedule_class = "invalid") 363 364for (suffix, schedule_class) in [("", "none"), ("_coverage", "coverage"), ("_barrier", "barrier")]: 365 op(f"get_sr{suffix}", (0x72, 0x7F | L, 4, _), dests = 1, imms = [SR], 366 schedule_class = schedule_class, can_reorder = schedule_class == "none") 367 368op("sample_mask", (0x7fc1, 0xffff, 6, _), dests = 0, srcs = 2, 369 can_eliminate = False, schedule_class = "coverage") 370 371# Sources: sample mask, combined depth/stencil 372op("zs_emit", (0x41, 0xFF | L, 4, _), dests = 0, srcs = 2, 373 can_eliminate = False, imms = [ZS], schedule_class = "coverage") 374 375# Sources: sample mask, explicit coords (if present) 376op("ld_tile", (0x49, 0x7F, 8, _), dests = 1, srcs = 2, 377 imms = [FORMAT, MASK, PIXEL_OFFSET, EXPLICIT_COORDS], can_reorder = False, 378 schedule_class = "coverage") 379 380# Sources: value, sample mask, explicit coords (if present) 381op("st_tile", (0x09, 0x7F, 8, _), dests = 0, srcs = 3, 382 can_eliminate = False, imms = [FORMAT, MASK, PIXEL_OFFSET, EXPLICIT_COORDS], 383 schedule_class = "coverage") 384 385for (name, exact) in [("any", 0xC000), ("none", 0xC020), ("none_after", 0xC020)]: 386 op("jmp_exec_" + name, (exact, (1 << 16) - 1, 6, _), dests = 0, srcs = 0, 387 can_eliminate = False, schedule_class = "invalid", imms = [TARGET]) 388 389# TODO: model implicit r0l destinations 390op("pop_exec", (0x52 | (0x3 << 9), ((1 << 48) - 1) ^ (0x3 << 7) ^ (0x3 << 11), 6, _), 391 dests = 0, srcs = 0, can_eliminate = False, schedule_class = "invalid", 392 imms = [NEST]) 393 394for is_float in [False, True]: 395 mod_mask = 0 if is_float else (0x3 << 26) | (0x3 << 38) 396 397 for (cf, cf_op) in [("if", 0), ("else", 1), ("while", 2)]: 398 name = "{}_{}cmp".format(cf, "f" if is_float else "i") 399 exact = 0x42 | (0x0 if is_float else 0x10) | (cf_op << 9) 400 mask = 0x7F | (0x3 << 9) | mod_mask | (0x3 << 44) 401 imms = [NEST, FCOND if is_float else ICOND, INVERT_COND, TARGET] 402 403 op(name, (exact, mask, 6, _), dests = 0, srcs = 2, can_eliminate = False, 404 imms = imms, is_float = is_float, 405 schedule_class = "preload" if cf == "else" else "invalid") 406 407op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE]) 408op("intl", (0x3E, 0x7F, 6, _), srcs = 2, imms = []) 409op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND]) 410 411# Sources are the coeffient register and the sample index (if applicable) 412op("iter", (0x21, 0xBF, 8, _), srcs = 2, imms = [CHANNELS, INTERPOLATION]) 413 414# Sources are the coeffient register for the varying, the coefficient register 415# for W, and the sample index (if applicable) 416op("iterproj", (0x21, 0xBF, 8, _), srcs = 3, imms = [CHANNELS, INTERPOLATION]) 417 418op("ldcf", (0xA1, 0xBF, 8, _), srcs = 1, imms = [CHANNELS]) 419op("st_vary", None, dests = 0, srcs = 2, can_eliminate = False) 420op("no_varyings", (0x80000051, 0xFFFFFFFF, 4, _), dests = 0, can_eliminate = False) 421op("stop", (0x88, 0xFFFF, 2, _), dests = 0, can_eliminate = False, 422 schedule_class = "invalid") 423op("trap", (0x08, 0xFFFF, 2, _), dests = 0, can_eliminate = False, 424 schedule_class = "invalid") 425 426# These are modelled as total barriers since they can guard global memory 427# access too, and even need to be properly ordered with loads. 428op("wait_pix", (0x48, 0xFF, 4, _), dests = 0, imms = [WRITEOUT], 429 can_eliminate = False, schedule_class = "barrier") 430op("signal_pix", (0x58, 0xFF, 4, _), dests = 0, imms = [WRITEOUT], 431 can_eliminate = False, schedule_class = "barrier") 432 433# Sources are the data vector, the coordinate vector, the LOD, the bindless 434# table if present (zero for texture state registers), and texture index. 435op("image_write", (0xF1 | (1 << 23) | (9 << 43), 0xFF, 6, 8), dests = 0, srcs = 5, imms 436 = [DIM], can_eliminate = False, schedule_class = "store") 437 438# Sources are the image base, image index, the offset within shared memory, and 439# the coordinates (or just the layer if implicit). 440# TODO: Do we need the short encoding? 441op("block_image_store", (0xB1, 0xFF, 10, _), dests = 0, srcs = 4, 442 imms = [FORMAT, DIM, EXPLICIT_COORDS], can_eliminate = False, schedule_class = "store") 443 444# Barriers 445op("threadgroup_barrier", (0x0068, 0xFFFF, 2, _), dests = 0, srcs = 0, 446 can_eliminate = False, schedule_class = "barrier") 447 448def memory_barrier(name, a, b, c): 449 op(name, (0xF5 | (a << 10) | (b << 8) | (c << 12), 0xFFFF, 2, _), dests = 0, srcs = 0, 450 can_eliminate = False, schedule_class = "barrier") 451 452memory_barrier("memory_barrier", 1, 2, 9) 453 454# TODO: Not clear what these individually are. Some might be cache flushes? 455memory_barrier("image_barrier_1", 2, 2, 10) 456memory_barrier("image_barrier_2", 3, 2, 10) 457memory_barrier("image_barrier_3", 2, 1, 10) 458memory_barrier("image_barrier_4", 3, 1, 10) 459 460memory_barrier("flush_memory_to_texture", 0, 0, 4) 461 462memory_barrier("memory_barrier_2", 2, 2, 9) 463memory_barrier("memory_barrier_3", 2, 1, 9) 464memory_barrier("unknown_barrier_1", 0, 3, 3) 465memory_barrier("unknown_barrier_2", 0, 3, 0) 466 467op("doorbell", (0x60020 | 0x28 << 32, (1 << 48) - 1, 6, _), dests = 0, 468 can_eliminate = False, can_reorder = False, imms = [IMM]) 469 470op("stack_unmap", (0x00075, (1 << 24) - 1, 8, _), dests = 1, srcs = 0, can_eliminate = False, can_reorder = False, imms = [IMM]) 471op("stack_map", (0x10075, (1 << 24) - 1, 8, _), dests = 0, srcs = 1, can_eliminate = False, can_reorder = False, imms = [IMM]) 472 473op("stack_adjust", 474 encoding_32 = (0x10100b5, (1 << 26) - 1, 8, _), 475 dests = 0, srcs = 0, can_eliminate = False, can_reorder = False, 476 imms = [STACK_SIZE], schedule_class = "store") 477 478# source is offset 479op("stack_load", 480 encoding_32 = (0x35, (1 << 20) - 1, 6, 8), 481 srcs = 1, imms = [FORMAT, MASK, SCOREBOARD], can_reorder = False, 482 schedule_class = "load") 483 484# sources are value and offset 485op("stack_store", 486 encoding_32 = (0xb5, (1 << 20) - 1, 6, 8), 487 dests = 0, srcs = 2, imms = [FORMAT, MASK, SCOREBOARD], 488 can_eliminate=False, schedule_class = "store") 489 490# Convenient aliases. 491op("mov", _, srcs = 1) 492op("not", _, srcs = 1) 493 494op("collect", _, srcs = VARIABLE) 495op("split", _, srcs = 1, dests = VARIABLE) 496op("phi", _, srcs = VARIABLE, schedule_class = "preload") 497 498op("unit_test", _, dests = 0, srcs = 1, can_eliminate = False) 499 500# Like mov, but takes a register and can only appear at the start. Guaranteed 501# to be coalesced during RA, rather than lowered to a real move. 502op("preload", _, srcs = 1, schedule_class = "preload") 503 504# Opposite of preload. Exports a scalar value to a particular register at the 505# end of the shader part. Must only appear after the logical end of the exit 506# block, this avoids special casing the source's liveness. Logically all exports 507# happen in parallel at the end of the shader part. 508op("export", _, dests = 0, srcs = 1, imms = [IMM], can_eliminate = False, 509 schedule_class = "invalid") 510 511# Pseudo-instructions to set the nesting counter. Lowers to r0l writes after RA. 512op("begin_cf", _, dests = 0, can_eliminate = False) 513op("break", _, dests = 0, imms = [NEST, TARGET], can_eliminate = False, 514 schedule_class = "invalid") 515 516for (name, is_float) in [("break_if_icmp", False), ("break_if_fcmp", True)]: 517 op(name, _, dests = 0, srcs = 2, 518 imms = [NEST, INVERT_COND, FCOND if is_float else ICOND, TARGET], 519 can_eliminate = False, schedule_class = "invalid") 520