1 /*
2 * Copyright 2022 Alyssa Rosenzweig
3 * SPDX-License-Identifier: MIT
4 *
5 */
6
7 #pragma once
8
9 #include "util/format/u_format.h"
10 #include "util/macros.h"
11 #include "util/u_math.h"
12
13 #ifdef __cplusplus
14 extern "C" {
15 #endif
16
17 #define AIL_CACHELINE 0x80
18 #define AIL_PAGESIZE 0x4000
19 #define AIL_MAX_MIP_LEVELS 16
20
21 enum ail_tiling {
22 /**
23 * Strided linear (raster order). Only allowed for 1D or 2D, without
24 * mipmapping, multisampling, block-compression, or arrays.
25 */
26 AIL_TILING_LINEAR,
27
28 /**
29 * Twiddled (Morton order). Always allowed.
30 */
31 AIL_TILING_TWIDDLED,
32
33 /**
34 * Twiddled (Morton order) with compression.
35 */
36 AIL_TILING_TWIDDLED_COMPRESSED,
37 };
38
39 /*
40 * Represents the dimensions of a single tile. Used to describe tiled layouts.
41 * Width and height are in units of elements, not pixels, to model compressed
42 * textures corrects.
43 *
44 * Invariant: width_el and height_el are powers of two.
45 */
46 struct ail_tile {
47 unsigned width_el, height_el;
48 };
49
50 /*
51 * An AGX image layout.
52 */
53 struct ail_layout {
54 /** Width, height, and depth in pixels at level 0 */
55 uint32_t width_px, height_px, depth_px;
56
57 /** Number of samples per pixel. 1 if multisampling is disabled. */
58 uint8_t sample_count_sa;
59
60 /** Number of miplevels. 1 if no mipmapping is used. */
61 uint8_t levels;
62
63 /** Should this image be mipmapped along the Z-axis in addition to the X- and
64 * Y-axes? This should be set for API-level 3D images, but not 2D arrays or
65 * cubes.
66 */
67 bool mipmapped_z;
68
69 /** Tiling mode used */
70 enum ail_tiling tiling;
71
72 /** Texture format */
73 enum pipe_format format;
74
75 /**
76 * If tiling is LINEAR, the number of bytes between adjacent rows of
77 * elements. Otherwise, this field is zero.
78 */
79 uint32_t linear_stride_B;
80
81 /**
82 * Stride between layers of an array texture, including a cube map. Layer i
83 * begins at offset (i * layer_stride_B) from the beginning of the texture.
84 *
85 * If depth_px = 1, the value of this field is UNDEFINED.
86 */
87 uint64_t layer_stride_B;
88
89 /**
90 * Whether the layer stride is aligned to the page size or not. The hardware
91 * needs this flag to compute the implicit layer stride.
92 */
93 bool page_aligned_layers;
94
95 /**
96 * Offsets of mip levels within a layer.
97 */
98 uint64_t level_offsets_B[AIL_MAX_MIP_LEVELS];
99
100 /**
101 * For the compressed buffer, offsets of mip levels within a layer.
102 */
103 uint64_t level_offsets_compressed_B[AIL_MAX_MIP_LEVELS];
104
105 /**
106 * If tiling is TWIDDLED, the tile size used for each mip level within a
107 * layer. Calculating tile sizes is the sole responsibility of
108 * ail_initialized_twiddled.
109 */
110 struct ail_tile tilesize_el[AIL_MAX_MIP_LEVELS];
111
112 /**
113 * If tiling is TWIDDLED, the stride in elements used for each mip level
114 * within a layer. Calculating level strides is the sole responsibility of
115 * ail_initialized_twiddled. This is necessary because compressed pixel
116 * formats may add extra stride padding.
117 */
118 uint32_t stride_el[AIL_MAX_MIP_LEVELS];
119
120 /* Offset of the start of the compression metadata buffer */
121 uint32_t metadata_offset_B;
122
123 /* Stride between subsequent layers in the compression metadata buffer */
124 uint64_t compression_layer_stride_B;
125
126 /* Size of entire texture */
127 uint64_t size_B;
128
129 /* Must the layout support writeable images? If false, the layout MUST NOT be
130 * used as a writeable image (either PBE or image atomics).
131 */
132 bool writeable_image;
133
134 /* Must the layout support rendering? If false, the layout MUST NOT be used
135 * for rendering, either PBE or ZLS.
136 */
137 bool renderable;
138 };
139
140 static inline uint32_t
ail_get_linear_stride_B(const struct ail_layout * layout,ASSERTED uint8_t level)141 ail_get_linear_stride_B(const struct ail_layout *layout, ASSERTED uint8_t level)
142 {
143 assert(layout->tiling == AIL_TILING_LINEAR && "Invalid usage");
144 assert(level == 0 && "Strided linear mipmapped textures are unsupported");
145
146 return layout->linear_stride_B;
147 }
148
149 /*
150 * For WSI purposes, we need to associate a stride with all layouts. In the
151 * hardware, only strided linear images have an associated stride, there is no
152 * natural stride associated with twiddled images. However, various clients
153 * assert that the stride is valid for the image if it were linear (even if it
154 * is in fact not linear). In those cases, by convention we use the minimum
155 * valid such stride.
156 */
157 static inline uint32_t
ail_get_wsi_stride_B(const struct ail_layout * layout,unsigned level)158 ail_get_wsi_stride_B(const struct ail_layout *layout, unsigned level)
159 {
160 assert(level == 0 && "Mipmaps cannot be shared as WSI");
161
162 if (layout->tiling == AIL_TILING_LINEAR)
163 return ail_get_linear_stride_B(layout, level);
164 else
165 return util_format_get_stride(layout->format, layout->width_px);
166 }
167
168 static inline uint32_t
ail_get_layer_offset_B(const struct ail_layout * layout,unsigned z_px)169 ail_get_layer_offset_B(const struct ail_layout *layout, unsigned z_px)
170 {
171 return z_px * layout->layer_stride_B;
172 }
173
174 static inline uint32_t
ail_get_level_offset_B(const struct ail_layout * layout,unsigned level)175 ail_get_level_offset_B(const struct ail_layout *layout, unsigned level)
176 {
177 return layout->level_offsets_B[level];
178 }
179
180 static inline uint32_t
ail_get_layer_level_B(const struct ail_layout * layout,unsigned z_px,unsigned level)181 ail_get_layer_level_B(const struct ail_layout *layout, unsigned z_px,
182 unsigned level)
183 {
184 return ail_get_layer_offset_B(layout, z_px) +
185 ail_get_level_offset_B(layout, level);
186 }
187
188 static inline uint32_t
ail_get_level_size_B(const struct ail_layout * layout,unsigned level)189 ail_get_level_size_B(const struct ail_layout *layout, unsigned level)
190 {
191 if (layout->tiling == AIL_TILING_LINEAR) {
192 assert(level == 0);
193 return layout->layer_stride_B;
194 } else {
195 assert(level + 1 < ARRAY_SIZE(layout->level_offsets_B));
196 return layout->level_offsets_B[level + 1] -
197 layout->level_offsets_B[level];
198 }
199 }
200
201 static inline uint32_t
ail_get_linear_pixel_B(const struct ail_layout * layout,ASSERTED unsigned level,uint32_t x_px,uint32_t y_px,uint32_t z_px)202 ail_get_linear_pixel_B(const struct ail_layout *layout, ASSERTED unsigned level,
203 uint32_t x_px, uint32_t y_px, uint32_t z_px)
204 {
205 assert(level == 0 && "Strided linear mipmapped textures are unsupported");
206 assert(util_format_get_blockwidth(layout->format) == 1 &&
207 "Strided linear block formats unsupported");
208 assert(util_format_get_blockheight(layout->format) == 1 &&
209 "Strided linear block formats unsupported");
210 assert(layout->sample_count_sa == 1 &&
211 "Strided linear multisampling unsupported");
212
213 return ail_get_layer_offset_B(layout, z_px) +
214 (y_px * ail_get_linear_stride_B(layout, level)) +
215 (x_px * util_format_get_blocksize(layout->format));
216 }
217
218 static inline unsigned
ail_effective_width_sa(unsigned width_px,unsigned sample_count_sa)219 ail_effective_width_sa(unsigned width_px, unsigned sample_count_sa)
220 {
221 return width_px * (sample_count_sa == 4 ? 2 : 1);
222 }
223
224 static inline unsigned
ail_effective_height_sa(unsigned height_px,unsigned sample_count_sa)225 ail_effective_height_sa(unsigned height_px, unsigned sample_count_sa)
226 {
227 return height_px * (sample_count_sa >= 2 ? 2 : 1);
228 }
229
230 static inline unsigned
ail_metadata_width_tl(struct ail_layout * layout,unsigned level)231 ail_metadata_width_tl(struct ail_layout *layout, unsigned level)
232 {
233 unsigned px = u_minify(layout->width_px, level);
234 uint32_t sa = ail_effective_width_sa(px, layout->sample_count_sa);
235 return DIV_ROUND_UP(sa, 16);
236 }
237
238 static inline unsigned
ail_metadata_height_tl(struct ail_layout * layout,unsigned level)239 ail_metadata_height_tl(struct ail_layout *layout, unsigned level)
240 {
241 unsigned px = u_minify(layout->height_px, level);
242 uint32_t sa = ail_effective_height_sa(px, layout->sample_count_sa);
243 return DIV_ROUND_UP(sa, 16);
244 }
245
246 static inline bool
ail_is_compressed(const struct ail_layout * layout)247 ail_is_compressed(const struct ail_layout *layout)
248 {
249 return layout->tiling == AIL_TILING_TWIDDLED_COMPRESSED;
250 }
251
252 /*
253 * Even when the base mip level is compressed, high levels of the miptree
254 * (smaller than 16 pixels on either axis) are not compressed as it would be
255 * pointless. This queries this case.
256 */
257 static inline bool
ail_is_level_compressed(const struct ail_layout * layout,unsigned level)258 ail_is_level_compressed(const struct ail_layout *layout, unsigned level)
259 {
260 unsigned width_sa = ALIGN(
261 ail_effective_width_sa(layout->width_px, layout->sample_count_sa), 16);
262
263 unsigned height_sa = ALIGN(
264 ail_effective_height_sa(layout->height_px, layout->sample_count_sa), 16);
265
266 return ail_is_compressed(layout) &&
267 u_minify(MAX2(width_sa, height_sa), level) >= 16;
268 }
269
270 static inline bool
ail_is_level_twiddled_uncompressed(const struct ail_layout * layout,unsigned level)271 ail_is_level_twiddled_uncompressed(const struct ail_layout *layout,
272 unsigned level)
273 {
274 switch (layout->tiling) {
275 case AIL_TILING_TWIDDLED:
276 return true;
277 case AIL_TILING_TWIDDLED_COMPRESSED:
278 return !ail_is_level_compressed(layout, level);
279 default:
280 return false;
281 }
282 }
283
284 void ail_make_miptree(struct ail_layout *layout);
285
286 void ail_detile(void *_tiled, void *_linear,
287 const struct ail_layout *tiled_layout, unsigned level,
288 unsigned linear_pitch_B, unsigned sx_px, unsigned sy_px,
289 unsigned width_px, unsigned height_px);
290
291 void ail_tile(void *_tiled, void *_linear,
292 const struct ail_layout *tiled_layout, unsigned level,
293 unsigned linear_pitch_B, unsigned sx_px, unsigned sy_px,
294 unsigned width_px, unsigned height_px);
295
296 /* Define aliases for the subset formats that are accessible in the ISA. These
297 * subsets disregard component mapping and number of components. This
298 * constitutes ABI with the compiler.
299 */
300 enum ail_isa_format {
301 AIL_ISA_FORMAT_I8 = PIPE_FORMAT_R8_UINT,
302 AIL_ISA_FORMAT_I16 = PIPE_FORMAT_R16_UINT,
303 AIL_ISA_FORMAT_I32 = PIPE_FORMAT_R32_UINT,
304 AIL_ISA_FORMAT_F16 = PIPE_FORMAT_R16_FLOAT,
305 AIL_ISA_FORMAT_U8NORM = PIPE_FORMAT_R8_UNORM,
306 AIL_ISA_FORMAT_S8NORM = PIPE_FORMAT_R8_SNORM,
307 AIL_ISA_FORMAT_U16NORM = PIPE_FORMAT_R16_UNORM,
308 AIL_ISA_FORMAT_S16NORM = PIPE_FORMAT_R16_SNORM,
309 AIL_ISA_FORMAT_RGB10A2 = PIPE_FORMAT_R10G10B10A2_UNORM,
310 AIL_ISA_FORMAT_SRGBA8 = PIPE_FORMAT_R8G8B8A8_SRGB,
311 AIL_ISA_FORMAT_RG11B10F = PIPE_FORMAT_R11G11B10_FLOAT,
312 AIL_ISA_FORMAT_RGB9E5 = PIPE_FORMAT_R9G9B9E5_FLOAT
313 };
314
315 /*
316 * The architecture load/store instructions support masking, but packed formats
317 * are not compatible with masking. Check if a format is packed.
318 */
319 static inline bool
ail_isa_format_supports_mask(enum ail_isa_format format)320 ail_isa_format_supports_mask(enum ail_isa_format format)
321 {
322 switch (format) {
323 case AIL_ISA_FORMAT_RGB10A2:
324 case AIL_ISA_FORMAT_RG11B10F:
325 case AIL_ISA_FORMAT_RGB9E5:
326 return false;
327 default:
328 return true;
329 }
330 }
331
332 struct ail_pixel_format_entry {
333 uint8_t channels;
334 uint8_t type;
335 bool texturable : 1;
336 enum pipe_format renderable;
337 };
338
339 extern const struct ail_pixel_format_entry ail_pixel_format[PIPE_FORMAT_COUNT];
340
341 static inline bool
ail_is_valid_pixel_format(enum pipe_format format)342 ail_is_valid_pixel_format(enum pipe_format format)
343 {
344 return ail_pixel_format[format].texturable;
345 }
346
347 /* Query whether an image with the specified layout is compressible */
348 static inline bool
ail_can_compress(enum pipe_format format,unsigned w_px,unsigned h_px,unsigned sample_count_sa)349 ail_can_compress(enum pipe_format format, unsigned w_px, unsigned h_px,
350 unsigned sample_count_sa)
351 {
352 assert(sample_count_sa == 1 || sample_count_sa == 2 || sample_count_sa == 4);
353
354 /* We compress via the PBE, so we can only compress PBE-writeable formats. */
355 if (ail_pixel_format[format].renderable == PIPE_FORMAT_NONE &&
356 !util_format_is_depth_or_stencil(format))
357 return false;
358
359 /* Lossy-compressed texture formats cannot be compressed */
360 assert(!util_format_is_compressed(format) &&
361 "block-compressed formats are not renderable");
362
363 /* Small textures cannot be compressed */
364 return ail_effective_width_sa(w_px, sample_count_sa) >= 16 &&
365 ail_effective_height_sa(h_px, sample_count_sa) >= 16;
366 }
367
368 /* AGX compression mode for a solid colour for the subtile */
369 #define AIL_COMP_SOLID 0x3
370
371 /* AGX compression mode for an uncompessed subtile. Frustratingly, this seems to
372 * depend on the format. It is possible that modes are actual 8-bit structures
373 * with multiple fields rather than plain enumerations.
374 */
375 #define AIL_COMP_UNCOMPRESSED_1 0x1f
376 #define AIL_COMP_UNCOMPRESSED_2 0x3f
377 #define AIL_COMP_UNCOMPRESSED_4 0x7f
378 #define AIL_COMP_UNCOMPRESSED_8_16 0xff
379
380 static inline uint8_t
ail_subtile_uncompressed_mode(enum pipe_format format)381 ail_subtile_uncompressed_mode(enum pipe_format format)
382 {
383 /* clang-format off */
384 switch (util_format_get_blocksize(format)) {
385 case 1: return AIL_COMP_UNCOMPRESSED_1;
386 case 2: return AIL_COMP_UNCOMPRESSED_2;
387 case 4: return AIL_COMP_UNCOMPRESSED_4;
388 case 8:
389 case 16: return AIL_COMP_UNCOMPRESSED_8_16;
390 default: unreachable("invalid block size");
391 }
392 /* clang-format on */
393 }
394
395 /*
396 * Compression modes are 8-bit per 8x4 subtile, but grouped into 64-bit for all
397 * modes in a 16x16 tile. This helper replicates a subtile mode to a tile mode
398 * using a SWAR idiom.
399 */
400 static inline uint64_t
ail_tile_mode_replicated(uint8_t subtile_mode)401 ail_tile_mode_replicated(uint8_t subtile_mode)
402 {
403 return (uint64_t)subtile_mode * 0x0101010101010101ULL;
404 }
405
406 /*
407 * Composed convenience function.
408 */
409 static inline uint64_t
ail_tile_mode_uncompressed(enum pipe_format format)410 ail_tile_mode_uncompressed(enum pipe_format format)
411 {
412 return ail_tile_mode_replicated(ail_subtile_uncompressed_mode(format));
413 }
414
415 /*
416 * For compression, compatible formats must have the same number/size/order of
417 * channels, but may differ in data type. For example, R32_SINT is compatible
418 * with Z32_FLOAT, but not with R16G16_SINT. This is the relation given by the
419 * "channels" part of the decomposed format.
420 *
421 * This has not been exhaustively tested and might be missing some corner cases
422 * around XR formats, but is well-motivated and seems to work.
423 */
424 static inline bool
ail_formats_compatible(enum pipe_format a,enum pipe_format b)425 ail_formats_compatible(enum pipe_format a, enum pipe_format b)
426 {
427 return ail_pixel_format[a].channels == ail_pixel_format[b].channels;
428 }
429
430 static inline bool
ail_is_view_compatible(struct ail_layout * layout,enum pipe_format view)431 ail_is_view_compatible(struct ail_layout *layout, enum pipe_format view)
432 {
433 return !ail_is_compressed(layout) ||
434 ail_formats_compatible(layout->format, view);
435 }
436
437 #ifdef __cplusplus
438 } /* extern C */
439 #endif
440