xref: /aosp_15_r20/external/mesa3d/src/compiler/shader_enums.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Mesa 3-D graphics library
3  *
4  * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.
5  * Copyright (C) 2009  VMware, Inc.  All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the "Software"),
9  * to deal in the Software without restriction, including without limitation
10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11  * and/or sell copies of the Software, and to permit persons to whom the
12  * Software is furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included
15  * in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23  * OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef SHADER_ENUMS_H
27 #define SHADER_ENUMS_H
28 
29 #ifndef __OPENCL_VERSION__
30 #include <stdbool.h>
31 #include "util/macros.h"
32 #include "util/u_debug.h"
33 #else
34 #define ENUM_PACKED
35 #define BITFIELD_BIT(b) (1u << (b))
36 #define debug_printf(x, ...)
37 #endif
38 
39 /* Project-wide (GL and Vulkan) maximum. */
40 #define MAX_DRAW_BUFFERS 8
41 
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45 
46 /**
47  * Shader stages.
48  *
49  * The order must match how shaders are ordered in the pipeline.
50  * The GLSL linker assumes that if i<j, then the j-th shader is
51  * executed later than the i-th shader.
52  */
53 typedef enum pipe_shader_type
54 {
55    MESA_SHADER_NONE = -1,
56    MESA_SHADER_VERTEX = 0,
57    PIPE_SHADER_VERTEX = MESA_SHADER_VERTEX,
58    MESA_SHADER_TESS_CTRL = 1,
59    PIPE_SHADER_TESS_CTRL = MESA_SHADER_TESS_CTRL,
60    MESA_SHADER_TESS_EVAL = 2,
61    PIPE_SHADER_TESS_EVAL = MESA_SHADER_TESS_EVAL,
62    MESA_SHADER_GEOMETRY = 3,
63    PIPE_SHADER_GEOMETRY = MESA_SHADER_GEOMETRY,
64    MESA_SHADER_FRAGMENT = 4,
65    PIPE_SHADER_FRAGMENT = MESA_SHADER_FRAGMENT,
66    MESA_SHADER_COMPUTE = 5,
67    PIPE_SHADER_COMPUTE = MESA_SHADER_COMPUTE,
68 
69    PIPE_SHADER_TYPES = (PIPE_SHADER_COMPUTE + 1),
70    /* Vulkan-only stages. */
71    MESA_SHADER_TASK         = 6,
72    PIPE_SHADER_TASK = MESA_SHADER_TASK,
73    MESA_SHADER_MESH         = 7,
74    PIPE_SHADER_MESH = MESA_SHADER_MESH,
75    PIPE_SHADER_MESH_TYPES = (PIPE_SHADER_MESH + 1),
76 
77    MESA_SHADER_RAYGEN       = 8,
78    MESA_SHADER_ANY_HIT      = 9,
79    MESA_SHADER_CLOSEST_HIT  = 10,
80    MESA_SHADER_MISS         = 11,
81    MESA_SHADER_INTERSECTION = 12,
82    MESA_SHADER_CALLABLE     = 13,
83 
84    /* must be last so it doesn't affect the GL pipeline */
85    MESA_SHADER_KERNEL = 14,
86 } gl_shader_stage;
87 
88 static inline bool
gl_shader_stage_is_compute(gl_shader_stage stage)89 gl_shader_stage_is_compute(gl_shader_stage stage)
90 {
91    return stage == MESA_SHADER_COMPUTE || stage == MESA_SHADER_KERNEL;
92 }
93 
94 static inline bool
gl_shader_stage_is_mesh(gl_shader_stage stage)95 gl_shader_stage_is_mesh(gl_shader_stage stage)
96 {
97    return stage == MESA_SHADER_TASK ||
98           stage == MESA_SHADER_MESH;
99 }
100 
101 static inline bool
gl_shader_stage_uses_workgroup(gl_shader_stage stage)102 gl_shader_stage_uses_workgroup(gl_shader_stage stage)
103 {
104    return stage == MESA_SHADER_COMPUTE ||
105           stage == MESA_SHADER_KERNEL ||
106           stage == MESA_SHADER_TASK ||
107           stage == MESA_SHADER_MESH;
108 }
109 
110 static inline bool
gl_shader_stage_is_callable(gl_shader_stage stage)111 gl_shader_stage_is_callable(gl_shader_stage stage)
112 {
113    return stage == MESA_SHADER_ANY_HIT ||
114           stage == MESA_SHADER_CLOSEST_HIT ||
115           stage == MESA_SHADER_MISS ||
116           stage == MESA_SHADER_INTERSECTION ||
117           stage == MESA_SHADER_CALLABLE;
118 }
119 
120 static inline bool
gl_shader_stage_is_rt(gl_shader_stage stage)121 gl_shader_stage_is_rt(gl_shader_stage stage)
122 {
123    return stage == MESA_SHADER_RAYGEN || gl_shader_stage_is_callable(stage);
124 }
125 
126 static inline bool
gl_shader_stage_can_set_fragment_shading_rate(gl_shader_stage stage)127 gl_shader_stage_can_set_fragment_shading_rate(gl_shader_stage stage)
128 {
129    /* According to EXT_fragment_shading_rate :
130     *
131     *    "This extension adds support for setting the fragment shading rate
132     *     for a primitive in vertex, geometry, and mesh shading stages"
133     */
134    return stage == MESA_SHADER_VERTEX ||
135           stage == MESA_SHADER_GEOMETRY ||
136           stage == MESA_SHADER_MESH;
137 }
138 
139 /**
140  * Number of STATE_* values we need to address any GL state.
141  * Used to dimension arrays.
142  */
143 #define STATE_LENGTH 4
144 
145 typedef short gl_state_index16; /* see enum gl_state_index */
146 
147 const char *gl_shader_stage_name(gl_shader_stage stage);
148 
149 /**
150  * Translate a gl_shader_stage to a short shader stage name for debug
151  * printouts and error messages.
152  */
153 const char *_mesa_shader_stage_to_string(unsigned stage);
154 
155 /**
156  * Translate a gl_shader_stage to a shader stage abbreviation (VS, GS, FS)
157  * for debug printouts and error messages.
158  */
159 const char *_mesa_shader_stage_to_abbrev(unsigned stage);
160 
161 /**
162  * GL related stages (not including CL)
163  */
164 #define MESA_SHADER_STAGES (MESA_SHADER_COMPUTE + 1)
165 
166 /**
167  * Vulkan stages (not including CL)
168  */
169 #define MESA_VULKAN_SHADER_STAGES (MESA_SHADER_CALLABLE + 1)
170 
171 /**
172  * All stages
173  */
174 #define MESA_ALL_SHADER_STAGES (MESA_SHADER_KERNEL + 1)
175 
176 
177 /**
178  * Indexes for vertex program attributes.
179  * GL_NV_vertex_program aliases generic attributes over the conventional
180  * attributes.  In GL_ARB_vertex_program shader the aliasing is optional.
181  * In GL_ARB_vertex_shader / OpenGL 2.0 the aliasing is disallowed (the
182  * generic attributes are distinct/separate).
183  */
184 typedef enum
185 {
186    VERT_ATTRIB_POS,
187    VERT_ATTRIB_NORMAL,
188    VERT_ATTRIB_COLOR0,
189    VERT_ATTRIB_COLOR1,
190    VERT_ATTRIB_FOG,
191    VERT_ATTRIB_COLOR_INDEX,
192    VERT_ATTRIB_TEX0,
193    VERT_ATTRIB_TEX1,
194    VERT_ATTRIB_TEX2,
195    VERT_ATTRIB_TEX3,
196    VERT_ATTRIB_TEX4,
197    VERT_ATTRIB_TEX5,
198    VERT_ATTRIB_TEX6,
199    VERT_ATTRIB_TEX7,
200    VERT_ATTRIB_POINT_SIZE,
201    VERT_ATTRIB_GENERIC0,
202    VERT_ATTRIB_GENERIC1,
203    VERT_ATTRIB_GENERIC2,
204    VERT_ATTRIB_GENERIC3,
205    VERT_ATTRIB_GENERIC4,
206    VERT_ATTRIB_GENERIC5,
207    VERT_ATTRIB_GENERIC6,
208    VERT_ATTRIB_GENERIC7,
209    VERT_ATTRIB_GENERIC8,
210    VERT_ATTRIB_GENERIC9,
211    VERT_ATTRIB_GENERIC10,
212    VERT_ATTRIB_GENERIC11,
213    VERT_ATTRIB_GENERIC12,
214    VERT_ATTRIB_GENERIC13,
215    VERT_ATTRIB_GENERIC14,
216    VERT_ATTRIB_GENERIC15,
217    /* This must be last to keep VS inputs and vertex attributes in the same
218     * order in st/mesa, and st/mesa always adds edgeflags as the last input.
219     */
220    VERT_ATTRIB_EDGEFLAG,
221    VERT_ATTRIB_MAX
222 } gl_vert_attrib;
223 
224 const char *gl_vert_attrib_name(gl_vert_attrib attrib);
225 
226 /**
227  * Max number of texture coordinate units.  This mainly just applies to
228  * the fixed-function vertex code.  This will be difficult to raise above
229  * eight because of various vertex attribute bitvectors.
230  */
231 #define MAX_TEXTURE_COORD_UNITS     8
232 #define MAX_VERTEX_GENERIC_ATTRIBS  16
233 
234 /**
235  * Symbolic constats to help iterating over
236  * specific blocks of vertex attributes.
237  *
238  * VERT_ATTRIB_TEX
239  *   include the classic texture coordinate attributes.
240  * VERT_ATTRIB_GENERIC
241  *   include the OpenGL 2.0+ GLSL generic shader attributes.
242  *   These alias the generic GL_ARB_vertex_shader attributes.
243  * VERT_ATTRIB_MAT
244  *   include the generic shader attributes used to alias
245  *   varying material values for the TNL shader programs.
246  *   They are located at the end of the generic attribute
247  *   block not to overlap with the generic 0 attribute.
248  */
249 #define VERT_ATTRIB_TEX(i)          (VERT_ATTRIB_TEX0 + (i))
250 #define VERT_ATTRIB_TEX_MAX         MAX_TEXTURE_COORD_UNITS
251 
252 #define VERT_ATTRIB_GENERIC(i)      (VERT_ATTRIB_GENERIC0 + (i))
253 #define VERT_ATTRIB_GENERIC_MAX     MAX_VERTEX_GENERIC_ATTRIBS
254 
255 #define VERT_ATTRIB_MAT0            \
256    (VERT_ATTRIB_GENERIC_MAX - VERT_ATTRIB_MAT_MAX)
257 #define VERT_ATTRIB_MAT(i)          \
258    VERT_ATTRIB_GENERIC((i) + VERT_ATTRIB_MAT0)
259 #define VERT_ATTRIB_MAT_MAX         MAT_ATTRIB_MAX
260 
261 /**
262  * Bitflags for vertex attributes.
263  * These are used in bitfields in many places.
264  */
265 /*@{*/
266 #define VERT_BIT_POS             BITFIELD_BIT(VERT_ATTRIB_POS)
267 #define VERT_BIT_NORMAL          BITFIELD_BIT(VERT_ATTRIB_NORMAL)
268 #define VERT_BIT_COLOR0          BITFIELD_BIT(VERT_ATTRIB_COLOR0)
269 #define VERT_BIT_COLOR1          BITFIELD_BIT(VERT_ATTRIB_COLOR1)
270 #define VERT_BIT_FOG             BITFIELD_BIT(VERT_ATTRIB_FOG)
271 #define VERT_BIT_COLOR_INDEX     BITFIELD_BIT(VERT_ATTRIB_COLOR_INDEX)
272 #define VERT_BIT_TEX0            BITFIELD_BIT(VERT_ATTRIB_TEX0)
273 #define VERT_BIT_TEX1            BITFIELD_BIT(VERT_ATTRIB_TEX1)
274 #define VERT_BIT_TEX2            BITFIELD_BIT(VERT_ATTRIB_TEX2)
275 #define VERT_BIT_TEX3            BITFIELD_BIT(VERT_ATTRIB_TEX3)
276 #define VERT_BIT_TEX4            BITFIELD_BIT(VERT_ATTRIB_TEX4)
277 #define VERT_BIT_TEX5            BITFIELD_BIT(VERT_ATTRIB_TEX5)
278 #define VERT_BIT_TEX6            BITFIELD_BIT(VERT_ATTRIB_TEX6)
279 #define VERT_BIT_TEX7            BITFIELD_BIT(VERT_ATTRIB_TEX7)
280 #define VERT_BIT_POINT_SIZE      BITFIELD_BIT(VERT_ATTRIB_POINT_SIZE)
281 #define VERT_BIT_GENERIC0        BITFIELD_BIT(VERT_ATTRIB_GENERIC0)
282 #define VERT_BIT_EDGEFLAG        BITFIELD_BIT(VERT_ATTRIB_EDGEFLAG)
283 
284 #define VERT_BIT(i)              BITFIELD_BIT(i)
285 #define VERT_BIT_ALL             BITFIELD_RANGE(0, VERT_ATTRIB_MAX)
286 
287 #define VERT_BIT_FF_ALL          (BITFIELD_RANGE(0, VERT_ATTRIB_GENERIC0) | \
288                                   VERT_BIT_EDGEFLAG)
289 #define VERT_BIT_TEX(i)          VERT_BIT(VERT_ATTRIB_TEX(i))
290 #define VERT_BIT_TEX_ALL         \
291    BITFIELD_RANGE(VERT_ATTRIB_TEX(0), VERT_ATTRIB_TEX_MAX)
292 
293 #define VERT_BIT_GENERIC(i)      VERT_BIT(VERT_ATTRIB_GENERIC(i))
294 #define VERT_BIT_GENERIC_ALL     \
295    BITFIELD_RANGE(VERT_ATTRIB_GENERIC(0), VERT_ATTRIB_GENERIC_MAX)
296 
297 #define VERT_BIT_MAT(i)	         VERT_BIT(VERT_ATTRIB_MAT(i))
298 #define VERT_BIT_MAT_ALL         \
299    BITFIELD_RANGE(VERT_ATTRIB_MAT(0), VERT_ATTRIB_MAT_MAX)
300 
301 #define VERT_ATTRIB_SELECT_RESULT_OFFSET VERT_ATTRIB_GENERIC(3)
302 #define VERT_BIT_SELECT_RESULT_OFFSET VERT_BIT_GENERIC(3)
303 /*@}*/
304 
305 #define MAX_VARYING 32 /**< number of float[4] vectors */
306 
307 /**
308  * Indexes for vertex shader outputs, geometry shader inputs/outputs, and
309  * fragment shader inputs.
310  *
311  * Note that some of these values are not available to all pipeline stages.
312  *
313  * When this enum is updated, the following code must be updated too:
314  * - vertResults (in prog_print.c's arb_output_attrib_string())
315  * - fragAttribs (in prog_print.c's arb_input_attrib_string())
316  * - _mesa_varying_slot_in_fs()
317  * - gl_varying_slot_name_for_stage()
318  */
319 typedef enum
320 {
321    VARYING_SLOT_POS,
322    VARYING_SLOT_COL0, /* COL0 and COL1 must be contiguous */
323    VARYING_SLOT_COL1,
324    VARYING_SLOT_FOGC,
325    VARYING_SLOT_TEX0, /* TEX0-TEX7 must be contiguous */
326    VARYING_SLOT_TEX1,
327    VARYING_SLOT_TEX2,
328    VARYING_SLOT_TEX3,
329    VARYING_SLOT_TEX4,
330    VARYING_SLOT_TEX5,
331    VARYING_SLOT_TEX6,
332    VARYING_SLOT_TEX7,
333    VARYING_SLOT_PSIZ, /* Does not appear in FS */
334    VARYING_SLOT_BFC0, /* Does not appear in FS */
335    VARYING_SLOT_BFC1, /* Does not appear in FS */
336    VARYING_SLOT_EDGE, /* Does not appear in FS */
337    VARYING_SLOT_CLIP_VERTEX, /* Does not appear in FS */
338    VARYING_SLOT_CLIP_DIST0,
339    VARYING_SLOT_CLIP_DIST1,
340    VARYING_SLOT_CULL_DIST0,
341    VARYING_SLOT_CULL_DIST1,
342    VARYING_SLOT_PRIMITIVE_ID, /* Does not appear in VS */
343    VARYING_SLOT_LAYER, /* Appears as VS or GS output */
344    VARYING_SLOT_VIEWPORT, /* Appears as VS or GS output */
345    VARYING_SLOT_FACE, /* FS only */
346    VARYING_SLOT_PNTC, /* FS only */
347    VARYING_SLOT_TESS_LEVEL_OUTER, /* Only appears as TCS output. */
348    VARYING_SLOT_TESS_LEVEL_INNER, /* Only appears as TCS output. */
349    VARYING_SLOT_BOUNDING_BOX0, /* Only appears as TCS output. */
350    VARYING_SLOT_BOUNDING_BOX1, /* Only appears as TCS output. */
351    VARYING_SLOT_VIEW_INDEX,
352    VARYING_SLOT_VIEWPORT_MASK, /* Does not appear in FS */
353    VARYING_SLOT_PRIMITIVE_SHADING_RATE = VARYING_SLOT_FACE, /* Does not appear in FS. */
354 
355    VARYING_SLOT_PRIMITIVE_COUNT = VARYING_SLOT_TESS_LEVEL_OUTER, /* Only appears in MESH. */
356    VARYING_SLOT_PRIMITIVE_INDICES = VARYING_SLOT_TESS_LEVEL_INNER, /* Only appears in MESH. */
357    VARYING_SLOT_TASK_COUNT = VARYING_SLOT_BOUNDING_BOX0, /* Only appears in TASK. */
358    VARYING_SLOT_CULL_PRIMITIVE = VARYING_SLOT_BOUNDING_BOX0, /* Only appears in MESH. */
359 
360    VARYING_SLOT_VAR0 = 32, /* First generic varying slot */
361    /* the remaining are simply for the benefit of gl_varying_slot_name()
362     * and not to be construed as an upper bound:
363     */
364    VARYING_SLOT_VAR1,
365    VARYING_SLOT_VAR2,
366    VARYING_SLOT_VAR3,
367    VARYING_SLOT_VAR4,
368    VARYING_SLOT_VAR5,
369    VARYING_SLOT_VAR6,
370    VARYING_SLOT_VAR7,
371    VARYING_SLOT_VAR8,
372    VARYING_SLOT_VAR9,
373    VARYING_SLOT_VAR10,
374    VARYING_SLOT_VAR11,
375    VARYING_SLOT_VAR12,
376    VARYING_SLOT_VAR13,
377    VARYING_SLOT_VAR14,
378    VARYING_SLOT_VAR15,
379    VARYING_SLOT_VAR16,
380    VARYING_SLOT_VAR17,
381    VARYING_SLOT_VAR18,
382    VARYING_SLOT_VAR19,
383    VARYING_SLOT_VAR20,
384    VARYING_SLOT_VAR21,
385    VARYING_SLOT_VAR22,
386    VARYING_SLOT_VAR23,
387    VARYING_SLOT_VAR24,
388    VARYING_SLOT_VAR25,
389    VARYING_SLOT_VAR26,
390    VARYING_SLOT_VAR27,
391    VARYING_SLOT_VAR28,
392    VARYING_SLOT_VAR29,
393    VARYING_SLOT_VAR30,
394    VARYING_SLOT_VAR31,
395    /* Per-patch varyings for tessellation. */
396    VARYING_SLOT_PATCH0,
397    VARYING_SLOT_PATCH1,
398    VARYING_SLOT_PATCH2,
399    VARYING_SLOT_PATCH3,
400    VARYING_SLOT_PATCH4,
401    VARYING_SLOT_PATCH5,
402    VARYING_SLOT_PATCH6,
403    VARYING_SLOT_PATCH7,
404    VARYING_SLOT_PATCH8,
405    VARYING_SLOT_PATCH9,
406    VARYING_SLOT_PATCH10,
407    VARYING_SLOT_PATCH11,
408    VARYING_SLOT_PATCH12,
409    VARYING_SLOT_PATCH13,
410    VARYING_SLOT_PATCH14,
411    VARYING_SLOT_PATCH15,
412    VARYING_SLOT_PATCH16,
413    VARYING_SLOT_PATCH17,
414    VARYING_SLOT_PATCH18,
415    VARYING_SLOT_PATCH19,
416    VARYING_SLOT_PATCH20,
417    VARYING_SLOT_PATCH21,
418    VARYING_SLOT_PATCH22,
419    VARYING_SLOT_PATCH23,
420    VARYING_SLOT_PATCH24,
421    VARYING_SLOT_PATCH25,
422    VARYING_SLOT_PATCH26,
423    VARYING_SLOT_PATCH27,
424    VARYING_SLOT_PATCH28,
425    VARYING_SLOT_PATCH29,
426    VARYING_SLOT_PATCH30,
427    VARYING_SLOT_PATCH31,
428    /* 32 16-bit vec4 slots packed in 16 32-bit vec4 slots for GLES/mediump.
429     * They are really just additional generic slots used for 16-bit data to
430     * prevent conflicts between neighboring mediump and non-mediump varyings
431     * that can't be packed without breaking one or the other, which is
432     * a limitation of separate shaders. This allows linking shaders in 32 bits
433     * and then get an optimally packed 16-bit varyings by remapping the IO
434     * locations to these slots. The remapping can also be undone trivially.
435     *
436     * nir_io_semantics::high_16bit determines which half of the slot is
437     * accessed. The low and high halves share the same IO "base" number.
438     * Drivers can treat these as 32-bit slots everywhere except for FP16
439     * interpolation.
440     */
441    VARYING_SLOT_VAR0_16BIT,
442    VARYING_SLOT_VAR1_16BIT,
443    VARYING_SLOT_VAR2_16BIT,
444    VARYING_SLOT_VAR3_16BIT,
445    VARYING_SLOT_VAR4_16BIT,
446    VARYING_SLOT_VAR5_16BIT,
447    VARYING_SLOT_VAR6_16BIT,
448    VARYING_SLOT_VAR7_16BIT,
449    VARYING_SLOT_VAR8_16BIT,
450    VARYING_SLOT_VAR9_16BIT,
451    VARYING_SLOT_VAR10_16BIT,
452    VARYING_SLOT_VAR11_16BIT,
453    VARYING_SLOT_VAR12_16BIT,
454    VARYING_SLOT_VAR13_16BIT,
455    VARYING_SLOT_VAR14_16BIT,
456    VARYING_SLOT_VAR15_16BIT,
457 
458    NUM_TOTAL_VARYING_SLOTS,
459 } gl_varying_slot;
460 
461 
462 #define VARYING_SLOT_MAX	(VARYING_SLOT_VAR0 + MAX_VARYING)
463 #define VARYING_SLOT_TESS_MAX	(VARYING_SLOT_PATCH0 + MAX_VARYING)
464 #define MAX_VARYINGS_INCL_PATCH (VARYING_SLOT_TESS_MAX - VARYING_SLOT_VAR0)
465 
466 const char *gl_varying_slot_name_for_stage(gl_varying_slot slot,
467                                            gl_shader_stage stage);
468 
469 /**
470  * Determine if the given gl_varying_slot appears in the fragment shader.
471  */
472 static inline bool
_mesa_varying_slot_in_fs(gl_varying_slot slot)473 _mesa_varying_slot_in_fs(gl_varying_slot slot)
474 {
475    switch (slot) {
476    case VARYING_SLOT_PSIZ:
477    case VARYING_SLOT_BFC0:
478    case VARYING_SLOT_BFC1:
479    case VARYING_SLOT_EDGE:
480    case VARYING_SLOT_CLIP_VERTEX:
481    case VARYING_SLOT_LAYER:
482    case VARYING_SLOT_TESS_LEVEL_OUTER:
483    case VARYING_SLOT_TESS_LEVEL_INNER:
484    case VARYING_SLOT_BOUNDING_BOX0:
485    case VARYING_SLOT_BOUNDING_BOX1:
486    case VARYING_SLOT_VIEWPORT_MASK:
487       return false;
488    default:
489       return true;
490    }
491 }
492 
493 /**
494  * Bitflags for varying slots.
495  */
496 /*@{*/
497 #define VARYING_BIT_POS BITFIELD64_BIT(VARYING_SLOT_POS)
498 #define VARYING_BIT_COL0 BITFIELD64_BIT(VARYING_SLOT_COL0)
499 #define VARYING_BIT_COL1 BITFIELD64_BIT(VARYING_SLOT_COL1)
500 #define VARYING_BIT_FOGC BITFIELD64_BIT(VARYING_SLOT_FOGC)
501 #define VARYING_BIT_TEX0 BITFIELD64_BIT(VARYING_SLOT_TEX0)
502 #define VARYING_BIT_TEX1 BITFIELD64_BIT(VARYING_SLOT_TEX1)
503 #define VARYING_BIT_TEX2 BITFIELD64_BIT(VARYING_SLOT_TEX2)
504 #define VARYING_BIT_TEX3 BITFIELD64_BIT(VARYING_SLOT_TEX3)
505 #define VARYING_BIT_TEX4 BITFIELD64_BIT(VARYING_SLOT_TEX4)
506 #define VARYING_BIT_TEX5 BITFIELD64_BIT(VARYING_SLOT_TEX5)
507 #define VARYING_BIT_TEX6 BITFIELD64_BIT(VARYING_SLOT_TEX6)
508 #define VARYING_BIT_TEX7 BITFIELD64_BIT(VARYING_SLOT_TEX7)
509 #define VARYING_BIT_TEX(U) BITFIELD64_BIT(VARYING_SLOT_TEX0 + (U))
510 #define VARYING_BITS_TEX_ANY BITFIELD64_RANGE(VARYING_SLOT_TEX0, \
511                                               MAX_TEXTURE_COORD_UNITS)
512 #define VARYING_BIT_PSIZ BITFIELD64_BIT(VARYING_SLOT_PSIZ)
513 #define VARYING_BIT_BFC0 BITFIELD64_BIT(VARYING_SLOT_BFC0)
514 #define VARYING_BIT_BFC1 BITFIELD64_BIT(VARYING_SLOT_BFC1)
515 #define VARYING_BITS_COLOR (VARYING_BIT_COL0 | \
516                             VARYING_BIT_COL1 |        \
517                             VARYING_BIT_BFC0 |        \
518                             VARYING_BIT_BFC1)
519 #define VARYING_BIT_EDGE BITFIELD64_BIT(VARYING_SLOT_EDGE)
520 #define VARYING_BIT_CLIP_VERTEX BITFIELD64_BIT(VARYING_SLOT_CLIP_VERTEX)
521 #define VARYING_BIT_CLIP_DIST0 BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0)
522 #define VARYING_BIT_CLIP_DIST1 BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1)
523 #define VARYING_BIT_CULL_DIST0 BITFIELD64_BIT(VARYING_SLOT_CULL_DIST0)
524 #define VARYING_BIT_CULL_DIST1 BITFIELD64_BIT(VARYING_SLOT_CULL_DIST1)
525 #define VARYING_BIT_PRIMITIVE_ID BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_ID)
526 #define VARYING_BIT_LAYER BITFIELD64_BIT(VARYING_SLOT_LAYER)
527 #define VARYING_BIT_VIEWPORT BITFIELD64_BIT(VARYING_SLOT_VIEWPORT)
528 #define VARYING_BIT_FACE BITFIELD64_BIT(VARYING_SLOT_FACE)
529 #define VARYING_BIT_PRIMITIVE_SHADING_RATE BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_SHADING_RATE)
530 #define VARYING_BIT_PNTC BITFIELD64_BIT(VARYING_SLOT_PNTC)
531 #define VARYING_BIT_TESS_LEVEL_OUTER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER)
532 #define VARYING_BIT_TESS_LEVEL_INNER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER)
533 #define VARYING_BIT_BOUNDING_BOX0 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX0)
534 #define VARYING_BIT_BOUNDING_BOX1 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX1)
535 #define VARYING_BIT_VIEWPORT_MASK BITFIELD64_BIT(VARYING_SLOT_VIEWPORT_MASK)
536 #define VARYING_BIT_VAR(V) BITFIELD64_BIT(VARYING_SLOT_VAR0 + (V))
537 /*@}*/
538 
539 /**
540  * Writemask values, 1 bit per component.
541  */
542 /*@{*/
543 #define WRITEMASK_X     0x1
544 #define WRITEMASK_Y     0x2
545 #define WRITEMASK_XY    0x3
546 #define WRITEMASK_Z     0x4
547 #define WRITEMASK_XZ    0x5
548 #define WRITEMASK_YZ    0x6
549 #define WRITEMASK_XYZ   0x7
550 #define WRITEMASK_W     0x8
551 #define WRITEMASK_XW    0x9
552 #define WRITEMASK_YW    0xa
553 #define WRITEMASK_XYW   0xb
554 #define WRITEMASK_ZW    0xc
555 #define WRITEMASK_XZW   0xd
556 #define WRITEMASK_YZW   0xe
557 #define WRITEMASK_XYZW  0xf
558 /*@}*/
559 
560 /**
561  * If the gl_register_file is PROGRAM_SYSTEM_VALUE, the register index will be
562  * one of these values.  If a NIR variable's mode is nir_var_system_value, it
563  * will be one of these values.
564  */
565 typedef enum
566 {
567    /**
568     * \name System values applicable to all shaders
569     */
570    /*@{*/
571 
572    /**
573     * Builtin variables added by GL_ARB_shader_ballot.
574     */
575    /*@{*/
576 
577    /**
578     * From the GL_ARB_shader-ballot spec:
579     *
580     *    "A sub-group is a collection of invocations which execute in lockstep.
581     *     The variable <gl_SubGroupSizeARB> is the maximum number of
582     *     invocations in a sub-group. The maximum <gl_SubGroupSizeARB>
583     *     supported in this extension is 64."
584     *
585     * The spec defines this as a uniform. However, it's highly unlikely that
586     * implementations actually treat it as a uniform (which is loaded from a
587     * constant buffer). Most likely, this is an implementation-wide constant,
588     * or perhaps something that depends on the shader stage.
589     */
590    SYSTEM_VALUE_SUBGROUP_SIZE,
591 
592    /**
593     * From the GL_ARB_shader_ballot spec:
594     *
595     *    "The variable <gl_SubGroupInvocationARB> holds the index of the
596     *     invocation within sub-group. This variable is in the range 0 to
597     *     <gl_SubGroupSizeARB>-1, where <gl_SubGroupSizeARB> is the total
598     *     number of invocations in a sub-group."
599     */
600    SYSTEM_VALUE_SUBGROUP_INVOCATION,
601 
602    /**
603     * From the GL_ARB_shader_ballot spec:
604     *
605     *    "The <gl_SubGroup??MaskARB> variables provide a bitmask for all
606     *     invocations, with one bit per invocation starting with the least
607     *     significant bit, according to the following table,
608     *
609     *       variable               equation for bit values
610     *       --------------------   ------------------------------------
611     *       gl_SubGroupEqMaskARB   bit index == gl_SubGroupInvocationARB
612     *       gl_SubGroupGeMaskARB   bit index >= gl_SubGroupInvocationARB
613     *       gl_SubGroupGtMaskARB   bit index >  gl_SubGroupInvocationARB
614     *       gl_SubGroupLeMaskARB   bit index <= gl_SubGroupInvocationARB
615     *       gl_SubGroupLtMaskARB   bit index <  gl_SubGroupInvocationARB
616     */
617    SYSTEM_VALUE_SUBGROUP_EQ_MASK,
618    SYSTEM_VALUE_SUBGROUP_GE_MASK,
619    SYSTEM_VALUE_SUBGROUP_GT_MASK,
620    SYSTEM_VALUE_SUBGROUP_LE_MASK,
621    SYSTEM_VALUE_SUBGROUP_LT_MASK,
622    /*@}*/
623 
624    /**
625     * Builtin variables added by VK_KHR_subgroups
626     */
627    /*@{*/
628    SYSTEM_VALUE_NUM_SUBGROUPS,
629    SYSTEM_VALUE_SUBGROUP_ID,
630    /*@}*/
631 
632    /*@}*/
633 
634    /**
635     * \name Vertex shader system values
636     */
637    /*@{*/
638    /**
639     * OpenGL-style vertex ID.
640     *
641     * Section 2.11.7 (Shader Execution), subsection Shader Inputs, of the
642     * OpenGL 3.3 core profile spec says:
643     *
644     *     "gl_VertexID holds the integer index i implicitly passed by
645     *     DrawArrays or one of the other drawing commands defined in section
646     *     2.8.3."
647     *
648     * Section 2.8.3 (Drawing Commands) of the same spec says:
649     *
650     *     "The commands....are equivalent to the commands with the same base
651     *     name (without the BaseVertex suffix), except that the ith element
652     *     transferred by the corresponding draw call will be taken from
653     *     element indices[i] + basevertex of each enabled array."
654     *
655     * Additionally, the overview in the GL_ARB_shader_draw_parameters spec
656     * says:
657     *
658     *     "In unextended GL, vertex shaders have inputs named gl_VertexID and
659     *     gl_InstanceID, which contain, respectively the index of the vertex
660     *     and instance. The value of gl_VertexID is the implicitly passed
661     *     index of the vertex being processed, which includes the value of
662     *     baseVertex, for those commands that accept it."
663     *
664     * gl_VertexID gets basevertex added in.  This differs from DirectX where
665     * SV_VertexID does \b not get basevertex added in.
666     *
667     * \note
668     * If all system values are available, \c SYSTEM_VALUE_VERTEX_ID will be
669     * equal to \c SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus
670     * \c SYSTEM_VALUE_BASE_VERTEX.
671     *
672     * \sa SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, SYSTEM_VALUE_BASE_VERTEX
673     */
674    SYSTEM_VALUE_VERTEX_ID,
675 
676    /**
677     * Instanced ID as supplied to gl_InstanceID
678     *
679     * Values assigned to gl_InstanceID always begin with zero, regardless of
680     * the value of baseinstance.
681     *
682     * Section 11.1.3.9 (Shader Inputs) of the OpenGL 4.4 core profile spec
683     * says:
684     *
685     *     "gl_InstanceID holds the integer instance number of the current
686     *     primitive in an instanced draw call (see section 10.5)."
687     *
688     * Through a big chain of pseudocode, section 10.5 describes that
689     * baseinstance is not counted by gl_InstanceID.  In that section, notice
690     *
691     *     "If an enabled vertex attribute array is instanced (it has a
692     *     non-zero divisor as specified by VertexAttribDivisor), the element
693     *     index that is transferred to the GL, for all vertices, is given by
694     *
695     *         floor(instance/divisor) + baseinstance
696     *
697     *     If an array corresponding to an attribute required by a vertex
698     *     shader is not enabled, then the corresponding element is taken from
699     *     the current attribute state (see section 10.2)."
700     *
701     * Note that baseinstance is \b not included in the value of instance.
702     */
703    SYSTEM_VALUE_INSTANCE_ID,
704 
705    /**
706     * Vulkan InstanceIndex.
707     *
708     * InstanceIndex = gl_InstanceID + gl_BaseInstance
709     */
710    SYSTEM_VALUE_INSTANCE_INDEX,
711 
712    /**
713     * DirectX-style vertex ID.
714     *
715     * Unlike \c SYSTEM_VALUE_VERTEX_ID, this system value does \b not include
716     * the value of basevertex.
717     *
718     * \sa SYSTEM_VALUE_VERTEX_ID, SYSTEM_VALUE_BASE_VERTEX
719     */
720    SYSTEM_VALUE_VERTEX_ID_ZERO_BASE,
721 
722    /**
723     * Value of \c basevertex passed to \c glDrawElementsBaseVertex and similar
724     * functions.
725     *
726     * \sa SYSTEM_VALUE_VERTEX_ID, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
727     */
728    SYSTEM_VALUE_BASE_VERTEX,
729 
730    /**
731     * Depending on the type of the draw call (indexed or non-indexed),
732     * is the value of \c basevertex passed to \c glDrawElementsBaseVertex and
733     * similar, or is the value of \c first passed to \c glDrawArrays and
734     * similar.
735     *
736     * \note
737     * It can be used to calculate the \c SYSTEM_VALUE_VERTEX_ID as
738     * \c SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus \c SYSTEM_VALUE_FIRST_VERTEX.
739     *
740     * \sa SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, SYSTEM_VALUE_VERTEX_ID
741     */
742    SYSTEM_VALUE_FIRST_VERTEX,
743 
744    /**
745     * If the Draw command used to start the rendering was an indexed draw
746     * or not (~0/0). Useful to calculate \c SYSTEM_VALUE_BASE_VERTEX as
747     * \c SYSTEM_VALUE_IS_INDEXED_DRAW & \c SYSTEM_VALUE_FIRST_VERTEX.
748     */
749    SYSTEM_VALUE_IS_INDEXED_DRAW,
750 
751    /**
752     * Value of \c baseinstance passed to instanced draw entry points
753     *
754     * \sa SYSTEM_VALUE_INSTANCE_ID
755     */
756    SYSTEM_VALUE_BASE_INSTANCE,
757 
758    /**
759     * From _ARB_shader_draw_parameters:
760     *
761     *   "Additionally, this extension adds a further built-in variable,
762     *    gl_DrawID to the shading language. This variable contains the index
763     *    of the draw currently being processed by a Multi* variant of a
764     *    drawing command (such as MultiDrawElements or
765     *    MultiDrawArraysIndirect)."
766     *
767     * If GL_ARB_multi_draw_indirect is not supported, this is always 0.
768     */
769    SYSTEM_VALUE_DRAW_ID,
770    /*@}*/
771 
772    /**
773     * \name Geometry shader system values
774     */
775    /*@{*/
776    SYSTEM_VALUE_INVOCATION_ID,  /**< (Also in Tessellation Control shader) */
777    /*@}*/
778 
779    /**
780     * \name Fragment shader system values
781     */
782    /*@{*/
783    SYSTEM_VALUE_FRAG_COORD,
784    SYSTEM_VALUE_POINT_COORD,
785    SYSTEM_VALUE_LINE_COORD, /**< Coord along axis perpendicular to line */
786    SYSTEM_VALUE_FRONT_FACE,
787    SYSTEM_VALUE_SAMPLE_ID,
788    SYSTEM_VALUE_SAMPLE_POS,
789    SYSTEM_VALUE_SAMPLE_POS_OR_CENTER,
790    SYSTEM_VALUE_SAMPLE_MASK_IN,
791    SYSTEM_VALUE_LAYER_ID,
792    SYSTEM_VALUE_HELPER_INVOCATION,
793    SYSTEM_VALUE_COLOR0,
794    SYSTEM_VALUE_COLOR1,
795    /*@}*/
796 
797    /**
798     * \name Tessellation Evaluation shader system values
799     */
800    /*@{*/
801    SYSTEM_VALUE_TESS_COORD,
802    SYSTEM_VALUE_VERTICES_IN,    /**< Tessellation vertices in input patch */
803    SYSTEM_VALUE_PRIMITIVE_ID,
804    SYSTEM_VALUE_TESS_LEVEL_OUTER, /**< TES input */
805    SYSTEM_VALUE_TESS_LEVEL_INNER, /**< TES input */
806    SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT, /**< TCS input for passthru TCS */
807    SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT, /**< TCS input for passthru TCS */
808    /*@}*/
809 
810    /**
811     * \name Compute shader system values
812     */
813    /*@{*/
814    SYSTEM_VALUE_LOCAL_INVOCATION_ID,
815    SYSTEM_VALUE_LOCAL_INVOCATION_INDEX,
816    SYSTEM_VALUE_GLOBAL_INVOCATION_ID,
817    SYSTEM_VALUE_BASE_GLOBAL_INVOCATION_ID,
818    SYSTEM_VALUE_GLOBAL_INVOCATION_INDEX,
819    SYSTEM_VALUE_WORKGROUP_ID,
820    SYSTEM_VALUE_BASE_WORKGROUP_ID,
821    SYSTEM_VALUE_WORKGROUP_INDEX,
822    SYSTEM_VALUE_NUM_WORKGROUPS,
823    SYSTEM_VALUE_WORKGROUP_SIZE,
824    SYSTEM_VALUE_GLOBAL_GROUP_SIZE,
825    SYSTEM_VALUE_WORK_DIM,
826    SYSTEM_VALUE_USER_DATA_AMD,
827    /*@}*/
828 
829    /** Required for VK_KHR_device_group */
830    SYSTEM_VALUE_DEVICE_INDEX,
831 
832    /** Required for VK_KHX_multiview */
833    SYSTEM_VALUE_VIEW_INDEX,
834 
835    /**
836     * Driver internal vertex-count, used (for example) for drivers to
837     * calculate stride for stream-out outputs.  Not externally visible.
838     */
839    SYSTEM_VALUE_VERTEX_CNT,
840 
841    /**
842     * Required for AMD_shader_explicit_vertex_parameter and also used for
843     * varying-fetch instructions.
844     *
845     * The _SIZE value is "primitive size", used to scale i/j in primitive
846     * space to pixel space.
847     */
848    SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL,
849    SYSTEM_VALUE_BARYCENTRIC_PERSP_SAMPLE,
850    SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTROID,
851    SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTER_RHW,
852    SYSTEM_VALUE_BARYCENTRIC_LINEAR_PIXEL,
853    SYSTEM_VALUE_BARYCENTRIC_LINEAR_CENTROID,
854    SYSTEM_VALUE_BARYCENTRIC_LINEAR_SAMPLE,
855    SYSTEM_VALUE_BARYCENTRIC_PULL_MODEL,
856 
857    /**
858     * \name VK_KHR_fragment_shader_barycentric
859     */
860    /*@{*/
861    SYSTEM_VALUE_BARYCENTRIC_PERSP_COORD,
862    SYSTEM_VALUE_BARYCENTRIC_LINEAR_COORD,
863    /*@}*/
864 
865    /**
866     * \name Ray tracing shader system values
867     */
868    /*@{*/
869    SYSTEM_VALUE_RAY_LAUNCH_ID,
870    SYSTEM_VALUE_RAY_LAUNCH_SIZE,
871    SYSTEM_VALUE_RAY_WORLD_ORIGIN,
872    SYSTEM_VALUE_RAY_WORLD_DIRECTION,
873    SYSTEM_VALUE_RAY_OBJECT_ORIGIN,
874    SYSTEM_VALUE_RAY_OBJECT_DIRECTION,
875    SYSTEM_VALUE_RAY_T_MIN,
876    SYSTEM_VALUE_RAY_T_MAX,
877    SYSTEM_VALUE_RAY_OBJECT_TO_WORLD,
878    SYSTEM_VALUE_RAY_WORLD_TO_OBJECT,
879    SYSTEM_VALUE_RAY_HIT_KIND,
880    SYSTEM_VALUE_RAY_FLAGS,
881    SYSTEM_VALUE_RAY_GEOMETRY_INDEX,
882    SYSTEM_VALUE_RAY_INSTANCE_CUSTOM_INDEX,
883    SYSTEM_VALUE_CULL_MASK,
884    SYSTEM_VALUE_RAY_TRIANGLE_VERTEX_POSITIONS,
885    /*@}*/
886 
887    /**
888     * \name Task/Mesh shader system values
889     */
890    /*@{*/
891    SYSTEM_VALUE_MESH_VIEW_COUNT,
892    SYSTEM_VALUE_MESH_VIEW_INDICES,
893    /*@}*/
894 
895    /**
896     * IR3 specific geometry shader and tesselation control shader system
897     * values that packs invocation id, thread id and vertex id.  Having this
898     * as a nir level system value lets us do the unpacking in nir.
899     */
900    SYSTEM_VALUE_GS_HEADER_IR3,
901    SYSTEM_VALUE_TCS_HEADER_IR3,
902 
903    /* IR3 specific system value that contains the patch id for the current
904     * subdraw.
905     */
906    SYSTEM_VALUE_REL_PATCH_ID_IR3,
907 
908    /**
909     * Fragment shading rate used for KHR_fragment_shading_rate (Vulkan).
910     */
911    SYSTEM_VALUE_FRAG_SHADING_RATE,
912 
913    /*
914     * Rasterized fragment is fully covered by the generating primitive
915     * (SPV_EXT_fragment_fully_covered).
916     */
917    SYSTEM_VALUE_FULLY_COVERED,
918 
919    /*
920     * Fragment size and invocation count used for
921     * EXT_fragment_invocation_density (Vulkan).
922     */
923    SYSTEM_VALUE_FRAG_SIZE,
924    SYSTEM_VALUE_FRAG_INVOCATION_COUNT,
925 
926    /* SPV_AMDX_shader_enqueue */
927    SYSTEM_VALUE_SHADER_INDEX,
928    SYSTEM_VALUE_COALESCED_INPUT_COUNT,
929 
930    /* SPV_NV_shader_sm_builtins */
931    SYSTEM_VALUE_WARPS_PER_SM_NV,
932    SYSTEM_VALUE_SM_COUNT_NV,
933    SYSTEM_VALUE_WARP_ID_NV,
934    SYSTEM_VALUE_SM_ID_NV,
935 
936    SYSTEM_VALUE_MAX             /**< Number of values */
937 } gl_system_value;
938 
939 const char *gl_system_value_name(gl_system_value sysval);
940 
941 /**
942  * The possible interpolation qualifiers that can be applied to a fragment
943  * shader input in GLSL.
944  *
945  * Note: INTERP_MODE_NONE must be 0 so that memsetting the
946  * ir_variable data structure to 0 causes the default behavior.
947  */
948 enum glsl_interp_mode
949 {
950    INTERP_MODE_NONE = 0,
951    INTERP_MODE_SMOOTH,
952    INTERP_MODE_FLAT,
953    INTERP_MODE_NOPERSPECTIVE,
954    INTERP_MODE_EXPLICIT,
955    INTERP_MODE_COUNT /**< Number of interpolation qualifiers */
956 };
957 
958 enum glsl_interface_packing {
959    GLSL_INTERFACE_PACKING_STD140,
960    GLSL_INTERFACE_PACKING_SHARED,
961    GLSL_INTERFACE_PACKING_PACKED,
962    GLSL_INTERFACE_PACKING_STD430
963 };
964 
965 const char *glsl_interp_mode_name(enum glsl_interp_mode qual);
966 
967 /**
968  * Fragment program results
969  */
970 typedef enum
971 {
972    FRAG_RESULT_DEPTH = 0,
973    FRAG_RESULT_STENCIL = 1,
974    /* If a single color should be written to all render targets, this
975     * register is written.  No FRAG_RESULT_DATAn will be written.
976     */
977    FRAG_RESULT_COLOR = 2,
978    FRAG_RESULT_SAMPLE_MASK = 3,
979 
980    /* FRAG_RESULT_DATAn are the per-render-target (GLSL gl_FragData[n]
981     * or ARB_fragment_program fragment.color[n]) color results.  If
982     * any are written, FRAG_RESULT_COLOR will not be written.
983     * FRAG_RESULT_DATA1 and up are simply for the benefit of
984     * gl_frag_result_name() and not to be construed as an upper bound
985     */
986    FRAG_RESULT_DATA0 = 4,
987    FRAG_RESULT_DATA1,
988    FRAG_RESULT_DATA2,
989    FRAG_RESULT_DATA3,
990    FRAG_RESULT_DATA4,
991    FRAG_RESULT_DATA5,
992    FRAG_RESULT_DATA6,
993    FRAG_RESULT_DATA7,
994 } gl_frag_result;
995 
996 const char *gl_frag_result_name(gl_frag_result result);
997 
998 #define FRAG_RESULT_MAX		(FRAG_RESULT_DATA0 + MAX_DRAW_BUFFERS)
999 
1000 /**
1001  * \brief Layout qualifiers for gl_FragDepth.
1002  *
1003  * Extension AMD_conservative_depth allows gl_FragDepth to be redeclared with
1004  * a layout qualifier.
1005  *
1006  * \see enum ir_depth_layout
1007  */
1008 enum gl_frag_depth_layout
1009 {
1010    FRAG_DEPTH_LAYOUT_NONE, /**< No layout is specified. */
1011    FRAG_DEPTH_LAYOUT_ANY,
1012    FRAG_DEPTH_LAYOUT_GREATER,
1013    FRAG_DEPTH_LAYOUT_LESS,
1014    FRAG_DEPTH_LAYOUT_UNCHANGED
1015 };
1016 
1017 /**
1018  * \brief Layout qualifiers for AMD_shader_early_and_late_fragment_tests.
1019  */
1020 enum gl_frag_stencil_layout
1021 {
1022    FRAG_STENCIL_LAYOUT_NONE, /**< No layout is specified. */
1023    FRAG_STENCIL_LAYOUT_ANY,
1024    FRAG_STENCIL_LAYOUT_GREATER,
1025    FRAG_STENCIL_LAYOUT_LESS,
1026    FRAG_STENCIL_LAYOUT_UNCHANGED
1027 };
1028 
1029 /**
1030  * \brief Memory access qualifiers
1031  */
1032 enum gl_access_qualifier
1033 {
1034    /**
1035     * This means that the memory scope is the current device. It indicates
1036     * that reads and writes are coherent with reads and writes from other
1037     * shader invocations and other workgroups.
1038     */
1039    ACCESS_COHERENT      = (1 << 0),
1040 
1041    /**
1042     * This means non-aliased. It indicates that the accessed address is not
1043     * accessible through any other memory resource in the shader.
1044     */
1045    ACCESS_RESTRICT      = (1 << 1),
1046 
1047    /**
1048     * The access cannot be eliminated, duplicated, or combined with other
1049     * accesses.
1050     */
1051    ACCESS_VOLATILE      = (1 << 2),
1052 
1053    /* The memory used by the access/variable is not read. */
1054    ACCESS_NON_READABLE  = (1 << 3),
1055 
1056    /* The memory used by the access/variable is not written. */
1057    ACCESS_NON_WRITEABLE = (1 << 4),
1058 
1059    /**
1060     * The access may use a non-uniform buffer or image index.
1061     *
1062     * This is not allowed in either OpenGL or OpenGL ES, or Vulkan unless
1063     * VK_EXT_descriptor_indexing is supported and the appropriate capability is
1064     * enabled.
1065     *
1066     * Some GL spec archaeology justifying this:
1067     *
1068     * Up through at least GLSL ES 3.20 and GLSL 4.50,  "Opaque Types" says "When
1069     * aggregated into arrays within a shader, opaque types can only be indexed
1070     * with a dynamically uniform integral expression (see section 3.9.3) unless
1071     * otherwise noted; otherwise, results are undefined."
1072     *
1073     * The original GL_AB_shader_image_load_store specification for desktop GL
1074     * didn't have this restriction ("Images may be aggregated into arrays within
1075     * a shader (using square brackets [ ]) and can be indexed with general
1076     * integer expressions.")  At the same time,
1077     * GL_ARB_shader_storage_buffer_objects *did* have the uniform restriction
1078     * ("A uniform or shader storage block array can only be indexed with a
1079     * dynamically uniform integral expression, otherwise results are
1080     * undefined"), just like ARB_gpu_shader5 did when it first introduced a
1081     * non-constant indexing of an opaque type with samplers.  So, we assume that
1082     * this was an oversight in the original image_load_store spec, and was
1083     * considered a correction in the merge to core.
1084     */
1085    ACCESS_NON_UNIFORM   = (1 << 5),
1086 
1087    /* This has the same semantics as NIR_INTRINSIC_CAN_REORDER, only to be
1088     * used with loads. In other words, it means that the load can be
1089     * arbitrarily reordered, or combined with other loads to the same address.
1090     * It is implied by ACCESS_NON_WRITEABLE and a lack of ACCESS_VOLATILE.
1091     */
1092    ACCESS_CAN_REORDER = (1 << 6),
1093 
1094    /**
1095     * Hints that the accessed address is not likely to be accessed again
1096     * in the near future. This reduces data retention in caches.
1097     */
1098    ACCESS_NON_TEMPORAL = (1 << 7),
1099 
1100    /** Execute instruction also in helpers. */
1101    ACCESS_INCLUDE_HELPERS = (1 << 8),
1102 
1103    /**
1104     * Whether the address bits are swizzled by the hw. This practically means
1105     * that loads can't be vectorized and must be exactly 32 bits on some chips.
1106     * The swizzle amount is determined by the descriptor.
1107     */
1108    ACCESS_IS_SWIZZLED_AMD = (1 << 9),
1109 
1110    /**
1111     * Whether an AMD-specific buffer intrinsic uses a format conversion.
1112     *
1113     * If unset, the intrinsic will access raw memory without any conversion.
1114     *
1115     * If set, the memory opcode performs a format conversion according to
1116     * the format determined by the descriptor (in a manner identical to image
1117     * buffers and sampler buffers).
1118     */
1119    ACCESS_USES_FORMAT_AMD = (1 << 10),
1120 
1121    /**
1122     * Whether a multi sample image load intrinsic uses sample index extracted
1123     * from fragment mask buffer.
1124     */
1125    ACCESS_FMASK_LOWERED_AMD = (1 << 11),
1126 
1127    /**
1128     * Whether it is safe to speculatively execute this load. This allows
1129     * hoisting loads out of conditional control flow (including out of software
1130     * bounds checks). Setting this optimally depends on knowledge of the
1131     * hardware. Speculation is safe if out-of-bounds access does not trigger
1132     * undefined behaviour (even though the returned value of the speculated load
1133     * is bogus). This is the case if there is hardware-level bounds checking, or
1134     * if MMU faults are suppressed for the load.
1135     */
1136    ACCESS_CAN_SPECULATE = (1 << 12),
1137 
1138    /**
1139     * Whether coherency with CP (command processor) or GE (geometry engine)
1140     * is required.
1141     */
1142    ACCESS_CP_GE_COHERENT_AMD = (1 << 13),
1143 
1144    /* Guarantee that an image_load is in bounds so we can skip robustness code
1145     * on AGX, used for some internal shaders.
1146     */
1147    ACCESS_IN_BOUNDS_AGX = (1 << 14),
1148 
1149    /**
1150     * Disallow vectorization.
1151     *
1152     * On some hw (AMD), sparse buffer loads return 0 for all components if
1153     * a sparse load starts on a non-resident page, crosses the page boundary,
1154     * and ends on a resident page. Sometimes we want it to return 0 only for
1155     * the portion of the load that's non-resident, and load values for
1156     * the portion that's resident. The workaround is to scalarize such loads
1157     * and disallow vectorization. This is used by an internal copy_buffer
1158     * shader where the API wants to copy all bytes that are resident.
1159     */
1160    ACCESS_KEEP_SCALAR = (1 << 15),
1161 };
1162 
1163 /**
1164  * \brief Blend support qualifiers
1165  */
1166 enum gl_advanced_blend_mode
1167 {
1168    BLEND_NONE = 0,
1169    BLEND_MULTIPLY,
1170    BLEND_SCREEN,
1171    BLEND_OVERLAY,
1172    BLEND_DARKEN,
1173    BLEND_LIGHTEN,
1174    BLEND_COLORDODGE,
1175    BLEND_COLORBURN,
1176    BLEND_HARDLIGHT,
1177    BLEND_SOFTLIGHT,
1178    BLEND_DIFFERENCE,
1179    BLEND_EXCLUSION,
1180    BLEND_HSL_HUE,
1181    BLEND_HSL_SATURATION,
1182    BLEND_HSL_COLOR,
1183    BLEND_HSL_LUMINOSITY,
1184 };
1185 
1186 enum gl_tess_spacing
1187 {
1188    TESS_SPACING_UNSPECIFIED,
1189    TESS_SPACING_EQUAL,
1190    TESS_SPACING_FRACTIONAL_ODD,
1191    TESS_SPACING_FRACTIONAL_EVEN,
1192 };
1193 
1194 enum tess_primitive_mode
1195 {
1196    TESS_PRIMITIVE_UNSPECIFIED,
1197    TESS_PRIMITIVE_TRIANGLES,
1198    TESS_PRIMITIVE_QUADS,
1199    TESS_PRIMITIVE_ISOLINES,
1200 };
1201 
1202 static inline void
mesa_count_tess_level_components(const enum tess_primitive_mode mode,unsigned * outer,unsigned * inner)1203 mesa_count_tess_level_components(const enum tess_primitive_mode mode,
1204                                  unsigned *outer, unsigned *inner)
1205 {
1206    switch (mode) {
1207    case TESS_PRIMITIVE_ISOLINES:
1208       *outer = 2;
1209       *inner = 0;
1210       break;
1211    case TESS_PRIMITIVE_TRIANGLES:
1212       *outer = 3;
1213       *inner = 1;
1214       break;
1215    case TESS_PRIMITIVE_QUADS:
1216    default:
1217       *outer = 4;
1218       *inner = 2;
1219       break;
1220    }
1221 }
1222 
1223 /**
1224  * Mesa primitive types for both GL and Vulkan:
1225  */
1226 enum ENUM_PACKED mesa_prim
1227 {
1228    MESA_PRIM_POINTS,
1229    MESA_PRIM_LINES,
1230    MESA_PRIM_LINE_LOOP,
1231    MESA_PRIM_LINE_STRIP,
1232    MESA_PRIM_TRIANGLES,
1233    MESA_PRIM_TRIANGLE_STRIP,
1234    MESA_PRIM_TRIANGLE_FAN,
1235    MESA_PRIM_QUADS,
1236    MESA_PRIM_QUAD_STRIP,
1237    MESA_PRIM_POLYGON,
1238    MESA_PRIM_LINES_ADJACENCY,
1239    MESA_PRIM_LINE_STRIP_ADJACENCY,
1240    MESA_PRIM_TRIANGLES_ADJACENCY,
1241    MESA_PRIM_TRIANGLE_STRIP_ADJACENCY,
1242    MESA_PRIM_PATCHES,
1243    MESA_PRIM_MAX = MESA_PRIM_PATCHES,
1244    MESA_PRIM_COUNT = MESA_PRIM_MAX +1,
1245    MESA_PRIM_UNKNOWN = (MESA_PRIM_MAX * 2),
1246 };
1247 
1248 /**
1249  * Number of vertices per primitive as seen by a geometry or mesh shader.
1250  */
1251 static inline unsigned
mesa_vertices_per_prim(enum mesa_prim prim)1252 mesa_vertices_per_prim(enum mesa_prim prim)
1253 {
1254    switch(prim) {
1255    case MESA_PRIM_POINTS:
1256       return 1;
1257    case MESA_PRIM_LINES:
1258    case MESA_PRIM_LINE_LOOP:
1259    case MESA_PRIM_LINE_STRIP:
1260       return 2;
1261    case MESA_PRIM_TRIANGLES:
1262    case MESA_PRIM_TRIANGLE_STRIP:
1263    case MESA_PRIM_TRIANGLE_FAN:
1264       return 3;
1265    case MESA_PRIM_LINES_ADJACENCY:
1266    case MESA_PRIM_LINE_STRIP_ADJACENCY:
1267       return 4;
1268    case MESA_PRIM_TRIANGLES_ADJACENCY:
1269    case MESA_PRIM_TRIANGLE_STRIP_ADJACENCY:
1270       return 6;
1271 
1272    case MESA_PRIM_QUADS:
1273    case MESA_PRIM_QUAD_STRIP:
1274       /* These won't be seen from geometry shaders but prim assembly might for
1275        * prim id.
1276        */
1277       return 4;
1278 
1279    /* The following primitives should never be used with geometry or mesh
1280     * shaders and their size is undefined.
1281     */
1282    case MESA_PRIM_POLYGON:
1283    default:
1284       debug_printf("Unrecognized geometry or mesh shader primitive");
1285       return 3;
1286    }
1287 }
1288 
1289 /**
1290  * Returns the number of decomposed primitives for the given
1291  * vertex count.
1292  * Parts of the pipline are invoked once for each triangle in
1293  * triangle strip, triangle fans and triangles and once
1294  * for each line in line strip, line loop, lines. Also
1295  * statistics depend on knowing the exact number of decomposed
1296  * primitives for a set of vertices.
1297  */
1298 static inline unsigned
u_decomposed_prims_for_vertices(enum mesa_prim primitive,int vertices)1299 u_decomposed_prims_for_vertices(enum mesa_prim primitive, int vertices)
1300 {
1301    switch (primitive) {
1302    case MESA_PRIM_POINTS:
1303       return vertices;
1304    case MESA_PRIM_LINES:
1305       return vertices / 2;
1306    case MESA_PRIM_LINE_LOOP:
1307       return (vertices >= 2) ? vertices : 0;
1308    case MESA_PRIM_LINE_STRIP:
1309       return (vertices >= 2) ? vertices - 1 : 0;
1310    case MESA_PRIM_TRIANGLES:
1311       return vertices / 3;
1312    case MESA_PRIM_TRIANGLE_STRIP:
1313       return (vertices >= 3) ? vertices - 2 : 0;
1314    case MESA_PRIM_TRIANGLE_FAN:
1315       return (vertices >= 3) ? vertices - 2 : 0;
1316    case MESA_PRIM_LINES_ADJACENCY:
1317       return vertices / 4;
1318    case MESA_PRIM_LINE_STRIP_ADJACENCY:
1319       return (vertices >= 4) ? vertices - 3 : 0;
1320    case MESA_PRIM_TRIANGLES_ADJACENCY:
1321       return vertices / 6;
1322    case MESA_PRIM_TRIANGLE_STRIP_ADJACENCY:
1323       return (vertices >= 6) ? 1 + (vertices - 6) / 2 : 0;
1324    case MESA_PRIM_QUADS:
1325       return vertices / 4;
1326    case MESA_PRIM_QUAD_STRIP:
1327       return (vertices >= 4) ? (vertices - 2) / 2 : 0;
1328    /* Polygons can't be decomposed
1329     * because the number of their vertices isn't known so
1330     * for them and whatever else we don't recognize just
1331     * return 1 if the number of vertices is greater than
1332     * or equal to 3 and zero otherwise */
1333    case MESA_PRIM_POLYGON:
1334    default:
1335       debug_printf("Invalid decomposition primitive!\n");
1336       return (vertices >= 3) ? 1 : 0;
1337    }
1338 }
1339 
1340 /**
1341  * Decompose a primitive that is a loop, a strip, or a fan.  Return the
1342  * original primitive if it is already decomposed.
1343  */
1344 static inline enum mesa_prim
u_decomposed_prim(enum mesa_prim prim)1345 u_decomposed_prim(enum mesa_prim prim)
1346 {
1347    switch (prim) {
1348    case MESA_PRIM_LINE_LOOP:
1349    case MESA_PRIM_LINE_STRIP:
1350       return MESA_PRIM_LINES;
1351    case MESA_PRIM_TRIANGLE_STRIP:
1352    case MESA_PRIM_TRIANGLE_FAN:
1353       return MESA_PRIM_TRIANGLES;
1354    case MESA_PRIM_QUAD_STRIP:
1355       return MESA_PRIM_QUADS;
1356    case MESA_PRIM_LINE_STRIP_ADJACENCY:
1357       return MESA_PRIM_LINES_ADJACENCY;
1358    case MESA_PRIM_TRIANGLE_STRIP_ADJACENCY:
1359       return MESA_PRIM_TRIANGLES_ADJACENCY;
1360    default:
1361       return prim;
1362    }
1363 }
1364 
1365 /**
1366  * Reduce a primitive to one of MESA_PRIM_POINTS, MESA_PRIM_LINES, and
1367  * MESA_PRIM_TRIANGLES.
1368  */
1369 static inline enum mesa_prim
u_reduced_prim(enum mesa_prim prim)1370 u_reduced_prim(enum mesa_prim prim)
1371 {
1372    switch (prim) {
1373    case MESA_PRIM_POINTS:
1374       return MESA_PRIM_POINTS;
1375    case MESA_PRIM_LINES:
1376    case MESA_PRIM_LINE_LOOP:
1377    case MESA_PRIM_LINE_STRIP:
1378    case MESA_PRIM_LINES_ADJACENCY:
1379    case MESA_PRIM_LINE_STRIP_ADJACENCY:
1380       return MESA_PRIM_LINES;
1381    default:
1382       return MESA_PRIM_TRIANGLES;
1383    }
1384 }
1385 
1386 /**
1387  * A compare function enum for use in compiler lowering passes.  This is in
1388  * the same order as GL's compare functions (shifted down by GL_NEVER), and is
1389  * exactly the same as gallium's PIPE_FUNC_*.
1390  */
1391 enum compare_func
1392 {
1393    COMPARE_FUNC_NEVER,
1394    COMPARE_FUNC_LESS,
1395    COMPARE_FUNC_EQUAL,
1396    COMPARE_FUNC_LEQUAL,
1397    COMPARE_FUNC_GREATER,
1398    COMPARE_FUNC_NOTEQUAL,
1399    COMPARE_FUNC_GEQUAL,
1400    COMPARE_FUNC_ALWAYS,
1401 };
1402 
1403 /**
1404  * Arrangements for grouping invocations from NV_compute_shader_derivatives.
1405  *
1406  *   The extension provides new layout qualifiers that support two different
1407  *   arrangements of compute shader invocations for the purpose of derivative
1408  *   computation.  When specifying
1409  *
1410  *     layout(derivative_group_quadsNV) in;
1411  *
1412  *   compute shader invocations are grouped into 2x2x1 arrays whose four local
1413  *   invocation ID values follow the pattern:
1414  *
1415  *       +-----------------+------------------+
1416  *       | (2x+0, 2y+0, z) |  (2x+1, 2y+0, z) |
1417  *       +-----------------+------------------+
1418  *       | (2x+0, 2y+1, z) |  (2x+1, 2y+1, z) |
1419  *       +-----------------+------------------+
1420  *
1421  *   where Y increases from bottom to top.  When specifying
1422  *
1423  *     layout(derivative_group_linearNV) in;
1424  *
1425  *   compute shader invocations are grouped into 2x2x1 arrays whose four local
1426  *   invocation index values follow the pattern:
1427  *
1428  *       +------+------+
1429  *       | 4n+0 | 4n+1 |
1430  *       +------+------+
1431  *       | 4n+2 | 4n+3 |
1432  *       +------+------+
1433  *
1434  *   If neither layout qualifier is specified, derivatives in compute shaders
1435  *   return zero, which is consistent with the handling of built-in texture
1436  *   functions like texture() in GLSL 4.50 compute shaders.
1437  */
1438 enum gl_derivative_group {
1439    DERIVATIVE_GROUP_NONE = 0,
1440    DERIVATIVE_GROUP_QUADS,
1441    DERIVATIVE_GROUP_LINEAR,
1442 };
1443 
1444 enum float_controls
1445 {
1446    /* The order of these matters. For float_controls2, only the first 9 bits
1447     * are used and stored per-instruction in nir_alu_instr::fp_fast_math.
1448     * Any changes in this enum need to be synchronized with that.
1449     */
1450    FLOAT_CONTROLS_DEFAULT_FLOAT_CONTROL_MODE = 0,
1451    FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP16  = BITFIELD_BIT(0),
1452    FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP32  = BITFIELD_BIT(1),
1453    FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP64  = BITFIELD_BIT(2),
1454    FLOAT_CONTROLS_INF_PRESERVE_FP16          = BITFIELD_BIT(3),
1455    FLOAT_CONTROLS_INF_PRESERVE_FP32          = BITFIELD_BIT(4),
1456    FLOAT_CONTROLS_INF_PRESERVE_FP64          = BITFIELD_BIT(5),
1457    FLOAT_CONTROLS_NAN_PRESERVE_FP16          = BITFIELD_BIT(6),
1458    FLOAT_CONTROLS_NAN_PRESERVE_FP32          = BITFIELD_BIT(7),
1459    FLOAT_CONTROLS_NAN_PRESERVE_FP64          = BITFIELD_BIT(8),
1460    FLOAT_CONTROLS_DENORM_PRESERVE_FP16       = BITFIELD_BIT(9),
1461    FLOAT_CONTROLS_DENORM_PRESERVE_FP32       = BITFIELD_BIT(10),
1462    FLOAT_CONTROLS_DENORM_PRESERVE_FP64       = BITFIELD_BIT(11),
1463    FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16  = BITFIELD_BIT(12),
1464    FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32  = BITFIELD_BIT(13),
1465    FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64  = BITFIELD_BIT(14),
1466    FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16     = BITFIELD_BIT(15),
1467    FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32     = BITFIELD_BIT(16),
1468    FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64     = BITFIELD_BIT(17),
1469    FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16     = BITFIELD_BIT(18),
1470    FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32     = BITFIELD_BIT(19),
1471    FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64     = BITFIELD_BIT(20),
1472 
1473    FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16 =
1474       FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP16 |
1475       FLOAT_CONTROLS_INF_PRESERVE_FP16 |
1476       FLOAT_CONTROLS_NAN_PRESERVE_FP16,
1477 
1478    FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32 =
1479       FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP32 |
1480       FLOAT_CONTROLS_INF_PRESERVE_FP32 |
1481       FLOAT_CONTROLS_NAN_PRESERVE_FP32,
1482 
1483    FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64 =
1484       FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP64 |
1485       FLOAT_CONTROLS_INF_PRESERVE_FP64 |
1486       FLOAT_CONTROLS_NAN_PRESERVE_FP64,
1487 
1488    FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE =
1489       FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP16 |
1490       FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP32 |
1491       FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP64,
1492 
1493    FLOAT_CONTROLS_INF_PRESERVE =
1494       FLOAT_CONTROLS_INF_PRESERVE_FP16 |
1495       FLOAT_CONTROLS_INF_PRESERVE_FP32 |
1496       FLOAT_CONTROLS_INF_PRESERVE_FP64,
1497 
1498    FLOAT_CONTROLS_NAN_PRESERVE =
1499       FLOAT_CONTROLS_NAN_PRESERVE_FP16 |
1500       FLOAT_CONTROLS_NAN_PRESERVE_FP32 |
1501       FLOAT_CONTROLS_NAN_PRESERVE_FP64,
1502 };
1503 
1504 /**
1505 * Enums to describe sampler properties used by OpenCL's inline constant samplers.
1506 * These values match the meanings described in the SPIR-V spec.
1507 */
1508 enum cl_sampler_addressing_mode {
1509    SAMPLER_ADDRESSING_MODE_NONE = 0,
1510    SAMPLER_ADDRESSING_MODE_CLAMP_TO_EDGE = 1,
1511    SAMPLER_ADDRESSING_MODE_CLAMP = 2,
1512    SAMPLER_ADDRESSING_MODE_REPEAT = 3,
1513    SAMPLER_ADDRESSING_MODE_REPEAT_MIRRORED = 4,
1514 };
1515 
1516 enum cl_sampler_filter_mode {
1517    SAMPLER_FILTER_MODE_NEAREST = 0,
1518    SAMPLER_FILTER_MODE_LINEAR = 1,
1519 };
1520 
1521 /**
1522  * \name Bit flags used for updating material values.
1523  */
1524 /*@{*/
1525 #define MAT_ATTRIB_FRONT_AMBIENT           0
1526 #define MAT_ATTRIB_BACK_AMBIENT            1
1527 #define MAT_ATTRIB_FRONT_DIFFUSE           2
1528 #define MAT_ATTRIB_BACK_DIFFUSE            3
1529 #define MAT_ATTRIB_FRONT_SPECULAR          4
1530 #define MAT_ATTRIB_BACK_SPECULAR           5
1531 #define MAT_ATTRIB_FRONT_EMISSION          6
1532 #define MAT_ATTRIB_BACK_EMISSION           7
1533 #define MAT_ATTRIB_FRONT_SHININESS         8
1534 #define MAT_ATTRIB_BACK_SHININESS          9
1535 #define MAT_ATTRIB_FRONT_INDEXES           10
1536 #define MAT_ATTRIB_BACK_INDEXES            11
1537 #define MAT_ATTRIB_MAX                     12
1538 
1539 #define MAT_ATTRIB_AMBIENT(f)  (MAT_ATTRIB_FRONT_AMBIENT+(f))
1540 #define MAT_ATTRIB_DIFFUSE(f)  (MAT_ATTRIB_FRONT_DIFFUSE+(f))
1541 #define MAT_ATTRIB_SPECULAR(f) (MAT_ATTRIB_FRONT_SPECULAR+(f))
1542 #define MAT_ATTRIB_EMISSION(f) (MAT_ATTRIB_FRONT_EMISSION+(f))
1543 #define MAT_ATTRIB_SHININESS(f)(MAT_ATTRIB_FRONT_SHININESS+(f))
1544 #define MAT_ATTRIB_INDEXES(f)  (MAT_ATTRIB_FRONT_INDEXES+(f))
1545 
1546 #define MAT_BIT_FRONT_AMBIENT         (1<<MAT_ATTRIB_FRONT_AMBIENT)
1547 #define MAT_BIT_BACK_AMBIENT          (1<<MAT_ATTRIB_BACK_AMBIENT)
1548 #define MAT_BIT_FRONT_DIFFUSE         (1<<MAT_ATTRIB_FRONT_DIFFUSE)
1549 #define MAT_BIT_BACK_DIFFUSE          (1<<MAT_ATTRIB_BACK_DIFFUSE)
1550 #define MAT_BIT_FRONT_SPECULAR        (1<<MAT_ATTRIB_FRONT_SPECULAR)
1551 #define MAT_BIT_BACK_SPECULAR         (1<<MAT_ATTRIB_BACK_SPECULAR)
1552 #define MAT_BIT_FRONT_EMISSION        (1<<MAT_ATTRIB_FRONT_EMISSION)
1553 #define MAT_BIT_BACK_EMISSION         (1<<MAT_ATTRIB_BACK_EMISSION)
1554 #define MAT_BIT_FRONT_SHININESS       (1<<MAT_ATTRIB_FRONT_SHININESS)
1555 #define MAT_BIT_BACK_SHININESS        (1<<MAT_ATTRIB_BACK_SHININESS)
1556 #define MAT_BIT_FRONT_INDEXES         (1<<MAT_ATTRIB_FRONT_INDEXES)
1557 #define MAT_BIT_BACK_INDEXES          (1<<MAT_ATTRIB_BACK_INDEXES)
1558 
1559 /** An enum representing what kind of input gl_SubgroupSize is. */
1560 enum ENUM_PACKED gl_subgroup_size
1561 {
1562    /** Actual subgroup size, whatever that happens to be */
1563    SUBGROUP_SIZE_VARYING = 0,
1564 
1565    /** Subgroup size must appear to be draw or dispatch-uniform
1566     *
1567     * This is the OpenGL behavior
1568     */
1569    SUBGROUP_SIZE_UNIFORM,
1570 
1571    /** Subgroup size must appear to be the API advertised constant
1572     *
1573     * This is the default Vulkan 1.1 behavior
1574     */
1575    SUBGROUP_SIZE_API_CONSTANT,
1576 
1577    /** Subgroup size must actually be the API advertised constant
1578     *
1579     * Not only must the subgroup size match the API advertised constant as
1580     * with SUBGROUP_SIZE_API_CONSTANT but it must also be dispatched such that
1581     * all the subgroups are full if there are enough invocations.
1582     */
1583    SUBGROUP_SIZE_FULL_SUBGROUPS,
1584 
1585    /* These enums are specifically chosen so that the value of the enum is
1586     * also the subgroup size.  If any new values are added, they must respect
1587     * this invariant.
1588     */
1589    SUBGROUP_SIZE_REQUIRE_4   = 4,   /**< VK_EXT_subgroup_size_control */
1590    SUBGROUP_SIZE_REQUIRE_8   = 8,   /**< VK_EXT_subgroup_size_control */
1591    SUBGROUP_SIZE_REQUIRE_16  = 16,  /**< VK_EXT_subgroup_size_control */
1592    SUBGROUP_SIZE_REQUIRE_32  = 32,  /**< VK_EXT_subgroup_size_control */
1593    SUBGROUP_SIZE_REQUIRE_64  = 64,  /**< VK_EXT_subgroup_size_control */
1594    SUBGROUP_SIZE_REQUIRE_128 = 128, /**< VK_EXT_subgroup_size_control */
1595 };
1596 
1597 /* Ordered from narrower to wider scope. */
1598 typedef enum {
1599    SCOPE_NONE,
1600    SCOPE_INVOCATION,
1601    SCOPE_SUBGROUP,
1602    SCOPE_SHADER_CALL,
1603    SCOPE_WORKGROUP,
1604    SCOPE_QUEUE_FAMILY,
1605    SCOPE_DEVICE,
1606 } mesa_scope;
1607 
1608 const char *mesa_scope_name(mesa_scope scope);
1609 
1610 #ifdef __cplusplus
1611 } /* extern "C" */
1612 #endif
1613 
1614 #endif /* SHADER_ENUMS_H */
1615