xref: /aosp_15_r20/external/mesa3d/src/freedreno/drm/msm/msm_pipe.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2012-2018 Rob Clark <[email protected]>
3  * SPDX-License-Identifier: MIT
4  *
5  * Authors:
6  *    Rob Clark <[email protected]>
7  */
8 
9 #include "util/slab.h"
10 
11 #include "freedreno_ringbuffer_sp.h"
12 #include "msm_priv.h"
13 
14 static int
query_param(struct fd_pipe * pipe,uint32_t param,uint64_t * value)15 query_param(struct fd_pipe *pipe, uint32_t param, uint64_t *value)
16 {
17    struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
18    struct drm_msm_param req = {
19       .pipe = msm_pipe->pipe,
20       .param = param,
21    };
22    int ret;
23 
24    ret =
25       drmCommandWriteRead(pipe->dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req));
26    if (ret)
27       return ret;
28 
29    *value = req.value;
30 
31    return 0;
32 }
33 
34 static int
query_queue_param(struct fd_pipe * pipe,uint32_t param,uint64_t * value)35 query_queue_param(struct fd_pipe *pipe, uint32_t param, uint64_t *value)
36 {
37    struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
38    struct drm_msm_submitqueue_query req = {
39       .data = VOID2U64(value),
40       .id = msm_pipe->queue_id,
41       .param = param,
42       .len = sizeof(*value),
43    };
44    int ret;
45 
46    ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_QUERY, &req,
47                              sizeof(req));
48    if (ret)
49       return ret;
50 
51    return 0;
52 }
53 
54 static int
msm_pipe_get_param(struct fd_pipe * pipe,enum fd_param_id param,uint64_t * value)55 msm_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
56                    uint64_t *value)
57 {
58    struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
59    switch (param) {
60    case FD_DEVICE_ID: // XXX probably get rid of this..
61    case FD_GPU_ID:
62       *value = msm_pipe->gpu_id;
63       return 0;
64    case FD_GMEM_SIZE:
65       *value = msm_pipe->gmem;
66       return 0;
67    case FD_GMEM_BASE:
68       *value = msm_pipe->gmem_base;
69       return 0;
70    case FD_CHIP_ID:
71       *value = msm_pipe->chip_id;
72       return 0;
73    case FD_MAX_FREQ:
74       return query_param(pipe, MSM_PARAM_MAX_FREQ, value);
75    case FD_TIMESTAMP:
76       return query_param(pipe, MSM_PARAM_TIMESTAMP, value);
77    case FD_NR_PRIORITIES:
78       return query_param(pipe, MSM_PARAM_PRIORITIES, value);
79    case FD_CTX_FAULTS:
80       return query_queue_param(pipe, MSM_SUBMITQUEUE_PARAM_FAULTS, value);
81    case FD_GLOBAL_FAULTS:
82       return query_param(pipe, MSM_PARAM_FAULTS, value);
83    case FD_SUSPEND_COUNT:
84       return query_param(pipe, MSM_PARAM_SUSPENDS, value);
85    case FD_VA_SIZE:
86       return query_param(pipe, MSM_PARAM_VA_SIZE, value);
87    default:
88       ERROR_MSG("invalid param id: %d", param);
89       return -1;
90    }
91 }
92 
93 static int
set_param(struct fd_pipe * pipe,uint32_t param,uint64_t value)94 set_param(struct fd_pipe *pipe, uint32_t param, uint64_t value)
95 {
96    struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
97    struct drm_msm_param req = {
98       .pipe  = msm_pipe->pipe,
99       .param = param,
100       .value = value,
101    };
102 
103    return drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SET_PARAM,
104                               &req, sizeof(req));
105 }
106 
107 static int
msm_pipe_set_param(struct fd_pipe * pipe,enum fd_param_id param,uint64_t value)108 msm_pipe_set_param(struct fd_pipe *pipe, enum fd_param_id param, uint64_t value)
109 {
110    switch (param) {
111    case FD_SYSPROF:
112       return set_param(pipe, MSM_PARAM_SYSPROF, value);
113    default:
114       ERROR_MSG("invalid param id: %d", param);
115       return -1;
116    }
117 }
118 
119 static int
msm_pipe_wait(struct fd_pipe * pipe,const struct fd_fence * fence,uint64_t timeout)120 msm_pipe_wait(struct fd_pipe *pipe, const struct fd_fence *fence, uint64_t timeout)
121 {
122    struct fd_device *dev = pipe->dev;
123    struct drm_msm_wait_fence req = {
124       .fence = fence->kfence,
125       .queueid = to_msm_pipe(pipe)->queue_id,
126    };
127    int ret;
128 
129    get_abs_timeout(&req.timeout, timeout);
130 
131    ret = drmCommandWrite(dev->fd, DRM_MSM_WAIT_FENCE, &req, sizeof(req));
132    if (ret && (ret != -ETIMEDOUT)) {
133       ERROR_MSG("wait-fence failed! %d (%s)", ret, strerror(errno));
134    }
135 
136    return ret;
137 }
138 
139 static int
open_submitqueue(struct fd_pipe * pipe,uint32_t prio)140 open_submitqueue(struct fd_pipe *pipe, uint32_t prio)
141 {
142    struct drm_msm_submitqueue req = {
143       .flags = 0,
144       .prio = prio,
145    };
146    uint64_t nr_prio = 1;
147    int ret;
148 
149    if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES) {
150       to_msm_pipe(pipe)->queue_id = 0;
151       return 0;
152    }
153 
154    msm_pipe_get_param(pipe, FD_NR_PRIORITIES, &nr_prio);
155 
156    req.prio = MIN2(req.prio, MAX2(nr_prio, 1) - 1);
157 
158    ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_NEW, &req,
159                              sizeof(req));
160    if (ret) {
161       ERROR_MSG("could not create submitqueue! %d (%s)", ret, strerror(errno));
162       return ret;
163    }
164 
165    to_msm_pipe(pipe)->queue_id = req.id;
166    return 0;
167 }
168 
169 static void
close_submitqueue(struct fd_pipe * pipe,uint32_t queue_id)170 close_submitqueue(struct fd_pipe *pipe, uint32_t queue_id)
171 {
172    if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES)
173       return;
174 
175    drmCommandWrite(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE, &queue_id,
176                    sizeof(queue_id));
177 }
178 
179 static void
msm_pipe_destroy(struct fd_pipe * pipe)180 msm_pipe_destroy(struct fd_pipe *pipe)
181 {
182    struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
183 
184    close_submitqueue(pipe, msm_pipe->queue_id);
185    fd_pipe_sp_ringpool_fini(pipe);
186    free(msm_pipe);
187 }
188 
189 static const struct fd_pipe_funcs sp_funcs = {
190    .ringbuffer_new_object = fd_ringbuffer_sp_new_object,
191    .submit_new = msm_submit_sp_new,
192    .flush = fd_pipe_sp_flush,
193    .get_param = msm_pipe_get_param,
194    .set_param = msm_pipe_set_param,
195    .wait = msm_pipe_wait,
196    .destroy = msm_pipe_destroy,
197 };
198 
199 static const struct fd_pipe_funcs legacy_funcs = {
200    .ringbuffer_new_object = msm_ringbuffer_new_object,
201    .submit_new = msm_submit_new,
202    .get_param = msm_pipe_get_param,
203    .set_param = msm_pipe_set_param,
204    .wait = msm_pipe_wait,
205    .destroy = msm_pipe_destroy,
206 };
207 
208 static uint64_t
get_param(struct fd_pipe * pipe,uint32_t param)209 get_param(struct fd_pipe *pipe, uint32_t param)
210 {
211    uint64_t value;
212    int ret = query_param(pipe, param, &value);
213    if (ret) {
214       ERROR_MSG("get-param failed! %d (%s)", ret, strerror(errno));
215       return 0;
216    }
217    return value;
218 }
219 
220 struct fd_pipe *
msm_pipe_new(struct fd_device * dev,enum fd_pipe_id id,uint32_t prio)221 msm_pipe_new(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio)
222 {
223    static const uint32_t pipe_id[] = {
224       [FD_PIPE_3D] = MSM_PIPE_3D0,
225       [FD_PIPE_2D] = MSM_PIPE_2D0,
226    };
227    struct msm_pipe *msm_pipe = NULL;
228    struct fd_pipe *pipe = NULL;
229 
230    msm_pipe = calloc(1, sizeof(*msm_pipe));
231    if (!msm_pipe) {
232       ERROR_MSG("allocation failed");
233       goto fail;
234    }
235 
236    pipe = &msm_pipe->base;
237 
238    if (fd_device_version(dev) >= FD_VERSION_SOFTPIN) {
239       pipe->funcs = &sp_funcs;
240    } else {
241       pipe->funcs = &legacy_funcs;
242    }
243 
244    /* initialize before get_param(): */
245    pipe->dev = dev;
246    msm_pipe->pipe = pipe_id[id];
247 
248    /* these params should be supported since the first version of drm/msm: */
249    msm_pipe->gpu_id = get_param(pipe, MSM_PARAM_GPU_ID);
250    msm_pipe->gmem = get_param(pipe, MSM_PARAM_GMEM_SIZE);
251    msm_pipe->chip_id = get_param(pipe, MSM_PARAM_CHIP_ID);
252 
253    if (fd_device_version(pipe->dev) >= FD_VERSION_GMEM_BASE)
254       msm_pipe->gmem_base = get_param(pipe, MSM_PARAM_GMEM_BASE);
255 
256    if (!(msm_pipe->gpu_id || msm_pipe->chip_id))
257       goto fail;
258 
259    INFO_MSG("Pipe Info:");
260    INFO_MSG(" GPU-id:          %d", msm_pipe->gpu_id);
261    INFO_MSG(" Chip-id:         0x%016"PRIx64, msm_pipe->chip_id);
262    INFO_MSG(" GMEM size:       0x%08x", msm_pipe->gmem);
263 
264    if (open_submitqueue(pipe, prio))
265       goto fail;
266 
267    fd_pipe_sp_ringpool_init(pipe);
268 
269    return pipe;
270 fail:
271    if (pipe)
272       fd_pipe_del(pipe);
273    return NULL;
274 }
275