xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/freedreno/a2xx/fd2_program.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2012 Rob Clark <[email protected]>
3  * SPDX-License-Identifier: MIT
4  *
5  * Authors:
6  *    Rob Clark <[email protected]>
7  *    Jonathan Marek <[email protected]>
8  */
9 
10 #include "nir/tgsi_to_nir.h"
11 #include "pipe/p_state.h"
12 #include "tgsi/tgsi_dump.h"
13 #include "util/format/u_format.h"
14 #include "util/u_inlines.h"
15 #include "util/u_memory.h"
16 #include "util/u_string.h"
17 
18 #include "freedreno_program.h"
19 
20 #include "ir2/instr-a2xx.h"
21 #include "fd2_program.h"
22 #include "fd2_texture.h"
23 #include "fd2_util.h"
24 #include "ir2.h"
25 
26 static struct fd2_shader_stateobj *
create_shader(struct pipe_context * pctx,gl_shader_stage type)27 create_shader(struct pipe_context *pctx, gl_shader_stage type)
28 {
29    struct fd2_shader_stateobj *so = CALLOC_STRUCT(fd2_shader_stateobj);
30    if (!so)
31       return NULL;
32    so->type = type;
33    so->is_a20x = is_a20x(fd_context(pctx)->screen);
34    return so;
35 }
36 
37 static void
delete_shader(struct fd2_shader_stateobj * so)38 delete_shader(struct fd2_shader_stateobj *so)
39 {
40    if (!so)
41       return;
42    ralloc_free(so->nir);
43    for (int i = 0; i < ARRAY_SIZE(so->variant); i++)
44       free(so->variant[i].info.dwords);
45    free(so);
46 }
47 
48 static void
emit(struct fd_ringbuffer * ring,gl_shader_stage type,struct ir2_shader_info * info,struct util_dynarray * patches)49 emit(struct fd_ringbuffer *ring, gl_shader_stage type,
50      struct ir2_shader_info *info, struct util_dynarray *patches)
51 {
52    unsigned i;
53 
54    assert(info->sizedwords);
55 
56    OUT_PKT3(ring, CP_IM_LOAD_IMMEDIATE, 2 + info->sizedwords);
57    OUT_RING(ring, type == MESA_SHADER_FRAGMENT);
58    OUT_RING(ring, info->sizedwords);
59 
60    if (patches)
61       util_dynarray_append(patches, uint32_t *,
62                            &ring->cur[info->mem_export_ptr]);
63 
64    for (i = 0; i < info->sizedwords; i++)
65       OUT_RING(ring, info->dwords[i]);
66 }
67 
68 static int
ir2_glsl_type_size(const struct glsl_type * type,bool bindless)69 ir2_glsl_type_size(const struct glsl_type *type, bool bindless)
70 {
71    return glsl_count_attribute_slots(type, false);
72 }
73 
74 static void *
fd2_fp_state_create(struct pipe_context * pctx,const struct pipe_shader_state * cso)75 fd2_fp_state_create(struct pipe_context *pctx,
76                     const struct pipe_shader_state *cso)
77 {
78    struct fd2_shader_stateobj *so = create_shader(pctx, MESA_SHADER_FRAGMENT);
79    if (!so)
80       return NULL;
81 
82    so->nir = (cso->type == PIPE_SHADER_IR_NIR)
83                 ? cso->ir.nir
84                 : tgsi_to_nir(cso->tokens, pctx->screen, false);
85 
86    NIR_PASS_V(so->nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
87               ir2_glsl_type_size, (nir_lower_io_options)0);
88 
89    if (ir2_optimize_nir(so->nir, true))
90       goto fail;
91 
92    so->first_immediate = so->nir->num_uniforms;
93 
94    ir2_compile(so, 0, NULL);
95 
96    ralloc_free(so->nir);
97    so->nir = NULL;
98    return so;
99 
100 fail:
101    delete_shader(so);
102    return NULL;
103 }
104 
105 static void
fd2_fp_state_delete(struct pipe_context * pctx,void * hwcso)106 fd2_fp_state_delete(struct pipe_context *pctx, void *hwcso)
107 {
108    struct fd2_shader_stateobj *so = hwcso;
109    delete_shader(so);
110 }
111 
112 static void *
fd2_vp_state_create(struct pipe_context * pctx,const struct pipe_shader_state * cso)113 fd2_vp_state_create(struct pipe_context *pctx,
114                     const struct pipe_shader_state *cso)
115 {
116    struct fd2_shader_stateobj *so = create_shader(pctx, MESA_SHADER_VERTEX);
117    if (!so)
118       return NULL;
119 
120    so->nir = (cso->type == PIPE_SHADER_IR_NIR)
121                 ? cso->ir.nir
122                 : tgsi_to_nir(cso->tokens, pctx->screen, false);
123 
124    NIR_PASS_V(so->nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
125               ir2_glsl_type_size, (nir_lower_io_options)0);
126 
127    if (ir2_optimize_nir(so->nir, true))
128       goto fail;
129 
130    so->first_immediate = so->nir->num_uniforms;
131 
132    /* compile binning variant now */
133    ir2_compile(so, 0, NULL);
134 
135    return so;
136 
137 fail:
138    delete_shader(so);
139    return NULL;
140 }
141 
142 static void
fd2_vp_state_delete(struct pipe_context * pctx,void * hwcso)143 fd2_vp_state_delete(struct pipe_context *pctx, void *hwcso)
144 {
145    struct fd2_shader_stateobj *so = hwcso;
146    delete_shader(so);
147 }
148 
149 static void
patch_vtx_fetch(struct fd_context * ctx,struct pipe_vertex_element * elem,instr_fetch_vtx_t * instr,uint16_t dst_swiz)150 patch_vtx_fetch(struct fd_context *ctx, struct pipe_vertex_element *elem,
151                 instr_fetch_vtx_t *instr, uint16_t dst_swiz) assert_dt
152 {
153    struct surface_format fmt = fd2_pipe2surface(elem->src_format);
154 
155    instr->dst_swiz = fd2_vtx_swiz(elem->src_format, dst_swiz);
156    instr->format_comp_all = fmt.sign == SQ_TEX_SIGN_SIGNED;
157    instr->num_format_all = fmt.num_format;
158    instr->format = fmt.format;
159    instr->exp_adjust_all = fmt.exp_adjust;
160    instr->stride = elem->src_stride;
161    instr->offset = elem->src_offset;
162 }
163 
164 static void
patch_fetches(struct fd_context * ctx,struct ir2_shader_info * info,struct fd_vertex_stateobj * vtx,struct fd_texture_stateobj * tex)165 patch_fetches(struct fd_context *ctx, struct ir2_shader_info *info,
166               struct fd_vertex_stateobj *vtx,
167               struct fd_texture_stateobj *tex) assert_dt
168 {
169    for (int i = 0; i < info->num_fetch_instrs; i++) {
170       struct ir2_fetch_info *fi = &info->fetch_info[i];
171 
172       instr_fetch_t *instr = (instr_fetch_t *)&info->dwords[fi->offset];
173       if (instr->opc == VTX_FETCH) {
174          unsigned idx =
175             (instr->vtx.const_index - 20) * 3 + instr->vtx.const_index_sel;
176          patch_vtx_fetch(ctx, &vtx->pipe[idx], &instr->vtx, fi->vtx.dst_swiz);
177          continue;
178       }
179 
180       assert(instr->opc == TEX_FETCH);
181       instr->tex.const_idx = fd2_get_const_idx(ctx, tex, fi->tex.samp_id);
182       instr->tex.src_swiz = fi->tex.src_swiz;
183    }
184 }
185 
186 void
fd2_program_emit(struct fd_context * ctx,struct fd_ringbuffer * ring,struct fd_program_stateobj * prog)187 fd2_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
188                  struct fd_program_stateobj *prog)
189 {
190    struct fd2_shader_stateobj *fp = NULL, *vp;
191    struct ir2_shader_info *fpi, *vpi;
192    struct ir2_frag_linkage *f;
193    uint8_t vs_gprs, fs_gprs = 0, vs_export = 0;
194    enum a2xx_sq_ps_vtx_mode mode = POSITION_1_VECTOR;
195    bool binning = (ctx->batch && ring == ctx->batch->binning);
196    unsigned variant = 0;
197 
198    vp = prog->vs;
199 
200    /* find variant matching the linked fragment shader */
201    if (!binning) {
202       fp = prog->fs;
203       for (variant = 1; variant < ARRAY_SIZE(vp->variant); variant++) {
204          /* if checked all variants, compile a new variant */
205          if (!vp->variant[variant].info.sizedwords) {
206             ir2_compile(vp, variant, fp);
207             break;
208          }
209 
210          /* check if fragment shader linkage matches */
211          if (!memcmp(&vp->variant[variant].f, &fp->variant[0].f,
212                      sizeof(struct ir2_frag_linkage)))
213             break;
214       }
215       assert(variant < ARRAY_SIZE(vp->variant));
216    }
217 
218    vpi = &vp->variant[variant].info;
219    fpi = &fp->variant[0].info;
220    f = &fp->variant[0].f;
221 
222    /* clear/gmem2mem/mem2gmem need to be changed to remove this condition */
223    if (prog != &ctx->solid_prog && prog != &ctx->blit_prog[0]) {
224       patch_fetches(ctx, vpi, ctx->vtx.vtx, &ctx->tex[PIPE_SHADER_VERTEX]);
225       if (fp)
226          patch_fetches(ctx, fpi, NULL, &ctx->tex[PIPE_SHADER_FRAGMENT]);
227    }
228 
229    emit(ring, MESA_SHADER_VERTEX, vpi,
230         binning ? &ctx->batch->shader_patches : NULL);
231 
232    if (fp) {
233       emit(ring, MESA_SHADER_FRAGMENT, fpi, NULL);
234       fs_gprs = (fpi->max_reg < 0) ? 0x80 : fpi->max_reg;
235       vs_export = MAX2(1, f->inputs_count) - 1;
236    }
237 
238    vs_gprs = (vpi->max_reg < 0) ? 0x80 : vpi->max_reg;
239 
240    if (vp->writes_psize && !binning)
241       mode = POSITION_2_VECTORS_SPRITE;
242 
243    /* set register to use for param (fragcoord/pointcoord/frontfacing) */
244    OUT_PKT3(ring, CP_SET_CONSTANT, 2);
245    OUT_RING(ring, CP_REG(REG_A2XX_SQ_CONTEXT_MISC));
246    OUT_RING(ring,
247             A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(CENTERS_ONLY) |
248                COND(fp, A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS(f->inputs_count)) |
249                /* we need SCREEN_XY for both fragcoord and frontfacing */
250                A2XX_SQ_CONTEXT_MISC_SC_OUTPUT_SCREEN_XY);
251 
252    OUT_PKT3(ring, CP_SET_CONSTANT, 2);
253    OUT_RING(ring, CP_REG(REG_A2XX_SQ_PROGRAM_CNTL));
254    OUT_RING(ring,
255             A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE(2) |
256                A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE(mode) |
257                A2XX_SQ_PROGRAM_CNTL_VS_RESOURCE |
258                A2XX_SQ_PROGRAM_CNTL_PS_RESOURCE |
259                A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT(vs_export) |
260                A2XX_SQ_PROGRAM_CNTL_PS_REGS(fs_gprs) |
261                A2XX_SQ_PROGRAM_CNTL_VS_REGS(vs_gprs) |
262                COND(fp && fp->need_param, A2XX_SQ_PROGRAM_CNTL_PARAM_GEN) |
263                COND(!fp, A2XX_SQ_PROGRAM_CNTL_GEN_INDEX_VTX));
264 }
265 
266 void
fd2_prog_init(struct pipe_context * pctx)267 fd2_prog_init(struct pipe_context *pctx)
268 {
269    struct fd_context *ctx = fd_context(pctx);
270    struct fd_program_stateobj *prog;
271    struct fd2_shader_stateobj *so;
272    struct ir2_shader_info *info;
273    instr_fetch_vtx_t *instr;
274 
275    pctx->create_fs_state = fd2_fp_state_create;
276    pctx->delete_fs_state = fd2_fp_state_delete;
277 
278    pctx->create_vs_state = fd2_vp_state_create;
279    pctx->delete_vs_state = fd2_vp_state_delete;
280 
281    fd_prog_init(pctx);
282 
283    /* XXX maybe its possible to reuse patch_vtx_fetch somehow? */
284 
285    prog = &ctx->solid_prog;
286    so = prog->vs;
287    ir2_compile(prog->vs, 1, prog->fs);
288 
289 #define IR2_FETCH_SWIZ_XY01 0xb08
290 #define IR2_FETCH_SWIZ_XYZ1 0xa88
291 
292    info = &so->variant[1].info;
293 
294    instr = (instr_fetch_vtx_t *)&info->dwords[info->fetch_info[0].offset];
295    instr->const_index = 26;
296    instr->const_index_sel = 0;
297    instr->format = FMT_32_32_32_FLOAT;
298    instr->format_comp_all = false;
299    instr->stride = 12;
300    instr->num_format_all = true;
301    instr->dst_swiz = IR2_FETCH_SWIZ_XYZ1;
302 
303    prog = &ctx->blit_prog[0];
304    so = prog->vs;
305    ir2_compile(prog->vs, 1, prog->fs);
306 
307    info = &so->variant[1].info;
308 
309    instr = (instr_fetch_vtx_t *)&info->dwords[info->fetch_info[0].offset];
310    instr->const_index = 26;
311    instr->const_index_sel = 1;
312    instr->format = FMT_32_32_FLOAT;
313    instr->format_comp_all = false;
314    instr->stride = 8;
315    instr->num_format_all = false;
316    instr->dst_swiz = IR2_FETCH_SWIZ_XY01;
317 
318    instr = (instr_fetch_vtx_t *)&info->dwords[info->fetch_info[1].offset];
319    instr->const_index = 26;
320    instr->const_index_sel = 0;
321    instr->format = FMT_32_32_32_FLOAT;
322    instr->format_comp_all = false;
323    instr->stride = 12;
324    instr->num_format_all = false;
325    instr->dst_swiz = IR2_FETCH_SWIZ_XYZ1;
326 }
327