1 /*
2 * Copyright (c) 2011-2024 Broadcom. All Rights Reserved.
3 * The term “Broadcom” refers to Broadcom Inc.
4 * and/or its subsidiaries.
5 * SPDX-License-Identifier: MIT
6 */
7
8
9 #include "util/format/u_formats.h"
10 #include "util/u_debug.h"
11 #include "util/format/u_format.h"
12 #include "util/u_memory.h"
13
14 #include "svga_winsys.h"
15 #include "svga_screen.h"
16 #include "svga_format.h"
17
18
19 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
20 struct vgpu10_format_entry
21 {
22 SVGA3dSurfaceFormat vertex_format;
23 SVGA3dSurfaceFormat pixel_format;
24 SVGA3dSurfaceFormat view_format; /* view format for texture buffer */
25 unsigned flags;
26 };
27
28 struct format_compat_entry
29 {
30 enum pipe_format pformat;
31 const SVGA3dSurfaceFormat *compat_format;
32 };
33
34
35 /**
36 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
37 * Note: the table is ordered according to PIPE_FORMAT_x order.
38 */
39 static const struct vgpu10_format_entry format_conversion_table[] =
40 {
41 /* Gallium format SVGA3D vertex format SVGA3D pixel format SVGA3D texbuf view format Flags */
42 [ PIPE_FORMAT_B8G8R8A8_UNORM ] = { SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
43 [ PIPE_FORMAT_B8G8R8X8_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
44 [ PIPE_FORMAT_B5G5R5A1_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
45 [ PIPE_FORMAT_B5G6R5_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
46 [ PIPE_FORMAT_R10G10B10A2_UNORM ] = { SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS | TF_UAV },
47 [ PIPE_FORMAT_L8_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXX1 },
48 [ PIPE_FORMAT_A8_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_000X | TF_UAV },
49 [ PIPE_FORMAT_I8_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXXX },
50 [ PIPE_FORMAT_L8A8_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UNORM, TF_XXXY },
51 [ PIPE_FORMAT_L16_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXX1 },
52 [ PIPE_FORMAT_Z16_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, SVGA3D_D16_UNORM, 0 },
53 [ PIPE_FORMAT_Z32_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, SVGA3D_D32_FLOAT, 0 },
54 [ PIPE_FORMAT_Z24_UNORM_S8_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
55 [ PIPE_FORMAT_Z24X8_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
56 [ PIPE_FORMAT_R32_FLOAT ] = { SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS | TF_UAV },
57 [ PIPE_FORMAT_R32G32_FLOAT ] = { SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS | TF_UAV },
58 [ PIPE_FORMAT_R32G32B32_FLOAT ] = { SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
59 [ PIPE_FORMAT_R32G32B32A32_FLOAT ] = { SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS | TF_UAV },
60 [ PIPE_FORMAT_R32_USCALED ] = { SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
61 [ PIPE_FORMAT_R32G32_USCALED ] = { SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
62 [ PIPE_FORMAT_R32G32B32_USCALED ] = { SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
63 [ PIPE_FORMAT_R32G32B32A32_USCALED ] = { SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
64 [ PIPE_FORMAT_R32_SSCALED ] = { SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
65 [ PIPE_FORMAT_R32G32_SSCALED ] = { SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
66 [ PIPE_FORMAT_R32G32B32_SSCALED ] = { SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
67 [ PIPE_FORMAT_R32G32B32A32_SSCALED ] = { SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
68 [ PIPE_FORMAT_R16_UNORM ] = { SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS | TF_UAV },
69 [ PIPE_FORMAT_R16G16_UNORM ] = { SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS | TF_UAV },
70 [ PIPE_FORMAT_R16G16B16_UNORM ] = { SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
71 [ PIPE_FORMAT_R16G16B16A16_UNORM ] = { SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS | TF_UAV },
72 [ PIPE_FORMAT_R16_USCALED ] = { SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
73 [ PIPE_FORMAT_R16G16_USCALED ] = { SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
74 [ PIPE_FORMAT_R16G16B16_USCALED ] = { SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
75 [ PIPE_FORMAT_R16G16B16A16_USCALED ] = { SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
76 [ PIPE_FORMAT_R16_SNORM ] = { SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, TF_UAV },
77 [ PIPE_FORMAT_R16G16_SNORM ] = { SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, TF_UAV },
78 [ PIPE_FORMAT_R16G16B16_SNORM ] = { SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
79 [ PIPE_FORMAT_R16G16B16A16_SNORM ] = { SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, TF_UAV },
80 [ PIPE_FORMAT_R16_SSCALED ] = { SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
81 [ PIPE_FORMAT_R16G16_SSCALED ] = { SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
82 [ PIPE_FORMAT_R16G16B16_SSCALED ] = { SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
83 [ PIPE_FORMAT_R16G16B16A16_SSCALED ] = { SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
84 [ PIPE_FORMAT_R8_UNORM ] = { SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_UAV },
85 [ PIPE_FORMAT_R8G8_UNORM ] = { SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS | TF_UAV },
86 [ PIPE_FORMAT_R8G8B8_UNORM ] = { SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
87 [ PIPE_FORMAT_R8G8B8A8_UNORM ] = { SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS | TF_UAV },
88 [ PIPE_FORMAT_R8_USCALED ] = { SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
89 [ PIPE_FORMAT_R8G8_USCALED ] = { SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
90 [ PIPE_FORMAT_R8G8B8_USCALED ] = { SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
91 [ PIPE_FORMAT_R8G8B8A8_USCALED ] = { SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
92 [ PIPE_FORMAT_R8_SNORM ] = { SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, TF_UAV },
93 [ PIPE_FORMAT_R8G8_SNORM ] = { SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, TF_UAV },
94 [ PIPE_FORMAT_R8G8B8_SNORM ] = { SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
95 [ PIPE_FORMAT_R8G8B8A8_SNORM ] = { SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, TF_UAV },
96 [ PIPE_FORMAT_R8_SSCALED ] = { SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
97 [ PIPE_FORMAT_R8G8_SSCALED ] = { SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
98 [ PIPE_FORMAT_R8G8B8_SSCALED ] = { SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
99 [ PIPE_FORMAT_R8G8B8A8_SSCALED ] = { SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
100 [ PIPE_FORMAT_R16_FLOAT ] = { SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS | TF_UAV },
101 [ PIPE_FORMAT_R16G16_FLOAT ] = { SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS | TF_UAV },
102 [ PIPE_FORMAT_R16G16B16_FLOAT ] = { SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
103 [ PIPE_FORMAT_R16G16B16A16_FLOAT ] = { SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS | TF_UAV },
104 [ PIPE_FORMAT_B8G8R8A8_SRGB ] = { SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
105 [ PIPE_FORMAT_B8G8R8X8_SRGB ] = { SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
106 [ PIPE_FORMAT_R8G8B8A8_SRGB ] = { SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
107 [ PIPE_FORMAT_DXT1_RGB ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
108 [ PIPE_FORMAT_DXT1_RGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
109 [ PIPE_FORMAT_DXT3_RGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, SVGA3D_FORMAT_INVALID, 0 },
110 [ PIPE_FORMAT_DXT5_RGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, SVGA3D_FORMAT_INVALID, 0 },
111 [ PIPE_FORMAT_DXT1_SRGB ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
112 [ PIPE_FORMAT_DXT1_SRGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
113 [ PIPE_FORMAT_DXT3_SRGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
114 [ PIPE_FORMAT_DXT5_SRGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
115 [ PIPE_FORMAT_RGTC1_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, SVGA3D_FORMAT_INVALID, 0 },
116 [ PIPE_FORMAT_RGTC1_SNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, SVGA3D_FORMAT_INVALID, 0 },
117 [ PIPE_FORMAT_RGTC2_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, SVGA3D_FORMAT_INVALID, 0 },
118 [ PIPE_FORMAT_RGTC2_SNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, SVGA3D_FORMAT_INVALID, 0 },
119 [ PIPE_FORMAT_R10G10B10A2_USCALED ] = { SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
120 [ PIPE_FORMAT_R11G11B10_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS | TF_UAV },
121 [ PIPE_FORMAT_R9G9B9E5_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3D_FORMAT_INVALID, 0 },
122 [ PIPE_FORMAT_Z32_FLOAT_S8X24_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
123 [ PIPE_FORMAT_B10G10R10A2_UNORM ] = { SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA },
124 [ PIPE_FORMAT_L16A16_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UNORM, TF_XXXY },
125 [ PIPE_FORMAT_A16_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_000X },
126 [ PIPE_FORMAT_I16_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXXX },
127 [ PIPE_FORMAT_A16_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_000X },
128 [ PIPE_FORMAT_L16_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXX1 },
129 [ PIPE_FORMAT_L16A16_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_FLOAT, TF_XXXY },
130 [ PIPE_FORMAT_I16_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXXX },
131 [ PIPE_FORMAT_A32_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_000X },
132 [ PIPE_FORMAT_L32_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXX1 },
133 [ PIPE_FORMAT_L32A32_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_FLOAT, TF_XXXY },
134 [ PIPE_FORMAT_I32_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXXX },
135 [ PIPE_FORMAT_R10G10B10A2_SSCALED ] = { SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
136 [ PIPE_FORMAT_R10G10B10A2_SNORM ] = { SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
137 [ PIPE_FORMAT_B10G10R10A2_USCALED ] = { SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
138 [ PIPE_FORMAT_B10G10R10A2_SSCALED ] = { SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
139 [ PIPE_FORMAT_B10G10R10A2_SNORM ] = { SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
140 [ PIPE_FORMAT_R8_UINT ] = { SVGA3D_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, TF_UAV },
141 [ PIPE_FORMAT_R8G8_UINT ] = { SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, TF_UAV },
142 [ PIPE_FORMAT_R8G8B8_UINT ] = { SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
143 [ PIPE_FORMAT_R8G8B8A8_UINT ] = { SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, TF_UAV },
144 [ PIPE_FORMAT_R8_SINT ] = { SVGA3D_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, TF_UAV },
145 [ PIPE_FORMAT_R8G8_SINT ] = { SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, TF_UAV },
146 [ PIPE_FORMAT_R8G8B8_SINT ] = { SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
147 [ PIPE_FORMAT_R8G8B8A8_SINT ] = { SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, TF_UAV },
148 [ PIPE_FORMAT_R16_UINT ] = { SVGA3D_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, TF_UAV },
149 [ PIPE_FORMAT_R16G16_UINT ] = { SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, TF_UAV },
150 [ PIPE_FORMAT_R16G16B16_UINT ] = { SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
151 [ PIPE_FORMAT_R16G16B16A16_UINT ] = { SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, TF_UAV },
152 [ PIPE_FORMAT_R16_SINT ] = { SVGA3D_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, TF_UAV },
153 [ PIPE_FORMAT_R16G16_SINT ] = { SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, TF_UAV },
154 [ PIPE_FORMAT_R16G16B16_SINT ] = { SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
155 [ PIPE_FORMAT_R16G16B16A16_SINT ] = { SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, TF_UAV },
156 [ PIPE_FORMAT_R32_UINT ] = { SVGA3D_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, TF_UAV },
157 [ PIPE_FORMAT_R32G32_UINT ] = { SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, TF_UAV },
158 [ PIPE_FORMAT_R32G32B32_UINT ] = { SVGA3D_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, 0 },
159 [ PIPE_FORMAT_R32G32B32A32_UINT ] = { SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, TF_UAV },
160 [ PIPE_FORMAT_R32_SINT ] = { SVGA3D_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, TF_UAV },
161 [ PIPE_FORMAT_R32G32_SINT ] = { SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, TF_UAV },
162 [ PIPE_FORMAT_R32G32B32_SINT ] = { SVGA3D_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, 0 },
163 [ PIPE_FORMAT_R32G32B32A32_SINT ] = { SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, TF_UAV },
164 [ PIPE_FORMAT_A8_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_000X },
165 [ PIPE_FORMAT_I8_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXXX },
166 [ PIPE_FORMAT_L8_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXX1 },
167 [ PIPE_FORMAT_L8A8_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UINT, TF_XXXY },
168 [ PIPE_FORMAT_A8_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_000X },
169 [ PIPE_FORMAT_I8_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXXX },
170 [ PIPE_FORMAT_L8_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXX1 },
171 [ PIPE_FORMAT_L8A8_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_SINT, TF_XXXY },
172 [ PIPE_FORMAT_A16_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_000X },
173 [ PIPE_FORMAT_I16_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXXX },
174 [ PIPE_FORMAT_L16_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXX1 },
175 [ PIPE_FORMAT_L16A16_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UINT, TF_XXXY },
176 [ PIPE_FORMAT_A16_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_000X },
177 [ PIPE_FORMAT_I16_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXXX },
178 [ PIPE_FORMAT_L16_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXX1 },
179 [ PIPE_FORMAT_L16A16_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_SINT, TF_XXXY },
180 [ PIPE_FORMAT_A32_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_000X },
181 [ PIPE_FORMAT_I32_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXXX },
182 [ PIPE_FORMAT_L32_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXX1 },
183 [ PIPE_FORMAT_L32A32_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_UINT, TF_XXXY },
184 [ PIPE_FORMAT_A32_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_000X },
185 [ PIPE_FORMAT_I32_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXXX },
186 [ PIPE_FORMAT_L32_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXX1 },
187 [ PIPE_FORMAT_L32A32_SINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_SINT, TF_XXXY },
188 [ PIPE_FORMAT_R10G10B10A2_UINT ] = { SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, TF_UAV },
189 [ PIPE_FORMAT_BPTC_RGBA_UNORM ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC7_UNORM, SVGA3D_FORMAT_INVALID, TF_SM5 },
190 [ PIPE_FORMAT_BPTC_SRGBA ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC7_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_SM5 },
191 [ PIPE_FORMAT_BPTC_RGB_FLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC6H_SF16, SVGA3D_FORMAT_INVALID, TF_SM5 },
192 [ PIPE_FORMAT_BPTC_RGB_UFLOAT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_BC6H_UF16, SVGA3D_FORMAT_INVALID, TF_SM5 },
193 [ PIPE_FORMAT_X24S8_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_X24_G8_UINT, SVGA3D_FORMAT_INVALID, 0 },
194 [ PIPE_FORMAT_X32_S8X24_UINT ] = { SVGA3D_FORMAT_INVALID, SVGA3D_X32_G8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
195 /* Must specify following entry to give the sense of size of format_conversion_table[] */
196 [ PIPE_FORMAT_COUNT ] = {SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 };
198
199
200 static const struct vgpu10_format_entry *
svga_format_entry(enum pipe_format format)201 svga_format_entry(enum pipe_format format)
202 {
203 /* Sparse filling of the table requires this. */
204 STATIC_ASSERT(SVGA3D_FORMAT_INVALID == 0);
205 assert(format < ARRAY_SIZE(format_conversion_table));
206 if (format >= ARRAY_SIZE(format_conversion_table))
207 return &format_conversion_table[PIPE_FORMAT_NONE];
208 else
209 return &format_conversion_table[format];
210 }
211
212 /**
213 * Translate a gallium vertex format to a vgpu10 vertex format.
214 * Also, return any special vertex format flags.
215 */
216 void
svga_translate_vertex_format_vgpu10(enum pipe_format format,SVGA3dSurfaceFormat * svga_format,unsigned * vf_flags)217 svga_translate_vertex_format_vgpu10(enum pipe_format format,
218 SVGA3dSurfaceFormat *svga_format,
219 unsigned *vf_flags)
220 {
221 const struct vgpu10_format_entry *entry = svga_format_entry(format);
222
223 *svga_format = entry->vertex_format;
224 *vf_flags = entry->flags;
225 }
226
227
228 /**
229 * Translate a gallium pixel format to a vgpu10 format
230 * to be used in a shader resource view for a texture buffer.
231 * Also return any special texture format flags such as
232 * any special swizzle mask.
233 */
234 void
svga_translate_texture_buffer_view_format(enum pipe_format format,SVGA3dSurfaceFormat * svga_format,unsigned * tf_flags)235 svga_translate_texture_buffer_view_format(enum pipe_format format,
236 SVGA3dSurfaceFormat *svga_format,
237 unsigned *tf_flags)
238 {
239 const struct vgpu10_format_entry *entry = svga_format_entry(format);
240
241 *svga_format = entry->view_format;
242 *tf_flags = entry->flags;
243 }
244
245
246 /**
247 * Translate a gallium scanout format to a svga format valid
248 * for screen target surface.
249 */
250 static SVGA3dSurfaceFormat
svga_translate_screen_target_format_vgpu10(enum pipe_format format)251 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
252 {
253 switch (format) {
254 case PIPE_FORMAT_B8G8R8A8_UNORM:
255 return SVGA3D_B8G8R8A8_UNORM;
256 case PIPE_FORMAT_B8G8R8X8_UNORM:
257 return SVGA3D_B8G8R8X8_UNORM;
258 case PIPE_FORMAT_B5G6R5_UNORM:
259 return SVGA3D_R5G6B5;
260 case PIPE_FORMAT_B5G5R5A1_UNORM:
261 return SVGA3D_A1R5G5B5;
262 default:
263 debug_printf("Invalid format %s specified for screen target\n",
264 svga_format_name(format));
265 return SVGA3D_FORMAT_INVALID;
266 }
267 }
268
269 /*
270 * Translate from gallium format to SVGA3D format.
271 */
272 SVGA3dSurfaceFormat
svga_translate_format(const struct svga_screen * ss,enum pipe_format format,unsigned bind)273 svga_translate_format(const struct svga_screen *ss,
274 enum pipe_format format,
275 unsigned bind)
276 {
277 const struct vgpu10_format_entry *entry = svga_format_entry(format);
278
279 if (ss->sws->have_vgpu10) {
280 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
281 return entry->vertex_format;
282 }
283 else if (bind & PIPE_BIND_SCANOUT) {
284 return svga_translate_screen_target_format_vgpu10(format);
285 }
286 else if (bind & PIPE_BIND_SHADER_IMAGE) {
287 if (format_conversion_table[format].flags & TF_UAV)
288 return format_conversion_table[format].pixel_format;
289 else
290 return SVGA3D_FORMAT_INVALID;
291 }
292 else {
293 if ((format_conversion_table[format].flags & TF_SM5) &&
294 !ss->sws->have_sm5)
295 return SVGA3D_FORMAT_INVALID;
296 else
297 return entry->pixel_format;
298 }
299 }
300
301 switch(format) {
302 case PIPE_FORMAT_B8G8R8A8_UNORM:
303 return SVGA3D_A8R8G8B8;
304 case PIPE_FORMAT_B8G8R8X8_UNORM:
305 return SVGA3D_X8R8G8B8;
306
307 /* sRGB required for GL2.1 */
308 case PIPE_FORMAT_B8G8R8A8_SRGB:
309 return SVGA3D_A8R8G8B8;
310 case PIPE_FORMAT_DXT1_SRGB:
311 case PIPE_FORMAT_DXT1_SRGBA:
312 return SVGA3D_DXT1;
313 case PIPE_FORMAT_DXT3_SRGBA:
314 return SVGA3D_DXT3;
315 case PIPE_FORMAT_DXT5_SRGBA:
316 return SVGA3D_DXT5;
317
318 case PIPE_FORMAT_B5G6R5_UNORM:
319 return SVGA3D_R5G6B5;
320 case PIPE_FORMAT_B5G5R5A1_UNORM:
321 return SVGA3D_A1R5G5B5;
322 case PIPE_FORMAT_B4G4R4A4_UNORM:
323 return SVGA3D_A4R4G4B4;
324
325 case PIPE_FORMAT_R16G16B16A16_UNORM:
326 return SVGA3D_A16B16G16R16;
327
328 case PIPE_FORMAT_Z16_UNORM:
329 assert(!ss->sws->have_vgpu10);
330 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
331 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
332 assert(!ss->sws->have_vgpu10);
333 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
334 case PIPE_FORMAT_X8Z24_UNORM:
335 assert(!ss->sws->have_vgpu10);
336 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
337
338 case PIPE_FORMAT_A8_UNORM:
339 return SVGA3D_ALPHA8;
340 case PIPE_FORMAT_L8_UNORM:
341 return SVGA3D_LUMINANCE8;
342
343 case PIPE_FORMAT_DXT1_RGB:
344 case PIPE_FORMAT_DXT1_RGBA:
345 return SVGA3D_DXT1;
346 case PIPE_FORMAT_DXT3_RGBA:
347 return SVGA3D_DXT3;
348 case PIPE_FORMAT_DXT5_RGBA:
349 return SVGA3D_DXT5;
350
351 /* Float formats (only 1, 2 and 4-component formats supported) */
352 case PIPE_FORMAT_R32_FLOAT:
353 return SVGA3D_R_S23E8;
354 case PIPE_FORMAT_R32G32_FLOAT:
355 return SVGA3D_RG_S23E8;
356 case PIPE_FORMAT_R32G32B32A32_FLOAT:
357 return SVGA3D_ARGB_S23E8;
358 case PIPE_FORMAT_R16_FLOAT:
359 return SVGA3D_R_S10E5;
360 case PIPE_FORMAT_R16G16_FLOAT:
361 return SVGA3D_RG_S10E5;
362 case PIPE_FORMAT_R16G16B16A16_FLOAT:
363 return SVGA3D_ARGB_S10E5;
364
365 case PIPE_FORMAT_Z32_UNORM:
366 /* SVGA3D_Z_D32 is not yet unsupported */
367 FALLTHROUGH;
368 default:
369 return SVGA3D_FORMAT_INVALID;
370 }
371 }
372
373
374 /*
375 * Format capability description entry.
376 */
377 struct format_cap {
378 const char *name;
379
380 SVGA3dSurfaceFormat format;
381
382 /*
383 * Capability index corresponding to the format.
384 */
385 SVGA3dDevCapIndex devcap;
386
387 /* size of each pixel/block */
388 unsigned block_width, block_height, block_bytes;
389
390 /*
391 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
392 * capability is not explicitly present.
393 */
394 uint32 defaultOperations;
395 };
396
397
398 /*
399 * Format capability description table.
400 *
401 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
402 */
403 static const struct format_cap format_cap_table[] = {
404 {
405 "SVGA3D_FORMAT_INVALID",
406 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
407 },
408 {
409 "SVGA3D_X8R8G8B8",
410 SVGA3D_X8R8G8B8,
411 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
412 1, 1, 4,
413 SVGA3DFORMAT_OP_TEXTURE |
414 SVGA3DFORMAT_OP_CUBETEXTURE |
415 SVGA3DFORMAT_OP_VOLUMETEXTURE |
416 SVGA3DFORMAT_OP_DISPLAYMODE |
417 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
418 },
419 {
420 "SVGA3D_A8R8G8B8",
421 SVGA3D_A8R8G8B8,
422 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
423 1, 1, 4,
424 SVGA3DFORMAT_OP_TEXTURE |
425 SVGA3DFORMAT_OP_CUBETEXTURE |
426 SVGA3DFORMAT_OP_VOLUMETEXTURE |
427 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
428 },
429 {
430 "SVGA3D_R5G6B5",
431 SVGA3D_R5G6B5,
432 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
433 1, 1, 2,
434 SVGA3DFORMAT_OP_TEXTURE |
435 SVGA3DFORMAT_OP_CUBETEXTURE |
436 SVGA3DFORMAT_OP_VOLUMETEXTURE |
437 SVGA3DFORMAT_OP_DISPLAYMODE |
438 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
439 },
440 {
441 "SVGA3D_X1R5G5B5",
442 SVGA3D_X1R5G5B5,
443 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
444 1, 1, 2,
445 SVGA3DFORMAT_OP_TEXTURE |
446 SVGA3DFORMAT_OP_CUBETEXTURE |
447 SVGA3DFORMAT_OP_VOLUMETEXTURE |
448 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
449 },
450 {
451 "SVGA3D_A1R5G5B5",
452 SVGA3D_A1R5G5B5,
453 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
454 1, 1, 2,
455 SVGA3DFORMAT_OP_TEXTURE |
456 SVGA3DFORMAT_OP_CUBETEXTURE |
457 SVGA3DFORMAT_OP_VOLUMETEXTURE |
458 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
459 },
460 {
461 "SVGA3D_A4R4G4B4",
462 SVGA3D_A4R4G4B4,
463 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
464 1, 1, 2,
465 SVGA3DFORMAT_OP_TEXTURE |
466 SVGA3DFORMAT_OP_CUBETEXTURE |
467 SVGA3DFORMAT_OP_VOLUMETEXTURE |
468 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
469 },
470 {
471 /*
472 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
473 * SVGA3D_DEVCAP_xxx.
474 */
475 "SVGA3D_Z_D32",
476 SVGA3D_Z_D32, 0, 0, 0, 0, 0
477 },
478 {
479 "SVGA3D_Z_D16",
480 SVGA3D_Z_D16,
481 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
482 1, 1, 2,
483 SVGA3DFORMAT_OP_ZSTENCIL
484 },
485 {
486 "SVGA3D_Z_D24S8",
487 SVGA3D_Z_D24S8,
488 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
489 1, 1, 4,
490 SVGA3DFORMAT_OP_ZSTENCIL
491 },
492 {
493 "SVGA3D_Z_D15S1",
494 SVGA3D_Z_D15S1,
495 SVGA3D_DEVCAP_MAX,
496 1, 1, 2,
497 SVGA3DFORMAT_OP_ZSTENCIL
498 },
499 {
500 "SVGA3D_LUMINANCE8",
501 SVGA3D_LUMINANCE8,
502 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
503 1, 1, 1,
504 SVGA3DFORMAT_OP_TEXTURE |
505 SVGA3DFORMAT_OP_CUBETEXTURE |
506 SVGA3DFORMAT_OP_VOLUMETEXTURE
507 },
508 {
509 /*
510 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
511 * SVGA3D_DEVCAP_xxx.
512 */
513 "SVGA3D_LUMINANCE4_ALPHA4",
514 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
515 },
516 {
517 "SVGA3D_LUMINANCE16",
518 SVGA3D_LUMINANCE16,
519 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
520 1, 1, 2,
521 SVGA3DFORMAT_OP_TEXTURE |
522 SVGA3DFORMAT_OP_CUBETEXTURE |
523 SVGA3DFORMAT_OP_VOLUMETEXTURE
524 },
525 {
526 "SVGA3D_LUMINANCE8_ALPHA8",
527 SVGA3D_LUMINANCE8_ALPHA8,
528 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
529 1, 1, 2,
530 SVGA3DFORMAT_OP_TEXTURE |
531 SVGA3DFORMAT_OP_CUBETEXTURE |
532 SVGA3DFORMAT_OP_VOLUMETEXTURE
533 },
534 {
535 "SVGA3D_DXT1",
536 SVGA3D_DXT1,
537 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
538 4, 4, 8,
539 SVGA3DFORMAT_OP_TEXTURE |
540 SVGA3DFORMAT_OP_CUBETEXTURE
541 },
542 {
543 "SVGA3D_DXT2",
544 SVGA3D_DXT2,
545 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
546 4, 4, 8,
547 SVGA3DFORMAT_OP_TEXTURE |
548 SVGA3DFORMAT_OP_CUBETEXTURE
549 },
550 {
551 "SVGA3D_DXT3",
552 SVGA3D_DXT3,
553 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
554 4, 4, 16,
555 SVGA3DFORMAT_OP_TEXTURE |
556 SVGA3DFORMAT_OP_CUBETEXTURE
557 },
558 {
559 "SVGA3D_DXT4",
560 SVGA3D_DXT4,
561 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
562 4, 4, 16,
563 SVGA3DFORMAT_OP_TEXTURE |
564 SVGA3DFORMAT_OP_CUBETEXTURE
565 },
566 {
567 "SVGA3D_DXT5",
568 SVGA3D_DXT5,
569 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
570 4, 4, 8,
571 SVGA3DFORMAT_OP_TEXTURE |
572 SVGA3DFORMAT_OP_CUBETEXTURE
573 },
574 {
575 "SVGA3D_BUMPU8V8",
576 SVGA3D_BUMPU8V8,
577 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
578 1, 1, 2,
579 SVGA3DFORMAT_OP_TEXTURE |
580 SVGA3DFORMAT_OP_CUBETEXTURE |
581 SVGA3DFORMAT_OP_VOLUMETEXTURE
582 },
583 {
584 /*
585 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
586 * SVGA3D_DEVCAP_xxx.
587 */
588 "SVGA3D_BUMPL6V5U5",
589 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
590 },
591 {
592 "SVGA3D_BUMPX8L8V8U8",
593 SVGA3D_BUMPX8L8V8U8,
594 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
595 1, 1, 4,
596 SVGA3DFORMAT_OP_TEXTURE |
597 SVGA3DFORMAT_OP_CUBETEXTURE
598 },
599 {
600 "SVGA3D_FORMAT_DEAD1",
601 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
602 },
603 {
604 "SVGA3D_ARGB_S10E5",
605 SVGA3D_ARGB_S10E5,
606 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
607 1, 1, 2,
608 SVGA3DFORMAT_OP_TEXTURE |
609 SVGA3DFORMAT_OP_CUBETEXTURE |
610 SVGA3DFORMAT_OP_VOLUMETEXTURE |
611 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
612 },
613 {
614 "SVGA3D_ARGB_S23E8",
615 SVGA3D_ARGB_S23E8,
616 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
617 1, 1, 4,
618 SVGA3DFORMAT_OP_TEXTURE |
619 SVGA3DFORMAT_OP_CUBETEXTURE |
620 SVGA3DFORMAT_OP_VOLUMETEXTURE |
621 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
622 },
623 {
624 "SVGA3D_A2R10G10B10",
625 SVGA3D_A2R10G10B10,
626 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
627 1, 1, 4,
628 SVGA3DFORMAT_OP_TEXTURE |
629 SVGA3DFORMAT_OP_CUBETEXTURE |
630 SVGA3DFORMAT_OP_VOLUMETEXTURE |
631 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
632 },
633 {
634 /*
635 * SVGA3D_V8U8 is unsupported; it has no corresponding
636 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
637 */
638 "SVGA3D_V8U8",
639 SVGA3D_V8U8, 0, 0, 0, 0, 0
640 },
641 {
642 "SVGA3D_Q8W8V8U8",
643 SVGA3D_Q8W8V8U8,
644 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
645 1, 1, 4,
646 SVGA3DFORMAT_OP_TEXTURE |
647 SVGA3DFORMAT_OP_CUBETEXTURE
648 },
649 {
650 "SVGA3D_CxV8U8",
651 SVGA3D_CxV8U8,
652 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
653 1, 1, 2,
654 SVGA3DFORMAT_OP_TEXTURE
655 },
656 {
657 /*
658 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
659 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
660 */
661 "SVGA3D_X8L8V8U8",
662 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
663 },
664 {
665 "SVGA3D_A2W10V10U10",
666 SVGA3D_A2W10V10U10,
667 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
668 1, 1, 4,
669 SVGA3DFORMAT_OP_TEXTURE
670 },
671 {
672 "SVGA3D_ALPHA8",
673 SVGA3D_ALPHA8,
674 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
675 1, 1, 1,
676 SVGA3DFORMAT_OP_TEXTURE |
677 SVGA3DFORMAT_OP_CUBETEXTURE |
678 SVGA3DFORMAT_OP_VOLUMETEXTURE
679 },
680 {
681 "SVGA3D_R_S10E5",
682 SVGA3D_R_S10E5,
683 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
684 1, 1, 2,
685 SVGA3DFORMAT_OP_TEXTURE |
686 SVGA3DFORMAT_OP_VOLUMETEXTURE |
687 SVGA3DFORMAT_OP_CUBETEXTURE |
688 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
689 },
690 {
691 "SVGA3D_R_S23E8",
692 SVGA3D_R_S23E8,
693 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
694 1, 1, 4,
695 SVGA3DFORMAT_OP_TEXTURE |
696 SVGA3DFORMAT_OP_VOLUMETEXTURE |
697 SVGA3DFORMAT_OP_CUBETEXTURE |
698 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
699 },
700 {
701 "SVGA3D_RG_S10E5",
702 SVGA3D_RG_S10E5,
703 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
704 1, 1, 2,
705 SVGA3DFORMAT_OP_TEXTURE |
706 SVGA3DFORMAT_OP_VOLUMETEXTURE |
707 SVGA3DFORMAT_OP_CUBETEXTURE |
708 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
709 },
710 {
711 "SVGA3D_RG_S23E8",
712 SVGA3D_RG_S23E8,
713 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
714 1, 1, 4,
715 SVGA3DFORMAT_OP_TEXTURE |
716 SVGA3DFORMAT_OP_VOLUMETEXTURE |
717 SVGA3DFORMAT_OP_CUBETEXTURE |
718 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
719 },
720 {
721 /*
722 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
723 */
724 "SVGA3D_BUFFER",
725 SVGA3D_BUFFER, 0, 1, 1, 1, 0
726 },
727 {
728 "SVGA3D_Z_D24X8",
729 SVGA3D_Z_D24X8,
730 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
731 1, 1, 4,
732 SVGA3DFORMAT_OP_ZSTENCIL
733 },
734 {
735 "SVGA3D_V16U16",
736 SVGA3D_V16U16,
737 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
738 1, 1, 4,
739 SVGA3DFORMAT_OP_TEXTURE |
740 SVGA3DFORMAT_OP_CUBETEXTURE |
741 SVGA3DFORMAT_OP_VOLUMETEXTURE
742 },
743 {
744 "SVGA3D_G16R16",
745 SVGA3D_G16R16,
746 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
747 1, 1, 4,
748 SVGA3DFORMAT_OP_TEXTURE |
749 SVGA3DFORMAT_OP_CUBETEXTURE |
750 SVGA3DFORMAT_OP_VOLUMETEXTURE |
751 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
752 },
753 {
754 "SVGA3D_A16B16G16R16",
755 SVGA3D_A16B16G16R16,
756 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
757 1, 1, 8,
758 SVGA3DFORMAT_OP_TEXTURE |
759 SVGA3DFORMAT_OP_CUBETEXTURE |
760 SVGA3DFORMAT_OP_VOLUMETEXTURE |
761 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
762 },
763 {
764 "SVGA3D_UYVY",
765 SVGA3D_UYVY,
766 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
767 0, 0, 0, 0
768 },
769 {
770 "SVGA3D_YUY2",
771 SVGA3D_YUY2,
772 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
773 0, 0, 0, 0
774 },
775 {
776 "SVGA3D_NV12",
777 SVGA3D_NV12,
778 SVGA3D_DEVCAP_SURFACEFMT_NV12,
779 0, 0, 0, 0
780 },
781 {
782 "SVGA3D_FORMAT_DEAD2",
783 SVGA3D_FORMAT_DEAD2, 0, 0, 0, 0, 0
784 },
785 {
786 "SVGA3D_R32G32B32A32_TYPELESS",
787 SVGA3D_R32G32B32A32_TYPELESS,
788 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
789 1, 1, 16, 0
790 },
791 {
792 "SVGA3D_R32G32B32A32_UINT",
793 SVGA3D_R32G32B32A32_UINT,
794 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
795 1, 1, 16, 0
796 },
797 {
798 "SVGA3D_R32G32B32A32_SINT",
799 SVGA3D_R32G32B32A32_SINT,
800 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
801 1, 1, 16, 0
802 },
803 {
804 "SVGA3D_R32G32B32_TYPELESS",
805 SVGA3D_R32G32B32_TYPELESS,
806 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
807 1, 1, 12, 0
808 },
809 {
810 "SVGA3D_R32G32B32_FLOAT",
811 SVGA3D_R32G32B32_FLOAT,
812 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
813 1, 1, 12, 0
814 },
815 {
816 "SVGA3D_R32G32B32_UINT",
817 SVGA3D_R32G32B32_UINT,
818 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
819 1, 1, 12, 0
820 },
821 {
822 "SVGA3D_R32G32B32_SINT",
823 SVGA3D_R32G32B32_SINT,
824 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
825 1, 1, 12, 0
826 },
827 {
828 "SVGA3D_R16G16B16A16_TYPELESS",
829 SVGA3D_R16G16B16A16_TYPELESS,
830 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
831 1, 1, 8, 0
832 },
833 {
834 "SVGA3D_R16G16B16A16_UINT",
835 SVGA3D_R16G16B16A16_UINT,
836 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
837 1, 1, 8, 0
838 },
839 {
840 "SVGA3D_R16G16B16A16_SNORM",
841 SVGA3D_R16G16B16A16_SNORM,
842 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
843 1, 1, 8, 0
844 },
845 {
846 "SVGA3D_R16G16B16A16_SINT",
847 SVGA3D_R16G16B16A16_SINT,
848 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
849 1, 1, 8, 0
850 },
851 {
852 "SVGA3D_R32G32_TYPELESS",
853 SVGA3D_R32G32_TYPELESS,
854 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
855 1, 1, 8, 0
856 },
857 {
858 "SVGA3D_R32G32_UINT",
859 SVGA3D_R32G32_UINT,
860 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
861 1, 1, 8, 0
862 },
863 {
864 "SVGA3D_R32G32_SINT",
865 SVGA3D_R32G32_SINT,
866 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
867 1, 1, 8,
868 0
869 },
870 {
871 "SVGA3D_R32G8X24_TYPELESS",
872 SVGA3D_R32G8X24_TYPELESS,
873 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
874 1, 1, 8, 0
875 },
876 {
877 "SVGA3D_D32_FLOAT_S8X24_UINT",
878 SVGA3D_D32_FLOAT_S8X24_UINT,
879 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
880 1, 1, 8, 0
881 },
882 {
883 "SVGA3D_R32_FLOAT_X8X24",
884 SVGA3D_R32_FLOAT_X8X24,
885 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
886 1, 1, 8, 0
887 },
888 {
889 "SVGA3D_X32_G8X24_UINT",
890 SVGA3D_X32_G8X24_UINT,
891 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
892 1, 1, 4, 0
893 },
894 {
895 "SVGA3D_R10G10B10A2_TYPELESS",
896 SVGA3D_R10G10B10A2_TYPELESS,
897 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
898 1, 1, 4, 0
899 },
900 {
901 "SVGA3D_R10G10B10A2_UINT",
902 SVGA3D_R10G10B10A2_UINT,
903 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
904 1, 1, 4, 0
905 },
906 {
907 "SVGA3D_R11G11B10_FLOAT",
908 SVGA3D_R11G11B10_FLOAT,
909 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
910 1, 1, 4, 0
911 },
912 {
913 "SVGA3D_R8G8B8A8_TYPELESS",
914 SVGA3D_R8G8B8A8_TYPELESS,
915 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
916 1, 1, 4, 0
917 },
918 {
919 "SVGA3D_R8G8B8A8_UNORM",
920 SVGA3D_R8G8B8A8_UNORM,
921 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
922 1, 1, 4, 0
923 },
924 {
925 "SVGA3D_R8G8B8A8_UNORM_SRGB",
926 SVGA3D_R8G8B8A8_UNORM_SRGB,
927 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
928 1, 1, 4, 0
929 },
930 {
931 "SVGA3D_R8G8B8A8_UINT",
932 SVGA3D_R8G8B8A8_UINT,
933 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
934 1, 1, 4, 0
935 },
936 {
937 "SVGA3D_R8G8B8A8_SINT",
938 SVGA3D_R8G8B8A8_SINT,
939 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
940 1, 1, 4, 0
941 },
942 {
943 "SVGA3D_R16G16_TYPELESS",
944 SVGA3D_R16G16_TYPELESS,
945 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
946 1, 1, 4, 0
947 },
948 {
949 "SVGA3D_R16G16_UINT",
950 SVGA3D_R16G16_UINT,
951 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
952 1, 1, 4, 0
953 },
954 {
955 "SVGA3D_R16G16_SINT",
956 SVGA3D_R16G16_SINT,
957 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
958 1, 1, 4, 0
959 },
960 {
961 "SVGA3D_R32_TYPELESS",
962 SVGA3D_R32_TYPELESS,
963 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
964 1, 1, 4, 0
965 },
966 {
967 "SVGA3D_D32_FLOAT",
968 SVGA3D_D32_FLOAT,
969 SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
970 1, 1, 4, 0
971 },
972 {
973 "SVGA3D_R32_UINT",
974 SVGA3D_R32_UINT,
975 SVGA3D_DEVCAP_DXFMT_R32_UINT,
976 1, 1, 4, 0
977 },
978 {
979 "SVGA3D_R32_SINT",
980 SVGA3D_R32_SINT,
981 SVGA3D_DEVCAP_DXFMT_R32_SINT,
982 1, 1, 4, 0
983 },
984 {
985 "SVGA3D_R24G8_TYPELESS",
986 SVGA3D_R24G8_TYPELESS,
987 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
988 1, 1, 4, 0
989 },
990 {
991 "SVGA3D_D24_UNORM_S8_UINT",
992 SVGA3D_D24_UNORM_S8_UINT,
993 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
994 1, 1, 4, 0
995 },
996 {
997 "SVGA3D_R24_UNORM_X8",
998 SVGA3D_R24_UNORM_X8,
999 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1000 1, 1, 4, 0
1001 },
1002 {
1003 "SVGA3D_X24_G8_UINT",
1004 SVGA3D_X24_G8_UINT,
1005 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1006 1, 1, 4, 0
1007 },
1008 {
1009 "SVGA3D_R8G8_TYPELESS",
1010 SVGA3D_R8G8_TYPELESS,
1011 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1012 1, 1, 2, 0
1013 },
1014 {
1015 "SVGA3D_R8G8_UNORM",
1016 SVGA3D_R8G8_UNORM,
1017 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1018 1, 1, 2, 0
1019 },
1020 {
1021 "SVGA3D_R8G8_UINT",
1022 SVGA3D_R8G8_UINT,
1023 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1024 1, 1, 2, 0
1025 },
1026 {
1027 "SVGA3D_R8G8_SINT",
1028 SVGA3D_R8G8_SINT,
1029 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1030 1, 1, 2, 0
1031 },
1032 {
1033 "SVGA3D_R16_TYPELESS",
1034 SVGA3D_R16_TYPELESS,
1035 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1036 1, 1, 2, 0
1037 },
1038 {
1039 "SVGA3D_R16_UNORM",
1040 SVGA3D_R16_UNORM,
1041 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1042 1, 1, 2, 0
1043 },
1044 {
1045 "SVGA3D_R16_UINT",
1046 SVGA3D_R16_UINT,
1047 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1048 1, 1, 2, 0
1049 },
1050 {
1051 "SVGA3D_R16_SNORM",
1052 SVGA3D_R16_SNORM,
1053 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1054 1, 1, 2, 0
1055 },
1056 {
1057 "SVGA3D_R16_SINT",
1058 SVGA3D_R16_SINT,
1059 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1060 1, 1, 2, 0
1061 },
1062 {
1063 "SVGA3D_R8_TYPELESS",
1064 SVGA3D_R8_TYPELESS,
1065 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1066 1, 1, 1, 0
1067 },
1068 {
1069 "SVGA3D_R8_UNORM",
1070 SVGA3D_R8_UNORM,
1071 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1072 1, 1, 1, 0
1073 },
1074 {
1075 "SVGA3D_R8_UINT",
1076 SVGA3D_R8_UINT,
1077 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1078 1, 1, 1, 0
1079 },
1080 {
1081 "SVGA3D_R8_SNORM",
1082 SVGA3D_R8_SNORM,
1083 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1084 1, 1, 1, 0
1085 },
1086 {
1087 "SVGA3D_R8_SINT",
1088 SVGA3D_R8_SINT,
1089 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1090 1, 1, 1, 0
1091 },
1092 {
1093 "SVGA3D_P8",
1094 SVGA3D_P8, 0, 0, 0, 0, 0
1095 },
1096 {
1097 "SVGA3D_R9G9B9E5_SHAREDEXP",
1098 SVGA3D_R9G9B9E5_SHAREDEXP,
1099 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1100 1, 1, 4, 0
1101 },
1102 {
1103 "SVGA3D_R8G8_B8G8_UNORM",
1104 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1105 },
1106 {
1107 "SVGA3D_G8R8_G8B8_UNORM",
1108 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1109 },
1110 {
1111 "SVGA3D_BC1_TYPELESS",
1112 SVGA3D_BC1_TYPELESS,
1113 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1114 4, 4, 8, 0
1115 },
1116 {
1117 "SVGA3D_BC1_UNORM_SRGB",
1118 SVGA3D_BC1_UNORM_SRGB,
1119 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1120 4, 4, 8, 0
1121 },
1122 {
1123 "SVGA3D_BC2_TYPELESS",
1124 SVGA3D_BC2_TYPELESS,
1125 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1126 4, 4, 16, 0
1127 },
1128 {
1129 "SVGA3D_BC2_UNORM_SRGB",
1130 SVGA3D_BC2_UNORM_SRGB,
1131 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1132 4, 4, 16, 0
1133 },
1134 {
1135 "SVGA3D_BC3_TYPELESS",
1136 SVGA3D_BC3_TYPELESS,
1137 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1138 4, 4, 16, 0
1139 },
1140 {
1141 "SVGA3D_BC3_UNORM_SRGB",
1142 SVGA3D_BC3_UNORM_SRGB,
1143 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1144 4, 4, 16, 0
1145 },
1146 {
1147 "SVGA3D_BC4_TYPELESS",
1148 SVGA3D_BC4_TYPELESS,
1149 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1150 4, 4, 8, 0
1151 },
1152 {
1153 "SVGA3D_ATI1",
1154 SVGA3D_ATI1, 0, 0, 0, 0, 0
1155 },
1156 {
1157 "SVGA3D_BC4_SNORM",
1158 SVGA3D_BC4_SNORM,
1159 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1160 4, 4, 8, 0
1161 },
1162 {
1163 "SVGA3D_BC5_TYPELESS",
1164 SVGA3D_BC5_TYPELESS,
1165 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1166 4, 4, 16, 0
1167 },
1168 {
1169 "SVGA3D_ATI2",
1170 SVGA3D_ATI2, 0, 0, 0, 0, 0
1171 },
1172 {
1173 "SVGA3D_BC5_SNORM",
1174 SVGA3D_BC5_SNORM,
1175 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1176 4, 4, 16, 0
1177 },
1178 {
1179 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1180 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1181 },
1182 {
1183 "SVGA3D_B8G8R8A8_TYPELESS",
1184 SVGA3D_B8G8R8A8_TYPELESS,
1185 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1186 1, 1, 4, 0
1187 },
1188 {
1189 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1190 SVGA3D_B8G8R8A8_UNORM_SRGB,
1191 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1192 1, 1, 4, 0
1193 },
1194 {
1195 "SVGA3D_B8G8R8X8_TYPELESS",
1196 SVGA3D_B8G8R8X8_TYPELESS,
1197 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1198 1, 1, 4, 0
1199 },
1200 {
1201 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1202 SVGA3D_B8G8R8X8_UNORM_SRGB,
1203 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1204 1, 1, 4, 0
1205 },
1206 {
1207 "SVGA3D_Z_DF16",
1208 SVGA3D_Z_DF16,
1209 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1210 1, 1, 2, 0
1211 },
1212 {
1213 "SVGA3D_Z_DF24",
1214 SVGA3D_Z_DF24,
1215 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1216 1, 1, 4, 0
1217 },
1218 {
1219 "SVGA3D_Z_D24S8_INT",
1220 SVGA3D_Z_D24S8_INT,
1221 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1222 1, 1, 4, 0
1223 },
1224 {
1225 "SVGA3D_YV12",
1226 SVGA3D_YV12, 0, 0, 0, 0, 0
1227 },
1228 {
1229 "SVGA3D_R32G32B32A32_FLOAT",
1230 SVGA3D_R32G32B32A32_FLOAT,
1231 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1232 1, 1, 16, 0
1233 },
1234 {
1235 "SVGA3D_R16G16B16A16_FLOAT",
1236 SVGA3D_R16G16B16A16_FLOAT,
1237 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1238 1, 1, 8, 0
1239 },
1240 {
1241 "SVGA3D_R16G16B16A16_UNORM",
1242 SVGA3D_R16G16B16A16_UNORM,
1243 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1244 1, 1, 8, 0
1245 },
1246 {
1247 "SVGA3D_R32G32_FLOAT",
1248 SVGA3D_R32G32_FLOAT,
1249 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1250 1, 1, 8, 0
1251 },
1252 {
1253 "SVGA3D_R10G10B10A2_UNORM",
1254 SVGA3D_R10G10B10A2_UNORM,
1255 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1256 1, 1, 4, 0
1257 },
1258 {
1259 "SVGA3D_R8G8B8A8_SNORM",
1260 SVGA3D_R8G8B8A8_SNORM,
1261 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1262 1, 1, 4, 0
1263 },
1264 {
1265 "SVGA3D_R16G16_FLOAT",
1266 SVGA3D_R16G16_FLOAT,
1267 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1268 1, 1, 4, 0
1269 },
1270 {
1271 "SVGA3D_R16G16_UNORM",
1272 SVGA3D_R16G16_UNORM,
1273 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1274 1, 1, 4, 0
1275 },
1276 {
1277 "SVGA3D_R16G16_SNORM",
1278 SVGA3D_R16G16_SNORM,
1279 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1280 1, 1, 4, 0
1281 },
1282 {
1283 "SVGA3D_R32_FLOAT",
1284 SVGA3D_R32_FLOAT,
1285 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1286 1, 1, 4, 0
1287 },
1288 {
1289 "SVGA3D_R8G8_SNORM",
1290 SVGA3D_R8G8_SNORM,
1291 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1292 1, 1, 2, 0
1293 },
1294 {
1295 "SVGA3D_R16_FLOAT",
1296 SVGA3D_R16_FLOAT,
1297 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1298 1, 1, 2, 0
1299 },
1300 {
1301 "SVGA3D_D16_UNORM",
1302 SVGA3D_D16_UNORM,
1303 SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1304 1, 1, 2, 0
1305 },
1306 {
1307 "SVGA3D_A8_UNORM",
1308 SVGA3D_A8_UNORM,
1309 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1310 1, 1, 1, 0
1311 },
1312 {
1313 "SVGA3D_BC1_UNORM",
1314 SVGA3D_BC1_UNORM,
1315 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1316 4, 4, 8, 0
1317 },
1318 {
1319 "SVGA3D_BC2_UNORM",
1320 SVGA3D_BC2_UNORM,
1321 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1322 4, 4, 16, 0
1323 },
1324 {
1325 "SVGA3D_BC3_UNORM",
1326 SVGA3D_BC3_UNORM,
1327 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1328 4, 4, 16, 0
1329 },
1330 {
1331 "SVGA3D_B5G6R5_UNORM",
1332 SVGA3D_B5G6R5_UNORM,
1333 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1334 1, 1, 2, 0
1335 },
1336 {
1337 "SVGA3D_B5G5R5A1_UNORM",
1338 SVGA3D_B5G5R5A1_UNORM,
1339 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1340 1, 1, 2, 0
1341 },
1342 {
1343 "SVGA3D_B8G8R8A8_UNORM",
1344 SVGA3D_B8G8R8A8_UNORM,
1345 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1346 1, 1, 4, 0
1347 },
1348 {
1349 "SVGA3D_B8G8R8X8_UNORM",
1350 SVGA3D_B8G8R8X8_UNORM,
1351 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1352 1, 1, 4, 0
1353 },
1354 {
1355 "SVGA3D_BC4_UNORM",
1356 SVGA3D_BC4_UNORM,
1357 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1358 4, 4, 8, 0
1359 },
1360 {
1361 "SVGA3D_BC5_UNORM",
1362 SVGA3D_BC5_UNORM,
1363 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1364 4, 4, 16, 0
1365 },
1366 {
1367 "SVGA3D_B4G4R4A4_UNORM",
1368 SVGA3D_B4G4R4A4_UNORM,
1369 0, 0, 0, 0
1370 },
1371 {
1372 "SVGA3D_BC6H_TYPELESS",
1373 SVGA3D_BC6H_TYPELESS,
1374 SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
1375 4, 4, 16, 0
1376 },
1377 {
1378 "SVGA3D_BC6H_UF16",
1379 SVGA3D_BC6H_UF16,
1380 SVGA3D_DEVCAP_DXFMT_BC6H_UF16,
1381 4, 4, 16, 0
1382 },
1383 {
1384 "SVGA3D_BC6H_SF16",
1385 SVGA3D_BC6H_SF16,
1386 SVGA3D_DEVCAP_DXFMT_BC6H_SF16,
1387 4, 4, 16, 0
1388 },
1389 {
1390 "SVGA3D_BC7_TYPELESS",
1391 SVGA3D_BC7_TYPELESS,
1392 SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS,
1393 4, 4, 16, 0
1394 },
1395 {
1396 "SVGA3D_BC7_UNORM",
1397 SVGA3D_BC7_UNORM,
1398 SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
1399 4, 4, 16, 0
1400 },
1401 {
1402 "SVGA3D_BC7_UNORM_SRGB",
1403 SVGA3D_BC7_UNORM_SRGB,
1404 SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
1405 4, 4, 16, 0
1406 },
1407 {
1408 "SVGA3D_AYUV",
1409 SVGA3D_AYUV,
1410 0,
1411 1, 1, 4, 0
1412 },
1413 {
1414 "SVGA3D_R11G11B10_TYPELESS",
1415 SVGA3D_R11G11B10_TYPELESS,
1416 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1417 1, 1, 4, 0
1418 }
1419 };
1420
1421 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1422 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1423 SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8X8_TYPELESS, SVGA3D_B8G8R8A8_TYPELESS, 0
1424 };
1425 static const SVGA3dSurfaceFormat compat_r8g8b8a8[] = {
1426 SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_TYPELESS, 0
1427 };
1428 static const SVGA3dSurfaceFormat compat_r8[] = {
1429 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1430 };
1431 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1432 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1433 };
1434 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1435 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1436 };
1437
1438 static const struct format_compat_entry format_compats[] = {
1439 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1440 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1441 {PIPE_FORMAT_R8G8B8A8_UNORM, compat_r8g8b8a8},
1442 {PIPE_FORMAT_R8_UNORM, compat_r8},
1443 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1444 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1445 };
1446
1447 /**
1448 * Debug only:
1449 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1450 * 2. check that format_conversion_table[i].pformat == i.
1451 */
1452 static void
check_format_tables(void)1453 check_format_tables(void)
1454 {
1455 static bool first_call = true;
1456
1457 if (first_call) {
1458 unsigned i;
1459
1460 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1461 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1462 assert(format_cap_table[i].format == i);
1463 }
1464
1465 first_call = false;
1466 }
1467 }
1468
1469
1470 /**
1471 * Return string name of an SVGA3dDevCapIndex value.
1472 * For debugging.
1473 */
1474 static const char *
svga_devcap_name(SVGA3dDevCapIndex cap)1475 svga_devcap_name(SVGA3dDevCapIndex cap)
1476 {
1477 static const struct debug_named_value devcap_names[] = {
1478 /* Note, we only list the DXFMT devcaps so far */
1479 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1480 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1481 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1482 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1483 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1484 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1485 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1486 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1487 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1488 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1489 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1490 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1491 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1492 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1493 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1494 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1495 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1496 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1497 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1498 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1499 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1500 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1501 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1502 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1503 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1504 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1505 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1506 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1507 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1508 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1509 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1510 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1511 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1512 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1513 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1514 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1515 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1516 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1517 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1518 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1519 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1520 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1521 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1522 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1523 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1524 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1525 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1526 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1527 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1528 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1529 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1530 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1531 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1532 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1533 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1534 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1535 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1536 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1537 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1538 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1539 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1540 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1541 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1542 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1543 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1544 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1545 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1546 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1547 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1548 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1549 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1550 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1551 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1552 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1553 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1554 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1555 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1556 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1557 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1558 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1559 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1560 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1561 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1562 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1563 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1564 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1565 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1566 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1567 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1568 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1569 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1570 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1571 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1572 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1573 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1574 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1575 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1576 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1577 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1578 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1579 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1580 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1581 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1582 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1583 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1584 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1585 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1586 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1587 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1588 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1589 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1590 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1591 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1592 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1593 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1594 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1595 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1596 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1597 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1598 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1599 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1600 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1601 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1602 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1603 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1604 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1605 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1606 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1607 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1608 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1609 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1610 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1611 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1612 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1613 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1614 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1615 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1616 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1617 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1618 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1619 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1620 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1621 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1622 DEBUG_NAMED_VALUE_END,
1623 };
1624 return debug_dump_enum(devcap_names, cap);
1625 }
1626
1627
1628 /**
1629 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1630 * For debugging.
1631 */
1632 static const char *
svga_devcap_format_flags(unsigned flags)1633 svga_devcap_format_flags(unsigned flags)
1634 {
1635 static const struct debug_named_value devcap_flags[] = {
1636 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1637 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1638 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1639 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1640 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1641 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1642 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1643 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1644 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1645 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1646 DEBUG_NAMED_VALUE_END
1647 };
1648
1649 return debug_dump_flags(devcap_flags, flags);
1650 }
1651
1652
1653 /*
1654 * Get format capabilities from the host. It takes in consideration
1655 * deprecated/unsupported formats, and formats which are implicitely assumed to
1656 * be supported when the host does not provide an explicit capability entry.
1657 */
1658 void
svga_get_format_cap(struct svga_screen * ss,SVGA3dSurfaceFormat format,SVGA3dSurfaceFormatCaps * caps)1659 svga_get_format_cap(struct svga_screen *ss,
1660 SVGA3dSurfaceFormat format,
1661 SVGA3dSurfaceFormatCaps *caps)
1662 {
1663 struct svga_winsys_screen *sws = ss->sws;
1664 SVGA3dDevCapResult result;
1665 const struct format_cap *entry;
1666
1667 #if MESA_DEBUG
1668 check_format_tables();
1669 #else
1670 (void) check_format_tables;
1671 #endif
1672
1673 assert(format < ARRAY_SIZE(format_cap_table));
1674 entry = &format_cap_table[format];
1675 assert(entry->format == format);
1676
1677 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1678 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1679 caps->value = result.u;
1680 } else {
1681 /* Implicitly advertised format -- use default caps */
1682 caps->value = entry->defaultOperations;
1683 }
1684 }
1685
1686
1687 /*
1688 * Get DX format capabilities from VGPU10 device.
1689 */
1690 static void
svga_get_dx_format_cap(struct svga_screen * ss,SVGA3dSurfaceFormat format,SVGA3dDevCapResult * caps)1691 svga_get_dx_format_cap(struct svga_screen *ss,
1692 SVGA3dSurfaceFormat format,
1693 SVGA3dDevCapResult *caps)
1694 {
1695 struct svga_winsys_screen *sws = ss->sws;
1696 const struct format_cap *entry;
1697
1698 #if MESA_DEBUG
1699 check_format_tables();
1700 #else
1701 (void) check_format_tables;
1702 #endif
1703
1704 assert(sws->have_vgpu10);
1705 assert(format < ARRAY_SIZE(format_cap_table));
1706 entry = &format_cap_table[format];
1707 assert(entry->format == format);
1708 assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1709
1710 caps->u = 0;
1711 if (entry->devcap) {
1712 sws->get_cap(sws, entry->devcap, caps);
1713
1714 /* pre-SM41 capable svga device supports SHADER_SAMPLE capability for
1715 * these formats but does not advertise the devcap.
1716 * So enable this bit here.
1717 */
1718 if (!sws->have_sm4_1 &&
1719 (format == SVGA3D_R32_FLOAT_X8X24 ||
1720 format == SVGA3D_R24_UNORM_X8)) {
1721 caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1722 }
1723 }
1724 else {
1725 caps->u = entry->defaultOperations;
1726 }
1727
1728 if (0) {
1729 debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1730 svga_format_name(format),
1731 svga_devcap_name(entry->devcap),
1732 caps->u,
1733 svga_devcap_format_flags(caps->u));
1734 }
1735 }
1736
1737
1738 void
svga_format_size(SVGA3dSurfaceFormat format,unsigned * block_width,unsigned * block_height,unsigned * bytes_per_block)1739 svga_format_size(SVGA3dSurfaceFormat format,
1740 unsigned *block_width,
1741 unsigned *block_height,
1742 unsigned *bytes_per_block)
1743 {
1744 assert(format < ARRAY_SIZE(format_cap_table));
1745 *block_width = format_cap_table[format].block_width;
1746 *block_height = format_cap_table[format].block_height;
1747 *bytes_per_block = format_cap_table[format].block_bytes;
1748 /* Make sure the table entry was valid */
1749 if (*block_width == 0)
1750 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1751 assert(*block_width);
1752 assert(*block_height);
1753 assert(*bytes_per_block);
1754 }
1755
1756
1757 const char *
svga_format_name(SVGA3dSurfaceFormat format)1758 svga_format_name(SVGA3dSurfaceFormat format)
1759 {
1760 assert(format < ARRAY_SIZE(format_cap_table));
1761 return format_cap_table[format].name;
1762 }
1763
1764
1765 /**
1766 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1767 */
1768 bool
svga_format_is_integer(SVGA3dSurfaceFormat format)1769 svga_format_is_integer(SVGA3dSurfaceFormat format)
1770 {
1771 switch (format) {
1772 case SVGA3D_R32G32B32A32_SINT:
1773 case SVGA3D_R32G32B32_SINT:
1774 case SVGA3D_R32G32_SINT:
1775 case SVGA3D_R32_SINT:
1776 case SVGA3D_R16G16B16A16_SINT:
1777 case SVGA3D_R16G16_SINT:
1778 case SVGA3D_R16_SINT:
1779 case SVGA3D_R8G8B8A8_SINT:
1780 case SVGA3D_R8G8_SINT:
1781 case SVGA3D_R8_SINT:
1782 case SVGA3D_R32G32B32A32_UINT:
1783 case SVGA3D_R32G32B32_UINT:
1784 case SVGA3D_R32G32_UINT:
1785 case SVGA3D_R32_UINT:
1786 case SVGA3D_R16G16B16A16_UINT:
1787 case SVGA3D_R16G16_UINT:
1788 case SVGA3D_R16_UINT:
1789 case SVGA3D_R8G8B8A8_UINT:
1790 case SVGA3D_R8G8_UINT:
1791 case SVGA3D_R8_UINT:
1792 case SVGA3D_R10G10B10A2_UINT:
1793 return true;
1794 default:
1795 return false;
1796 }
1797 }
1798
1799 bool
svga_format_support_gen_mips(enum pipe_format format)1800 svga_format_support_gen_mips(enum pipe_format format)
1801 {
1802 const struct vgpu10_format_entry *entry = svga_format_entry(format);
1803
1804 return (entry->flags & TF_GEN_MIPS) > 0;
1805 }
1806
1807
1808 /**
1809 * Given a texture format, return the expected data type returned from
1810 * the texture sampler. For example, UNORM8 formats return floating point
1811 * values while SINT formats returned signed integer values.
1812 * Note: this function could be moved into the gallum u_format.[ch] code
1813 * if it's useful to anyone else.
1814 */
1815 enum tgsi_return_type
svga_get_texture_datatype(enum pipe_format format)1816 svga_get_texture_datatype(enum pipe_format format)
1817 {
1818 const struct util_format_description *desc = util_format_description(format);
1819 enum tgsi_return_type t;
1820
1821 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1822 if (util_format_is_depth_or_stencil(format)) {
1823 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1824 }
1825 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1826 t = TGSI_RETURN_TYPE_FLOAT;
1827 }
1828 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1829 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1830 }
1831 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1832 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1833 }
1834 else {
1835 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1836 t = TGSI_RETURN_TYPE_FLOAT;
1837 }
1838 }
1839 else {
1840 /* compressed format, shared exponent format, etc. */
1841 switch (format) {
1842 case PIPE_FORMAT_DXT1_RGB:
1843 case PIPE_FORMAT_DXT1_RGBA:
1844 case PIPE_FORMAT_DXT3_RGBA:
1845 case PIPE_FORMAT_DXT5_RGBA:
1846 case PIPE_FORMAT_DXT1_SRGB:
1847 case PIPE_FORMAT_DXT1_SRGBA:
1848 case PIPE_FORMAT_DXT3_SRGBA:
1849 case PIPE_FORMAT_DXT5_SRGBA:
1850 case PIPE_FORMAT_RGTC1_UNORM:
1851 case PIPE_FORMAT_RGTC2_UNORM:
1852 case PIPE_FORMAT_LATC1_UNORM:
1853 case PIPE_FORMAT_LATC2_UNORM:
1854 case PIPE_FORMAT_ETC1_RGB8:
1855 t = TGSI_RETURN_TYPE_UNORM;
1856 break;
1857 case PIPE_FORMAT_RGTC1_SNORM:
1858 case PIPE_FORMAT_RGTC2_SNORM:
1859 case PIPE_FORMAT_LATC1_SNORM:
1860 case PIPE_FORMAT_LATC2_SNORM:
1861 case PIPE_FORMAT_R10G10B10X2_SNORM:
1862 t = TGSI_RETURN_TYPE_SNORM;
1863 break;
1864 case PIPE_FORMAT_R11G11B10_FLOAT:
1865 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1866 t = TGSI_RETURN_TYPE_FLOAT;
1867 break;
1868 default:
1869 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1870 t = TGSI_RETURN_TYPE_FLOAT;
1871 }
1872 }
1873
1874 return t;
1875 }
1876
1877
1878 /**
1879 * Given an svga context, return true iff there are currently any integer color
1880 * buffers attached to the framebuffer.
1881 */
1882 bool
svga_has_any_integer_cbufs(const struct svga_context * svga)1883 svga_has_any_integer_cbufs(const struct svga_context *svga)
1884 {
1885 unsigned i;
1886 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1887 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
1888
1889 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
1890 return true;
1891 }
1892 }
1893 return false;
1894 }
1895
1896
1897 /**
1898 * Given an SVGA format, return the corresponding typeless format.
1899 * If there is no typeless format, return the format unchanged.
1900 */
1901 SVGA3dSurfaceFormat
svga_typeless_format(SVGA3dSurfaceFormat format)1902 svga_typeless_format(SVGA3dSurfaceFormat format)
1903 {
1904 switch (format) {
1905 case SVGA3D_R32G32B32A32_UINT:
1906 case SVGA3D_R32G32B32A32_SINT:
1907 case SVGA3D_R32G32B32A32_FLOAT:
1908 case SVGA3D_R32G32B32A32_TYPELESS:
1909 return SVGA3D_R32G32B32A32_TYPELESS;
1910 case SVGA3D_R32G32B32_FLOAT:
1911 case SVGA3D_R32G32B32_UINT:
1912 case SVGA3D_R32G32B32_SINT:
1913 case SVGA3D_R32G32B32_TYPELESS:
1914 return SVGA3D_R32G32B32_TYPELESS;
1915 case SVGA3D_R16G16B16A16_UINT:
1916 case SVGA3D_R16G16B16A16_UNORM:
1917 case SVGA3D_R16G16B16A16_SNORM:
1918 case SVGA3D_R16G16B16A16_SINT:
1919 case SVGA3D_R16G16B16A16_FLOAT:
1920 case SVGA3D_R16G16B16A16_TYPELESS:
1921 return SVGA3D_R16G16B16A16_TYPELESS;
1922 case SVGA3D_R32G32_UINT:
1923 case SVGA3D_R32G32_SINT:
1924 case SVGA3D_R32G32_FLOAT:
1925 case SVGA3D_R32G32_TYPELESS:
1926 return SVGA3D_R32G32_TYPELESS;
1927 case SVGA3D_D32_FLOAT_S8X24_UINT:
1928 case SVGA3D_X32_G8X24_UINT:
1929 case SVGA3D_R32G8X24_TYPELESS:
1930 return SVGA3D_R32G8X24_TYPELESS;
1931 case SVGA3D_R10G10B10A2_UINT:
1932 case SVGA3D_R10G10B10A2_UNORM:
1933 case SVGA3D_R10G10B10A2_TYPELESS:
1934 return SVGA3D_R10G10B10A2_TYPELESS;
1935 case SVGA3D_R8G8B8A8_UNORM:
1936 case SVGA3D_R8G8B8A8_SNORM:
1937 case SVGA3D_R8G8B8A8_UNORM_SRGB:
1938 case SVGA3D_R8G8B8A8_UINT:
1939 case SVGA3D_R8G8B8A8_SINT:
1940 case SVGA3D_R8G8B8A8_TYPELESS:
1941 return SVGA3D_R8G8B8A8_TYPELESS;
1942 case SVGA3D_R16G16_UINT:
1943 case SVGA3D_R16G16_SINT:
1944 case SVGA3D_R16G16_UNORM:
1945 case SVGA3D_R16G16_SNORM:
1946 case SVGA3D_R16G16_FLOAT:
1947 case SVGA3D_R16G16_TYPELESS:
1948 return SVGA3D_R16G16_TYPELESS;
1949 case SVGA3D_D32_FLOAT:
1950 case SVGA3D_R32_FLOAT:
1951 case SVGA3D_R32_UINT:
1952 case SVGA3D_R32_SINT:
1953 case SVGA3D_R32_TYPELESS:
1954 return SVGA3D_R32_TYPELESS;
1955 case SVGA3D_D24_UNORM_S8_UINT:
1956 case SVGA3D_R24G8_TYPELESS:
1957 return SVGA3D_R24G8_TYPELESS;
1958 case SVGA3D_X24_G8_UINT:
1959 return SVGA3D_R24_UNORM_X8;
1960 case SVGA3D_R8G8_UNORM:
1961 case SVGA3D_R8G8_SNORM:
1962 case SVGA3D_R8G8_UINT:
1963 case SVGA3D_R8G8_SINT:
1964 case SVGA3D_R8G8_TYPELESS:
1965 return SVGA3D_R8G8_TYPELESS;
1966 case SVGA3D_D16_UNORM:
1967 case SVGA3D_R16_UNORM:
1968 case SVGA3D_R16_UINT:
1969 case SVGA3D_R16_SNORM:
1970 case SVGA3D_R16_SINT:
1971 case SVGA3D_R16_FLOAT:
1972 case SVGA3D_R16_TYPELESS:
1973 return SVGA3D_R16_TYPELESS;
1974 case SVGA3D_R8_UNORM:
1975 case SVGA3D_R8_UINT:
1976 case SVGA3D_R8_SNORM:
1977 case SVGA3D_R8_SINT:
1978 case SVGA3D_R8_TYPELESS:
1979 return SVGA3D_R8_TYPELESS;
1980 case SVGA3D_B8G8R8A8_UNORM_SRGB:
1981 case SVGA3D_B8G8R8A8_UNORM:
1982 case SVGA3D_B8G8R8A8_TYPELESS:
1983 return SVGA3D_B8G8R8A8_TYPELESS;
1984 case SVGA3D_B8G8R8X8_UNORM_SRGB:
1985 case SVGA3D_B8G8R8X8_UNORM:
1986 case SVGA3D_B8G8R8X8_TYPELESS:
1987 return SVGA3D_B8G8R8X8_TYPELESS;
1988 case SVGA3D_BC1_UNORM:
1989 case SVGA3D_BC1_UNORM_SRGB:
1990 case SVGA3D_BC1_TYPELESS:
1991 return SVGA3D_BC1_TYPELESS;
1992 case SVGA3D_BC2_UNORM:
1993 case SVGA3D_BC2_UNORM_SRGB:
1994 case SVGA3D_BC2_TYPELESS:
1995 return SVGA3D_BC2_TYPELESS;
1996 case SVGA3D_BC3_UNORM:
1997 case SVGA3D_BC3_UNORM_SRGB:
1998 case SVGA3D_BC3_TYPELESS:
1999 return SVGA3D_BC3_TYPELESS;
2000 case SVGA3D_BC4_UNORM:
2001 case SVGA3D_BC4_SNORM:
2002 case SVGA3D_BC4_TYPELESS:
2003 return SVGA3D_BC4_TYPELESS;
2004 case SVGA3D_BC5_UNORM:
2005 case SVGA3D_BC5_SNORM:
2006 case SVGA3D_BC5_TYPELESS:
2007 return SVGA3D_BC5_TYPELESS;
2008 case SVGA3D_BC6H_UF16:
2009 case SVGA3D_BC6H_SF16:
2010 case SVGA3D_BC6H_TYPELESS:
2011 return SVGA3D_BC6H_TYPELESS;
2012 case SVGA3D_BC7_UNORM:
2013 case SVGA3D_BC7_UNORM_SRGB:
2014 case SVGA3D_BC7_TYPELESS:
2015 return SVGA3D_BC7_TYPELESS;
2016 case SVGA3D_R11G11B10_FLOAT:
2017 case SVGA3D_R11G11B10_TYPELESS:
2018 return SVGA3D_R11G11B10_TYPELESS;
2019
2020 /* Special cases (no corresponding _TYPELESS formats) */
2021 case SVGA3D_A8_UNORM:
2022 case SVGA3D_B5G5R5A1_UNORM:
2023 case SVGA3D_B5G6R5_UNORM:
2024 case SVGA3D_R9G9B9E5_SHAREDEXP:
2025 return format;
2026 default:
2027 debug_printf("Unexpected format %s in %s\n",
2028 svga_format_name(format), __func__);
2029 return format;
2030 }
2031 }
2032
2033
2034 /**
2035 * Given a surface format, return the corresponding format to use for
2036 * a texture sampler. In most cases, it's the format unchanged, but there
2037 * are some special cases.
2038 */
2039 SVGA3dSurfaceFormat
svga_sampler_format(SVGA3dSurfaceFormat format)2040 svga_sampler_format(SVGA3dSurfaceFormat format)
2041 {
2042 switch (format) {
2043 case SVGA3D_D16_UNORM:
2044 return SVGA3D_R16_UNORM;
2045 case SVGA3D_D24_UNORM_S8_UINT:
2046 return SVGA3D_R24_UNORM_X8;
2047 case SVGA3D_D32_FLOAT:
2048 return SVGA3D_R32_FLOAT;
2049 case SVGA3D_D32_FLOAT_S8X24_UINT:
2050 return SVGA3D_R32_FLOAT_X8X24;
2051 default:
2052 return format;
2053 }
2054 }
2055
2056
2057 /**
2058 * Is the given format an uncompressed snorm format?
2059 */
2060 bool
svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)2061 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
2062 {
2063 switch (format) {
2064 case SVGA3D_R8G8B8A8_SNORM:
2065 case SVGA3D_R8G8_SNORM:
2066 case SVGA3D_R8_SNORM:
2067 case SVGA3D_R16G16B16A16_SNORM:
2068 case SVGA3D_R16G16_SNORM:
2069 case SVGA3D_R16_SNORM:
2070 return true;
2071 default:
2072 return false;
2073 }
2074 }
2075
2076
2077 bool
svga_format_is_typeless(SVGA3dSurfaceFormat format)2078 svga_format_is_typeless(SVGA3dSurfaceFormat format)
2079 {
2080 switch (format) {
2081 case SVGA3D_R32G32B32A32_TYPELESS:
2082 case SVGA3D_R32G32B32_TYPELESS:
2083 case SVGA3D_R16G16B16A16_TYPELESS:
2084 case SVGA3D_R32G32_TYPELESS:
2085 case SVGA3D_R32G8X24_TYPELESS:
2086 case SVGA3D_R10G10B10A2_TYPELESS:
2087 case SVGA3D_R8G8B8A8_TYPELESS:
2088 case SVGA3D_R16G16_TYPELESS:
2089 case SVGA3D_R32_TYPELESS:
2090 case SVGA3D_R24G8_TYPELESS:
2091 case SVGA3D_R8G8_TYPELESS:
2092 case SVGA3D_R16_TYPELESS:
2093 case SVGA3D_R8_TYPELESS:
2094 case SVGA3D_BC1_TYPELESS:
2095 case SVGA3D_BC2_TYPELESS:
2096 case SVGA3D_BC3_TYPELESS:
2097 case SVGA3D_BC4_TYPELESS:
2098 case SVGA3D_BC5_TYPELESS:
2099 case SVGA3D_BC6H_TYPELESS:
2100 case SVGA3D_BC7_TYPELESS:
2101 case SVGA3D_B8G8R8A8_TYPELESS:
2102 case SVGA3D_B8G8R8X8_TYPELESS:
2103 return true;
2104 default:
2105 return false;
2106 }
2107 }
2108
2109
2110 /**
2111 * \brief Can we import a surface with a given SVGA3D format as a texture?
2112 *
2113 * \param ss[in] pointer to the svga screen.
2114 * \param pformat[in] pipe format of the local texture.
2115 * \param sformat[in] svga3d format of the imported surface.
2116 * \param bind[in] bind flags of the imported texture.
2117 * \param verbose[in] Print out incompatibilities in debug mode.
2118 */
2119 bool
svga_format_is_shareable(const struct svga_screen * ss,enum pipe_format pformat,SVGA3dSurfaceFormat sformat,unsigned bind,bool verbose)2120 svga_format_is_shareable(const struct svga_screen *ss,
2121 enum pipe_format pformat,
2122 SVGA3dSurfaceFormat sformat,
2123 unsigned bind,
2124 bool verbose)
2125 {
2126 SVGA3dSurfaceFormat default_format =
2127 svga_translate_format(ss, pformat, bind);
2128 int i;
2129
2130 if (default_format == SVGA3D_FORMAT_INVALID)
2131 return false;
2132 if (default_format == sformat)
2133 return true;
2134
2135 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2136 if (format_compats[i].pformat == pformat) {
2137 const SVGA3dSurfaceFormat *compat_format =
2138 format_compats[i].compat_format;
2139 while (*compat_format != 0) {
2140 if (*compat_format == sformat)
2141 return true;
2142 compat_format++;
2143 }
2144 }
2145 }
2146
2147 if (verbose) {
2148 debug_printf("Incompatible imported surface format.\n");
2149 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2150 svga_format_name(default_format),
2151 svga_format_name(sformat));
2152 }
2153
2154 return false;
2155 }
2156
2157
2158 /**
2159 * Return the sRGB format which corresponds to the given (linear) format.
2160 * If there's no such sRGB format, return the format as-is.
2161 */
2162 SVGA3dSurfaceFormat
svga_linear_to_srgb(SVGA3dSurfaceFormat format)2163 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2164 {
2165 switch (format) {
2166 case SVGA3D_R8G8B8A8_UNORM:
2167 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2168 case SVGA3D_BC1_UNORM:
2169 return SVGA3D_BC1_UNORM_SRGB;
2170 case SVGA3D_BC2_UNORM:
2171 return SVGA3D_BC2_UNORM_SRGB;
2172 case SVGA3D_BC3_UNORM:
2173 return SVGA3D_BC3_UNORM_SRGB;
2174 case SVGA3D_B8G8R8A8_UNORM:
2175 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2176 case SVGA3D_B8G8R8X8_UNORM:
2177 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2178 default:
2179 return format;
2180 }
2181 }
2182
2183
2184 /**
2185 * Implement pipe_screen::is_format_supported().
2186 * \param bindings bitmask of PIPE_BIND_x flags
2187 */
2188 bool
svga_is_format_supported(struct pipe_screen * screen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned bindings)2189 svga_is_format_supported(struct pipe_screen *screen,
2190 enum pipe_format format,
2191 enum pipe_texture_target target,
2192 unsigned sample_count,
2193 unsigned storage_sample_count,
2194 unsigned bindings)
2195 {
2196 struct svga_screen *ss = svga_screen(screen);
2197 SVGA3dSurfaceFormat svga_format;
2198 SVGA3dSurfaceFormatCaps caps;
2199 SVGA3dSurfaceFormatCaps mask;
2200
2201 assert(bindings);
2202 assert(!ss->sws->have_vgpu10);
2203
2204 /* Multisamples is not supported in VGPU9 device */
2205 if (sample_count > 1)
2206 return false;
2207
2208 svga_format = svga_translate_format(ss, format, bindings);
2209 if (svga_format == SVGA3D_FORMAT_INVALID) {
2210 return false;
2211 }
2212
2213 if (util_format_is_srgb(format) &&
2214 (bindings & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_RENDER_TARGET))) {
2215 /* We only support sRGB rendering with vgpu10 */
2216 return false;
2217 }
2218
2219 /*
2220 * Override host capabilities, so that we end up with the same
2221 * visuals for all virtual hardware implementations.
2222 */
2223 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2224 switch (svga_format) {
2225 case SVGA3D_A8R8G8B8:
2226 case SVGA3D_X8R8G8B8:
2227 case SVGA3D_R5G6B5:
2228 break;
2229
2230 /* VGPU10 formats */
2231 case SVGA3D_B8G8R8A8_UNORM:
2232 case SVGA3D_B8G8R8X8_UNORM:
2233 case SVGA3D_B5G6R5_UNORM:
2234 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2235 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2236 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2237 break;
2238
2239 /* Often unsupported/problematic. This means we end up with the same
2240 * visuals for all virtual hardware implementations.
2241 */
2242 case SVGA3D_A4R4G4B4:
2243 case SVGA3D_A1R5G5B5:
2244 return false;
2245
2246 default:
2247 return false;
2248 }
2249 }
2250
2251 /*
2252 * Query the host capabilities.
2253 */
2254 svga_get_format_cap(ss, svga_format, &caps);
2255
2256 if (bindings & PIPE_BIND_RENDER_TARGET) {
2257 /* Check that the color surface is blendable, unless it's an
2258 * integer format.
2259 */
2260 if (!svga_format_is_integer(svga_format) &&
2261 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2262 return false;
2263 }
2264 }
2265
2266 mask.value = 0;
2267 if (bindings & PIPE_BIND_RENDER_TARGET)
2268 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2269
2270 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2271 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2272
2273 if (bindings & PIPE_BIND_SAMPLER_VIEW)
2274 mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2275
2276 if (target == PIPE_TEXTURE_CUBE)
2277 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2278 else if (target == PIPE_TEXTURE_3D)
2279 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2280
2281 return (caps.value & mask.value) == mask.value;
2282 }
2283
2284
2285 /**
2286 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2287 * \param bindings bitmask of PIPE_BIND_x flags
2288 */
2289 bool
svga_is_dx_format_supported(struct pipe_screen * screen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned bindings)2290 svga_is_dx_format_supported(struct pipe_screen *screen,
2291 enum pipe_format format,
2292 enum pipe_texture_target target,
2293 unsigned sample_count,
2294 unsigned storage_sample_count,
2295 unsigned bindings)
2296 {
2297 struct svga_screen *ss = svga_screen(screen);
2298 SVGA3dSurfaceFormat svga_format;
2299 SVGA3dDevCapResult caps;
2300 unsigned int mask = 0;
2301
2302 assert(bindings);
2303 assert(ss->sws->have_vgpu10);
2304
2305 /* To support framebuffer without attachments */
2306 if ((format == PIPE_FORMAT_NONE) && (bindings == PIPE_BIND_RENDER_TARGET))
2307 return (ss->sws->have_gl43 && (sample_count <= ss->forcedSampleCount));
2308
2309 if (sample_count > 1) {
2310
2311 /* No MSAA support for shader image */
2312 if (bindings & PIPE_BIND_SHADER_IMAGE)
2313 return false;
2314
2315 /* In ms_samples, if bit N is set it means that we support
2316 * multisample with N+1 samples per pixel.
2317 */
2318 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2319 return false;
2320 }
2321 mask |= SVGA3D_DXFMT_MULTISAMPLE;
2322 }
2323
2324 /*
2325 * For VGPU10 vertex formats, skip querying host capabilities
2326 */
2327
2328 if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2329 unsigned flags;
2330 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2331 return svga_format != SVGA3D_FORMAT_INVALID;
2332 }
2333
2334 if (bindings & PIPE_BIND_SAMPLER_VIEW && target == PIPE_BUFFER) {
2335 unsigned flags;
2336 svga_translate_texture_buffer_view_format(format, &svga_format, &flags);
2337 return svga_format != SVGA3D_FORMAT_INVALID;
2338 }
2339
2340 svga_format = svga_translate_format(ss, format, bindings);
2341 if (svga_format == SVGA3D_FORMAT_INVALID) {
2342 return false;
2343 }
2344
2345 /*
2346 * Override host capabilities, so that we end up with the same
2347 * visuals for all virtual hardware implementations.
2348 */
2349 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2350 switch (svga_format) {
2351 case SVGA3D_A8R8G8B8:
2352 case SVGA3D_X8R8G8B8:
2353 case SVGA3D_R5G6B5:
2354 break;
2355
2356 /* VGPU10 formats */
2357 case SVGA3D_B8G8R8A8_UNORM:
2358 case SVGA3D_B8G8R8X8_UNORM:
2359 case SVGA3D_B5G6R5_UNORM:
2360 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2361 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2362 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2363 break;
2364
2365 /* Often unsupported/problematic. This means we end up with the same
2366 * visuals for all virtual hardware implementations.
2367 */
2368 case SVGA3D_A4R4G4B4:
2369 case SVGA3D_A1R5G5B5:
2370 return false;
2371
2372 default:
2373 return false;
2374 }
2375 }
2376
2377 /*
2378 * Query the host capabilities.
2379 */
2380 svga_get_dx_format_cap(ss, svga_format, &caps);
2381
2382 if (bindings & PIPE_BIND_RENDER_TARGET) {
2383 /* Check that the color surface is blendable, unless it's an
2384 * integer format.
2385 */
2386 if (!(svga_format_is_integer(svga_format) ||
2387 (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2388 return false;
2389 }
2390 mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2391 }
2392
2393 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2394 mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2395
2396 switch (target) {
2397 case PIPE_TEXTURE_3D:
2398 mask |= SVGA3D_DXFMT_VOLUME;
2399 break;
2400 case PIPE_TEXTURE_1D_ARRAY:
2401 case PIPE_TEXTURE_2D_ARRAY:
2402 case PIPE_TEXTURE_CUBE_ARRAY:
2403 mask |= SVGA3D_DXFMT_ARRAY;
2404 break;
2405 default:
2406 break;
2407 }
2408
2409 /* Is the format supported for rendering */
2410 if ((caps.u & mask) != mask)
2411 return false;
2412
2413 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2414 SVGA3dSurfaceFormat sampler_format;
2415
2416 /* Get the sampler view format */
2417 sampler_format = svga_sampler_format(svga_format);
2418 if (sampler_format != svga_format) {
2419 caps.u = 0;
2420 svga_get_dx_format_cap(ss, sampler_format, &caps);
2421 mask &= SVGA3D_DXFMT_VOLUME;
2422 mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2423 if ((caps.u & mask) != mask)
2424 return false;
2425 }
2426 }
2427
2428 return true;
2429 }
2430