1 /*
2 * Copyright (c) 2008-2024 Broadcom. All Rights Reserved.
3 * The term “Broadcom” refers to Broadcom Inc.
4 * and/or its subsidiaries.
5 * SPDX-License-Identifier: MIT
6 */
7
8 #include "draw/draw_context.h"
9 #include "draw/draw_vbuf.h"
10 #include "util/u_bitmask.h"
11 #include "util/u_inlines.h"
12 #include "pipe/p_state.h"
13
14 #include "svga_cmd.h"
15 #include "svga_context.h"
16 #include "svga_shader.h"
17 #include "svga_swtnl.h"
18 #include "svga_state.h"
19 #include "svga_tgsi.h"
20 #include "svga_swtnl_private.h"
21
22
23 #define SVGA_POINT_ADJ_X -0.375f
24 #define SVGA_POINT_ADJ_Y -0.5f
25
26 #define SVGA_LINE_ADJ_X -0.5f
27 #define SVGA_LINE_ADJ_Y -0.5f
28
29 #define SVGA_TRIANGLE_ADJ_X -0.375f
30 #define SVGA_TRIANGLE_ADJ_Y -0.5f
31
32
33 static void
set_draw_viewport(struct svga_context * svga)34 set_draw_viewport(struct svga_context *svga)
35 {
36 struct pipe_viewport_state vp = svga->curr.viewport[0];
37 float adjx = 0.0f;
38 float adjy = 0.0f;
39
40 if (svga_have_vgpu10(svga)) {
41 if (svga->curr.reduced_prim == MESA_PRIM_TRIANGLES) {
42 adjy = 0.25;
43 }
44 }
45 else {
46 switch (svga->curr.reduced_prim) {
47 case MESA_PRIM_POINTS:
48 adjx = SVGA_POINT_ADJ_X;
49 adjy = SVGA_POINT_ADJ_Y;
50 break;
51 case MESA_PRIM_LINES:
52 /* XXX: This is to compensate for the fact that wide lines are
53 * going to be drawn with triangles, but we're not catching all
54 * cases where that will happen.
55 */
56 if (svga->curr.rast->need_pipeline & SVGA_PIPELINE_FLAG_LINES)
57 {
58 adjx = SVGA_LINE_ADJ_X + 0.175f;
59 adjy = SVGA_LINE_ADJ_Y - 0.175f;
60 }
61 else {
62 adjx = SVGA_LINE_ADJ_X;
63 adjy = SVGA_LINE_ADJ_Y;
64 }
65 break;
66 case MESA_PRIM_TRIANGLES:
67 adjx += SVGA_TRIANGLE_ADJ_X;
68 adjy += SVGA_TRIANGLE_ADJ_Y;
69 break;
70 default:
71 /* nothing */
72 break;
73 }
74 }
75
76 vp.translate[0] += adjx;
77 vp.translate[1] += adjy;
78
79 draw_set_viewport_states(svga->swtnl.draw, 0, 1, &vp);
80 }
81
82 static enum pipe_error
update_swtnl_draw(struct svga_context * svga,uint64_t dirty)83 update_swtnl_draw(struct svga_context *svga, uint64_t dirty)
84 {
85 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLUPDATEDRAW);
86
87 draw_flush(svga->swtnl.draw);
88
89 if (dirty & SVGA_NEW_VS)
90 draw_bind_vertex_shader(svga->swtnl.draw,
91 svga->curr.vs->draw_shader);
92
93 if (dirty & SVGA_NEW_FS)
94 draw_bind_fragment_shader(svga->swtnl.draw,
95 svga->curr.fs->draw_shader);
96
97 if (dirty & SVGA_NEW_VBUFFER)
98 draw_set_vertex_buffers(svga->swtnl.draw,
99 svga->curr.num_vertex_buffers,
100 svga->curr.vb);
101
102 if (dirty & SVGA_NEW_VELEMENT)
103 draw_set_vertex_elements(svga->swtnl.draw,
104 svga->curr.velems->count,
105 svga->curr.velems->velem);
106
107 if (dirty & SVGA_NEW_CLIP)
108 draw_set_clip_state(svga->swtnl.draw,
109 &svga->curr.clip);
110
111 if (dirty & (SVGA_NEW_VIEWPORT |
112 SVGA_NEW_REDUCED_PRIMITIVE |
113 SVGA_NEW_RAST))
114 set_draw_viewport(svga);
115
116 if (dirty & SVGA_NEW_RAST)
117 draw_set_rasterizer_state(svga->swtnl.draw,
118 &svga->curr.rast->templ,
119 (void *) svga->curr.rast);
120
121 /* Tell the draw module how deep the Z/depth buffer is.
122 *
123 * If no depth buffer is bound, send the utility function the
124 * format for no bound depth (PIPE_FORMAT_NONE).
125 */
126 if (dirty & SVGA_NEW_FRAME_BUFFER)
127 draw_set_zs_format(svga->swtnl.draw,
128 (svga->curr.framebuffer.zsbuf) ?
129 svga->curr.framebuffer.zsbuf->format : PIPE_FORMAT_NONE);
130
131 SVGA_STATS_TIME_POP(svga_sws(svga));
132 return PIPE_OK;
133 }
134
135
136 struct svga_tracked_state svga_update_swtnl_draw =
137 {
138 "update draw module state",
139 (SVGA_NEW_VS |
140 SVGA_NEW_VBUFFER |
141 SVGA_NEW_VELEMENT |
142 SVGA_NEW_CLIP |
143 SVGA_NEW_VIEWPORT |
144 SVGA_NEW_RAST |
145 SVGA_NEW_FRAME_BUFFER |
146 SVGA_NEW_REDUCED_PRIMITIVE),
147 update_swtnl_draw
148 };
149
150
151 static SVGA3dSurfaceFormat
translate_vertex_format(SVGA3dDeclType format)152 translate_vertex_format(SVGA3dDeclType format)
153 {
154 switch (format) {
155 case SVGA3D_DECLTYPE_FLOAT1:
156 return SVGA3D_R32_FLOAT;
157 case SVGA3D_DECLTYPE_FLOAT2:
158 return SVGA3D_R32G32_FLOAT;
159 case SVGA3D_DECLTYPE_FLOAT3:
160 return SVGA3D_R32G32B32_FLOAT;
161 case SVGA3D_DECLTYPE_FLOAT4:
162 return SVGA3D_R32G32B32A32_FLOAT;
163 default:
164 assert(!"Unexpected format in translate_vertex_format()");
165 return SVGA3D_R32G32B32A32_FLOAT;
166 }
167 }
168
169
170 static SVGA3dElementLayoutId
svga_vdecl_to_input_element(struct svga_context * svga,const SVGA3dVertexDecl * vdecl,unsigned num_decls)171 svga_vdecl_to_input_element(struct svga_context *svga,
172 const SVGA3dVertexDecl *vdecl, unsigned num_decls)
173 {
174 SVGA3dElementLayoutId id;
175 SVGA3dInputElementDesc elements[PIPE_MAX_ATTRIBS];
176 unsigned i;
177
178 assert(num_decls <= PIPE_MAX_ATTRIBS);
179 assert(svga_have_vgpu10(svga));
180
181 for (i = 0; i < num_decls; i++) {
182 elements[i].inputSlot = 0; /* vertex buffer index */
183 elements[i].alignedByteOffset = vdecl[i].array.offset;
184 elements[i].format = translate_vertex_format(vdecl[i].identity.type);
185 elements[i].inputSlotClass = SVGA3D_INPUT_PER_VERTEX_DATA;
186 elements[i].instanceDataStepRate = 0;
187 elements[i].inputRegister = i;
188 }
189
190 id = util_bitmask_add(svga->input_element_object_id_bm);
191
192 SVGA_RETRY(svga, SVGA3D_vgpu10_DefineElementLayout(svga->swc, num_decls, id,
193 elements));
194
195 return id;
196 }
197
198
199 enum pipe_error
svga_swtnl_update_vdecl(struct svga_context * svga)200 svga_swtnl_update_vdecl(struct svga_context *svga)
201 {
202 struct svga_vbuf_render *svga_render = svga_vbuf_render(svga->swtnl.backend);
203 struct draw_context *draw = svga->swtnl.draw;
204 struct vertex_info *vinfo = &svga_render->vertex_info;
205 SVGA3dVertexDecl vdecl[PIPE_MAX_ATTRIBS];
206 struct svga_fragment_shader *fs = svga->curr.fs;
207 int offset = 0;
208 int nr_decls = 0;
209 int src;
210 unsigned i;
211 int any_change;
212
213 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLUPDATEVDECL);
214
215 memset(vinfo, 0, sizeof(*vinfo));
216 memset(vdecl, 0, sizeof(vdecl));
217
218 draw_prepare_shader_outputs(draw);
219
220 /* always add position */
221 src = draw_find_shader_output(draw, TGSI_SEMANTIC_POSITION, 0);
222 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
223 vinfo->attrib[0].emit = EMIT_4F;
224 vdecl[0].array.offset = offset;
225 vdecl[0].identity.method = SVGA3D_DECLMETHOD_DEFAULT;
226 vdecl[0].identity.type = SVGA3D_DECLTYPE_FLOAT4;
227 vdecl[0].identity.usage = SVGA3D_DECLUSAGE_POSITIONT;
228 vdecl[0].identity.usageIndex = 0;
229 offset += 16;
230 nr_decls++;
231
232 for (i = 0; i < fs->base.info.num_inputs; i++) {
233 const enum tgsi_semantic sem_name = fs->base.tgsi_info.input_semantic_name[i];
234 const unsigned sem_index = fs->base.tgsi_info.input_semantic_index[i];
235
236 src = draw_find_shader_output(draw, sem_name, sem_index);
237
238 vdecl[nr_decls].array.offset = offset;
239 vdecl[nr_decls].identity.usageIndex = sem_index;
240
241 switch (sem_name) {
242 case TGSI_SEMANTIC_COLOR:
243 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
244 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_COLOR;
245 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT4;
246 offset += 16;
247 nr_decls++;
248 break;
249 case TGSI_SEMANTIC_GENERIC:
250 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
251 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_TEXCOORD;
252 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT4;
253 vdecl[nr_decls].identity.usageIndex =
254 svga_remap_generic_index(fs->generic_remap_table, sem_index);
255 offset += 16;
256 nr_decls++;
257 break;
258 case TGSI_SEMANTIC_TEXCOORD:
259 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
260 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_TEXCOORD;
261 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT4;
262 offset += 16;
263 nr_decls++;
264 break;
265 case TGSI_SEMANTIC_FOG:
266 draw_emit_vertex_attr(vinfo, EMIT_1F, src);
267 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_TEXCOORD;
268 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT1;
269 assert(vdecl[nr_decls].identity.usageIndex == 0);
270 offset += 4;
271 nr_decls++;
272 break;
273 case TGSI_SEMANTIC_POSITION:
274 case TGSI_SEMANTIC_FACE:
275 /* generated internally, not a vertex shader output */
276 break;
277 default:
278 assert(0);
279 }
280 }
281
282 draw_compute_vertex_size(vinfo);
283
284 svga_render->vdecl_count = nr_decls;
285 for (i = 0; i < svga_render->vdecl_count; i++) {
286 vdecl[i].array.stride = offset;
287 }
288
289 any_change = memcmp(svga_render->vdecl, vdecl, sizeof(vdecl));
290
291 if (svga_have_vgpu10(svga)) {
292 if (!any_change && svga_render->layout_id != SVGA3D_INVALID_ID) {
293 goto done;
294 }
295
296 if (svga_render->layout_id != SVGA3D_INVALID_ID) {
297 /* destroy old */
298 SVGA_RETRY(svga, SVGA3D_vgpu10_DestroyElementLayout
299 (svga->swc, svga_render->layout_id));
300
301 /**
302 * reset current layout id state after the element layout is
303 * destroyed, so that if a new layout has the same layout id, we
304 * will know to re-issue the SetInputLayout command.
305 */
306 if (svga->state.hw_draw.layout_id == svga_render->layout_id)
307 svga->state.hw_draw.layout_id = SVGA3D_INVALID_ID;
308
309 util_bitmask_clear(svga->input_element_object_id_bm,
310 svga_render->layout_id);
311 }
312
313 svga_render->layout_id =
314 svga_vdecl_to_input_element(svga, vdecl, nr_decls);
315
316 /* bind new */
317 if (svga->state.hw_draw.layout_id != svga_render->layout_id) {
318 SVGA_RETRY(svga, SVGA3D_vgpu10_SetInputLayout(svga->swc,
319 svga_render->layout_id));
320 svga->state.hw_draw.layout_id = svga_render->layout_id;
321 }
322 }
323 else {
324 if (!any_change)
325 goto done;
326 }
327
328 memcpy(svga_render->vdecl, vdecl, sizeof(vdecl));
329 svga->swtnl.new_vdecl = true;
330
331 done:
332 SVGA_STATS_TIME_POP(svga_sws(svga));
333 return PIPE_OK;
334 }
335
336
337 static enum pipe_error
update_swtnl_vdecl(struct svga_context * svga,uint64_t dirty)338 update_swtnl_vdecl(struct svga_context *svga, uint64_t dirty)
339 {
340 return svga_swtnl_update_vdecl(svga);
341 }
342
343
344 struct svga_tracked_state svga_update_swtnl_vdecl =
345 {
346 "update draw module vdecl",
347 (SVGA_NEW_VS |
348 SVGA_NEW_FS),
349 update_swtnl_vdecl
350 };
351