1 /*
2 * Copyright 2011 Joakim Sindholt <[email protected]>
3 * Copyright 2013 Christoph Bumiller
4 * SPDX-License-Identifier: MIT
5 */
6
7 #include "device9.h"
8 #include "nine_pipe.h"
9
10 #include "cso_cache/cso_context.h"
11
12 void
nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state * dsa_state,const DWORD * rs)13 nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *dsa_state,
14 const DWORD *rs)
15 {
16 struct pipe_depth_stencil_alpha_state dsa;
17
18 memset(&dsa, 0, sizeof(dsa)); /* memcmp safety */
19
20 if (rs[D3DRS_ZENABLE]) {
21 dsa.depth_enabled = 1;
22 dsa.depth_func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ZFUNC]);
23 /* Disable depth write if no change can occur */
24 dsa.depth_writemask = !!rs[D3DRS_ZWRITEENABLE] &&
25 dsa.depth_func != PIPE_FUNC_EQUAL &&
26 dsa.depth_func != PIPE_FUNC_NEVER;
27 }
28
29 if (rs[D3DRS_STENCILENABLE]) {
30 dsa.stencil[0].enabled = 1;
31 dsa.stencil[0].func = d3dcmpfunc_to_pipe_func(rs[D3DRS_STENCILFUNC]);
32 dsa.stencil[0].fail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILFAIL]);
33 dsa.stencil[0].zpass_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILPASS]);
34 dsa.stencil[0].zfail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILZFAIL]);
35 dsa.stencil[0].valuemask = rs[D3DRS_STENCILMASK];
36 dsa.stencil[0].writemask = rs[D3DRS_STENCILWRITEMASK];
37
38 if (rs[D3DRS_TWOSIDEDSTENCILMODE]) {
39 dsa.stencil[1].enabled = 1;
40 dsa.stencil[1].func = d3dcmpfunc_to_pipe_func(rs[D3DRS_CCW_STENCILFUNC]);
41 dsa.stencil[1].fail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILFAIL]);
42 dsa.stencil[1].zpass_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILPASS]);
43 dsa.stencil[1].zfail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILZFAIL]);
44 dsa.stencil[1].valuemask = dsa.stencil[0].valuemask;
45 dsa.stencil[1].writemask = dsa.stencil[0].writemask;
46 }
47 }
48
49 if (rs[D3DRS_ALPHATESTENABLE] && rs[NINED3DRS_EMULATED_ALPHATEST] == 7 && rs[D3DRS_ALPHAFUNC] != D3DCMP_ALWAYS) {
50 dsa.alpha_enabled = 1;
51 dsa.alpha_func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ALPHAFUNC]);
52 dsa.alpha_ref_value = (float)rs[D3DRS_ALPHAREF] / 255.0f;
53 }
54
55 *dsa_state = dsa;
56 }
57
58 void
nine_convert_rasterizer_state(struct NineDevice9 * device,struct pipe_rasterizer_state * rast_state,const DWORD * rs)59 nine_convert_rasterizer_state(struct NineDevice9 *device,
60 struct pipe_rasterizer_state *rast_state,
61 const DWORD *rs)
62 {
63 struct pipe_rasterizer_state rast;
64
65 memset(&rast, 0, sizeof(rast));
66
67 rast.flatshade = rs[D3DRS_SHADEMODE] == D3DSHADE_FLAT;
68 /* rast.light_twoside = 0; */
69 /* rast.clamp_fragment_color = 0; */
70 /* rast.clamp_vertex_color = 0; */
71 /* rast.front_ccw = 0; */
72 rast.cull_face = d3dcull_to_pipe_face(rs[D3DRS_CULLMODE]);
73 rast.fill_front = d3dfillmode_to_pipe_polygon_mode(rs[D3DRS_FILLMODE]);
74 rast.fill_back = rast.fill_front;
75 rast.offset_tri = !!(rs[D3DRS_DEPTHBIAS] | rs[D3DRS_SLOPESCALEDEPTHBIAS]);
76 rast.offset_line = rast.offset_tri; /* triangles in wireframe mode */
77 rast.offset_point = 0; /* XXX ? */
78 rast.scissor = !!rs[D3DRS_SCISSORTESTENABLE];
79 /* rast.poly_smooth = 0; */
80 /* rast.poly_stipple_enable = 0; */
81 /* rast.point_smooth = 0; */
82 rast.sprite_coord_mode = PIPE_SPRITE_COORD_UPPER_LEFT;
83 rast.point_quad_rasterization = 1;
84 rast.point_size_per_vertex = rs[NINED3DRS_VSPOINTSIZE];
85 rast.multisample = rs[NINED3DRS_MULTISAMPLE];
86 rast.line_smooth = !!rs[D3DRS_ANTIALIASEDLINEENABLE];
87 /* rast.line_stipple_enable = 0; */
88 rast.line_last_pixel = !!rs[D3DRS_LASTPIXEL];
89 rast.flatshade_first = 1;
90 /* rast.half_pixel_center = 0; */
91 /* rast.lower_left_origin = 0; */
92 /* rast.bottom_edge_rule = 0; */
93 /* rast.rasterizer_discard = 0; */
94 if (rs[NINED3DRS_POSITIONT] &&
95 !device->driver_caps.window_space_position_support &&
96 device->driver_caps.disabling_depth_clipping_support) {
97 /* rast.depth_clip_near = 0; */
98 /* rast.depth_clip_far = 0; */
99 rast.depth_clamp = 1;
100 } else {
101 rast.depth_clip_near = 1;
102 rast.depth_clip_far = 1;
103 /* rast.depth_clamp = 0; */
104 }
105 rast.clip_halfz = 1;
106 rast.clip_plane_enable = rs[D3DRS_CLIPPLANEENABLE];
107 /* rast.line_stipple_factor = 0; */
108 /* rast.line_stipple_pattern = 0; */
109 rast.sprite_coord_enable = rs[D3DRS_POINTSPRITEENABLE] ? 0xff : 0x00;
110 rast.line_width = 1.0f;
111 rast.line_rectangular = 0;
112 if (rs[NINED3DRS_VSPOINTSIZE]) {
113 rast.point_size = 1.0f;
114 } else {
115 rast.point_size = CLAMP(asfloat(rs[D3DRS_POINTSIZE]),
116 asfloat(rs[D3DRS_POINTSIZE_MIN]),
117 asfloat(rs[D3DRS_POINTSIZE_MAX]));
118 }
119 /* offset_units has the ogl/d3d11 meaning.
120 * d3d9: offset = scale * dz + bias
121 * ogl/d3d11: offset = scale * dz + r * bias
122 * with r implementation dependent (+ different formula for float depth
123 * buffers). r=2^-23 is often the right value for gallium drivers.
124 * If possible, use offset_units_unscaled, which gives the d3d9
125 * behaviour, else scale by 1 << 23 */
126 rast.offset_units = asfloat(rs[D3DRS_DEPTHBIAS]) * (device->driver_caps.offset_units_unscaled ? 1.0f : (float)(1 << 23));
127 rast.offset_units_unscaled = device->driver_caps.offset_units_unscaled;
128 rast.offset_scale = asfloat(rs[D3DRS_SLOPESCALEDEPTHBIAS]);
129 /* rast.offset_clamp = 0.0f; */
130
131 *rast_state = rast;
132 }
133
134 static inline void
nine_convert_blend_state_fixup(struct pipe_blend_state * blend,const DWORD * rs)135 nine_convert_blend_state_fixup(struct pipe_blend_state *blend, const DWORD *rs)
136 {
137 if (unlikely(rs[D3DRS_SRCBLEND] == D3DBLEND_BOTHSRCALPHA ||
138 rs[D3DRS_SRCBLEND] == D3DBLEND_BOTHINVSRCALPHA)) {
139 blend->rt[0].rgb_dst_factor = (rs[D3DRS_SRCBLEND] == D3DBLEND_BOTHSRCALPHA) ?
140 PIPE_BLENDFACTOR_INV_SRC_ALPHA : PIPE_BLENDFACTOR_SRC_ALPHA;
141 if (!rs[D3DRS_SEPARATEALPHABLENDENABLE])
142 blend->rt[0].alpha_dst_factor = blend->rt[0].rgb_dst_factor;
143 } else
144 if (unlikely(rs[D3DRS_SEPARATEALPHABLENDENABLE] &&
145 (rs[D3DRS_SRCBLENDALPHA] == D3DBLEND_BOTHSRCALPHA ||
146 rs[D3DRS_SRCBLENDALPHA] == D3DBLEND_BOTHINVSRCALPHA))) {
147 blend->rt[0].alpha_dst_factor = (rs[D3DRS_SRCBLENDALPHA] == D3DBLEND_BOTHSRCALPHA) ?
148 PIPE_BLENDFACTOR_INV_SRC_ALPHA : PIPE_BLENDFACTOR_SRC_ALPHA;
149 }
150 }
151
152 void
nine_convert_blend_state(struct pipe_blend_state * blend_state,const DWORD * rs)153 nine_convert_blend_state(struct pipe_blend_state *blend_state, const DWORD *rs)
154 {
155 struct pipe_blend_state blend;
156
157 memset(&blend, 0, sizeof(blend)); /* memcmp safety */
158
159 blend.dither = !!rs[D3DRS_DITHERENABLE];
160
161 /* blend.alpha_to_one = 0; */
162 blend.alpha_to_coverage = !!(rs[NINED3DRS_ALPHACOVERAGE] & 5);
163
164 blend.rt[0].blend_enable = !!rs[D3DRS_ALPHABLENDENABLE];
165 if (blend.rt[0].blend_enable) {
166 blend.rt[0].rgb_func = d3dblendop_to_pipe_blend(rs[D3DRS_BLENDOP]);
167 blend.rt[0].rgb_src_factor = d3dblend_color_to_pipe_blendfactor(rs[D3DRS_SRCBLEND]);
168 blend.rt[0].rgb_dst_factor = d3dblend_color_to_pipe_blendfactor(rs[D3DRS_DESTBLEND]);
169 if (rs[D3DRS_SEPARATEALPHABLENDENABLE]) {
170 blend.rt[0].alpha_func = d3dblendop_to_pipe_blend(rs[D3DRS_BLENDOPALPHA]);
171 blend.rt[0].alpha_src_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_SRCBLENDALPHA]);
172 blend.rt[0].alpha_dst_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_DESTBLENDALPHA]);
173 } else {
174 /* TODO: Just copy the rgb values ? SRC1_x may differ ... */
175 blend.rt[0].alpha_func = blend.rt[0].rgb_func;
176 blend.rt[0].alpha_src_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_SRCBLEND]);
177 blend.rt[0].alpha_dst_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_DESTBLEND]);
178 }
179 nine_convert_blend_state_fixup(&blend, rs); /* for BOTH[INV]SRCALPHA */
180 }
181
182 blend.max_rt = 3; /* Upper bound. Could be optimized to fb->nr_cbufs for example */
183 blend.rt[0].colormask = rs[D3DRS_COLORWRITEENABLE];
184
185 if (rs[D3DRS_COLORWRITEENABLE1] != rs[D3DRS_COLORWRITEENABLE] ||
186 rs[D3DRS_COLORWRITEENABLE2] != rs[D3DRS_COLORWRITEENABLE] ||
187 rs[D3DRS_COLORWRITEENABLE3] != rs[D3DRS_COLORWRITEENABLE]) {
188 unsigned i;
189 blend.independent_blend_enable = true;
190 for (i = 1; i < 4; ++i)
191 blend.rt[i] = blend.rt[0];
192 blend.rt[1].colormask = rs[D3DRS_COLORWRITEENABLE1];
193 blend.rt[2].colormask = rs[D3DRS_COLORWRITEENABLE2];
194 blend.rt[3].colormask = rs[D3DRS_COLORWRITEENABLE3];
195 }
196
197 /* blend.force_srgb = !!rs[D3DRS_SRGBWRITEENABLE]; */
198
199 *blend_state = blend;
200 }
201
202 void
nine_convert_sampler_state(struct cso_context * ctx,int idx,const DWORD * ss)203 nine_convert_sampler_state(struct cso_context *ctx, int idx, const DWORD *ss)
204 {
205 struct pipe_sampler_state samp;
206
207 assert(idx >= 0 &&
208 (idx < NINE_MAX_SAMPLERS_PS || idx >= NINE_SAMPLER_VS(0)) &&
209 (idx < NINE_MAX_SAMPLERS));
210
211 if (ss[D3DSAMP_MIPFILTER] != D3DTEXF_NONE) {
212 samp.lod_bias = asfloat(ss[D3DSAMP_MIPMAPLODBIAS]);
213 samp.min_lod = ss[NINED3DSAMP_MINLOD];
214 samp.min_mip_filter = (ss[D3DSAMP_MIPFILTER] == D3DTEXF_POINT) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR;
215 } else {
216 samp.min_lod = 0.0;
217 samp.lod_bias = 0.0;
218 samp.min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
219 }
220 samp.max_lod = 15.0f;
221
222 if (ss[NINED3DSAMP_CUBETEX]) {
223 /* Cube textures are always clamped to edge on D3D */
224 samp.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
225 samp.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
226 samp.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
227 } else {
228 samp.wrap_s = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSU]);
229 samp.wrap_t = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSV]);
230 samp.wrap_r = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSW]);
231 }
232 samp.min_img_filter = (ss[D3DSAMP_MINFILTER] == D3DTEXF_POINT && !ss[NINED3DSAMP_SHADOW]) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR;
233 samp.mag_img_filter = (ss[D3DSAMP_MAGFILTER] == D3DTEXF_POINT && !ss[NINED3DSAMP_SHADOW]) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR;
234 if (ss[D3DSAMP_MINFILTER] == D3DTEXF_ANISOTROPIC ||
235 ss[D3DSAMP_MAGFILTER] == D3DTEXF_ANISOTROPIC)
236 samp.max_anisotropy = MIN2(16, ss[D3DSAMP_MAXANISOTROPY]);
237 else
238 samp.max_anisotropy = 0;
239 samp.compare_mode = ss[NINED3DSAMP_SHADOW] ? PIPE_TEX_COMPARE_R_TO_TEXTURE : PIPE_TEX_COMPARE_NONE;
240 samp.compare_func = PIPE_FUNC_LEQUAL;
241 samp.unnormalized_coords = 0;
242 samp.seamless_cube_map = 0;
243 samp.border_color_is_integer = 0;
244 samp.reduction_mode = 0;
245 samp.pad = 0;
246 samp.border_color_format = PIPE_FORMAT_NONE;
247 d3dcolor_to_pipe_color_union(&samp.border_color, ss[D3DSAMP_BORDERCOLOR]);
248
249 /* see nine_state.h */
250 if (idx < NINE_MAX_SAMPLERS_PS)
251 cso_single_sampler(ctx, PIPE_SHADER_FRAGMENT, idx - NINE_SAMPLER_PS(0), &samp);
252 else
253 cso_single_sampler(ctx, PIPE_SHADER_VERTEX, idx - NINE_SAMPLER_VS(0), &samp);
254 }
255
256 const enum pipe_format nine_d3d9_to_pipe_format_map[120] =
257 {
258 [D3DFMT_UNKNOWN] = PIPE_FORMAT_NONE,
259 [D3DFMT_R8G8B8] = PIPE_FORMAT_R8G8B8_UNORM,
260 [D3DFMT_A8R8G8B8] = PIPE_FORMAT_B8G8R8A8_UNORM,
261 [D3DFMT_X8R8G8B8] = PIPE_FORMAT_B8G8R8X8_UNORM,
262 [D3DFMT_R5G6B5] = PIPE_FORMAT_B5G6R5_UNORM,
263 [D3DFMT_X1R5G5B5] = PIPE_FORMAT_B5G5R5X1_UNORM,
264 [D3DFMT_A1R5G5B5] = PIPE_FORMAT_B5G5R5A1_UNORM,
265 [D3DFMT_A4R4G4B4] = PIPE_FORMAT_B4G4R4A4_UNORM,
266 [D3DFMT_R3G3B2] = PIPE_FORMAT_B2G3R3_UNORM,
267 [D3DFMT_A8] = PIPE_FORMAT_A8_UNORM,
268 [D3DFMT_A8R3G3B2] = PIPE_FORMAT_NONE,
269 [D3DFMT_X4R4G4B4] = PIPE_FORMAT_B4G4R4X4_UNORM,
270 [D3DFMT_A2B10G10R10] = PIPE_FORMAT_R10G10B10A2_UNORM,
271 [D3DFMT_A8B8G8R8] = PIPE_FORMAT_R8G8B8A8_UNORM,
272 [D3DFMT_X8B8G8R8] = PIPE_FORMAT_R8G8B8X8_UNORM,
273 [D3DFMT_G16R16] = PIPE_FORMAT_R16G16_UNORM,
274 [D3DFMT_A2R10G10B10] = PIPE_FORMAT_B10G10R10A2_UNORM,
275 [D3DFMT_A16B16G16R16] = PIPE_FORMAT_R16G16B16A16_UNORM,
276 [D3DFMT_A8P8] = PIPE_FORMAT_NONE,
277 [D3DFMT_P8] = PIPE_FORMAT_NONE,
278 [D3DFMT_L8] = PIPE_FORMAT_L8_UNORM,
279 [D3DFMT_A8L8] = PIPE_FORMAT_L8A8_UNORM,
280 [D3DFMT_A4L4] = PIPE_FORMAT_L4A4_UNORM,
281 [D3DFMT_V8U8] = PIPE_FORMAT_R8G8_SNORM,
282 [D3DFMT_L6V5U5] = PIPE_FORMAT_NONE, /* Should be PIPE_FORMAT_R5SG5SB6U_NORM, but interpretation of the data differs a bit. */
283 [D3DFMT_X8L8V8U8] = PIPE_FORMAT_R8SG8SB8UX8U_NORM,
284 [D3DFMT_Q8W8V8U8] = PIPE_FORMAT_R8G8B8A8_SNORM,
285 [D3DFMT_V16U16] = PIPE_FORMAT_R16G16_SNORM,
286 [D3DFMT_A2W10V10U10] = PIPE_FORMAT_R10SG10SB10SA2U_NORM,
287 [D3DFMT_D16_LOCKABLE] = PIPE_FORMAT_Z16_UNORM,
288 [D3DFMT_D32] = PIPE_FORMAT_Z32_UNORM,
289 [D3DFMT_D15S1] = PIPE_FORMAT_NONE,
290 [D3DFMT_D24S8] = PIPE_FORMAT_S8_UINT_Z24_UNORM,
291 [D3DFMT_D24X8] = PIPE_FORMAT_X8Z24_UNORM,
292 [D3DFMT_D24X4S4] = PIPE_FORMAT_NONE,
293 [D3DFMT_D16] = PIPE_FORMAT_Z16_UNORM,
294 [D3DFMT_D32F_LOCKABLE] = PIPE_FORMAT_Z32_FLOAT,
295 [D3DFMT_D24FS8] = PIPE_FORMAT_Z32_FLOAT_S8X24_UINT,
296 [D3DFMT_D32_LOCKABLE] = PIPE_FORMAT_NONE,
297 [D3DFMT_S8_LOCKABLE] = PIPE_FORMAT_NONE,
298 [D3DFMT_L16] = PIPE_FORMAT_L16_UNORM,
299 [D3DFMT_VERTEXDATA] = PIPE_FORMAT_NONE,
300 [D3DFMT_INDEX16] = PIPE_FORMAT_R16_UINT,
301 [D3DFMT_INDEX32] = PIPE_FORMAT_R32_UINT,
302 [D3DFMT_Q16W16V16U16] = PIPE_FORMAT_R16G16B16A16_SNORM,
303 [D3DFMT_R16F] = PIPE_FORMAT_R16_FLOAT,
304 [D3DFMT_G16R16F] = PIPE_FORMAT_R16G16_FLOAT,
305 [D3DFMT_A16B16G16R16F] = PIPE_FORMAT_R16G16B16A16_FLOAT,
306 [D3DFMT_R32F] = PIPE_FORMAT_R32_FLOAT,
307 [D3DFMT_G32R32F] = PIPE_FORMAT_R32G32_FLOAT,
308 [D3DFMT_A32B32G32R32F] = PIPE_FORMAT_R32G32B32A32_FLOAT,
309 [D3DFMT_CxV8U8] = PIPE_FORMAT_NONE,
310 [D3DFMT_A1] = PIPE_FORMAT_NONE,
311 [D3DFMT_A2B10G10R10_XR_BIAS] = PIPE_FORMAT_NONE,
312 };
313
314 const D3DFORMAT nine_pipe_to_d3d9_format_map[PIPE_FORMAT_COUNT] =
315 {
316 [PIPE_FORMAT_NONE] = D3DFMT_UNKNOWN,
317 /* TODO: rename PIPE_FORMAT_R8G8B8_UNORM to PIPE_FORMAT_B8G8R8_UNORM */
318 [PIPE_FORMAT_R8G8B8_UNORM] = D3DFMT_R8G8B8,
319 [PIPE_FORMAT_B8G8R8A8_UNORM] = D3DFMT_A8R8G8B8,
320 [PIPE_FORMAT_B8G8R8X8_UNORM] = D3DFMT_X8R8G8B8,
321 [PIPE_FORMAT_B5G6R5_UNORM] = D3DFMT_R5G6B5,
322 [PIPE_FORMAT_B5G5R5X1_UNORM] = D3DFMT_X1R5G5B5,
323 [PIPE_FORMAT_B5G5R5A1_UNORM] = D3DFMT_A1R5G5B5,
324 [PIPE_FORMAT_B4G4R4A4_UNORM] = D3DFMT_A4R4G4B4,
325 [PIPE_FORMAT_B2G3R3_UNORM] = D3DFMT_R3G3B2,
326 [PIPE_FORMAT_A8_UNORM] = D3DFMT_A8,
327 /* [PIPE_FORMAT_B2G3R3A8_UNORM] = D3DFMT_A8R3G3B2, */
328 [PIPE_FORMAT_B4G4R4X4_UNORM] = D3DFMT_X4R4G4B4,
329 [PIPE_FORMAT_R10G10B10A2_UNORM] = D3DFMT_A2B10G10R10,
330 [PIPE_FORMAT_R8G8B8A8_UNORM] = D3DFMT_A8B8G8R8,
331 [PIPE_FORMAT_R8G8B8X8_UNORM] = D3DFMT_X8B8G8R8,
332 [PIPE_FORMAT_R16G16_UNORM] = D3DFMT_G16R16,
333 [PIPE_FORMAT_B10G10R10A2_UNORM] = D3DFMT_A2R10G10B10,
334 [PIPE_FORMAT_R16G16B16A16_UNORM] = D3DFMT_A16B16G16R16,
335
336 [PIPE_FORMAT_R8_UINT] = D3DFMT_P8,
337 [PIPE_FORMAT_R8A8_UINT] = D3DFMT_A8P8,
338
339 [PIPE_FORMAT_L8_UNORM] = D3DFMT_L8,
340 [PIPE_FORMAT_L8A8_UNORM] = D3DFMT_A8L8,
341 [PIPE_FORMAT_L4A4_UNORM] = D3DFMT_A4L4,
342
343 [PIPE_FORMAT_R8G8_SNORM] = D3DFMT_V8U8,
344 /* [PIPE_FORMAT_?] = D3DFMT_L6V5U5, */
345 /* [PIPE_FORMAT_?] = D3DFMT_X8L8V8U8, */
346 [PIPE_FORMAT_R8G8B8A8_SNORM] = D3DFMT_Q8W8V8U8,
347 [PIPE_FORMAT_R16G16_SNORM] = D3DFMT_V16U16,
348 [PIPE_FORMAT_R10SG10SB10SA2U_NORM] = D3DFMT_A2W10V10U10,
349
350 [PIPE_FORMAT_YUYV] = D3DFMT_UYVY,
351 /* [PIPE_FORMAT_YUY2] = D3DFMT_YUY2, */
352 [PIPE_FORMAT_DXT1_RGBA] = D3DFMT_DXT1,
353 /* [PIPE_FORMAT_DXT2_RGBA] = D3DFMT_DXT2, */
354 [PIPE_FORMAT_DXT3_RGBA] = D3DFMT_DXT3,
355 /* [PIPE_FORMAT_DXT4_RGBA] = D3DFMT_DXT4, */
356 [PIPE_FORMAT_DXT5_RGBA] = D3DFMT_DXT5,
357 /* [PIPE_FORMAT_?] = D3DFMT_MULTI2_ARGB8, (MET) */
358 [PIPE_FORMAT_R8G8_B8G8_UNORM] = D3DFMT_R8G8_B8G8, /* XXX: order */
359 [PIPE_FORMAT_G8R8_G8B8_UNORM] = D3DFMT_G8R8_G8B8,
360
361 [PIPE_FORMAT_Z16_UNORM] = D3DFMT_D16_LOCKABLE,
362 [PIPE_FORMAT_Z32_UNORM] = D3DFMT_D32,
363 /* [PIPE_FORMAT_Z15_UNORM_S1_UINT] = D3DFMT_D15S1, */
364 [PIPE_FORMAT_S8_UINT_Z24_UNORM] = D3DFMT_D24S8,
365 [PIPE_FORMAT_X8Z24_UNORM] = D3DFMT_D24X8,
366 [PIPE_FORMAT_L16_UNORM] = D3DFMT_L16,
367 [PIPE_FORMAT_Z32_FLOAT] = D3DFMT_D32F_LOCKABLE,
368 /* [PIPE_FORMAT_Z24_FLOAT_S8_UINT] = D3DFMT_D24FS8, */
369
370 [PIPE_FORMAT_R16_UINT] = D3DFMT_INDEX16,
371 [PIPE_FORMAT_R32_UINT] = D3DFMT_INDEX32,
372 [PIPE_FORMAT_R16G16B16A16_SNORM] = D3DFMT_Q16W16V16U16,
373
374 [PIPE_FORMAT_R16_FLOAT] = D3DFMT_R16F,
375 [PIPE_FORMAT_R32_FLOAT] = D3DFMT_R32F,
376 [PIPE_FORMAT_R16G16_FLOAT] = D3DFMT_G16R16F,
377 [PIPE_FORMAT_R32G32_FLOAT] = D3DFMT_G32R32F,
378 [PIPE_FORMAT_R16G16B16A16_FLOAT] = D3DFMT_A16B16G16R16F,
379 [PIPE_FORMAT_R32G32B32A32_FLOAT] = D3DFMT_A32B32G32R32F,
380
381 /* [PIPE_FORMAT_?] = D3DFMT_CxV8U8, */
382 };
383