1 /************************************************************************** 2 * 3 * Copyright 2007 VMware, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef PIPE_DEFINES_H 29 #define PIPE_DEFINES_H 30 31 /* For pipe_blend* and pipe_logicop enums */ 32 #include "util/blend.h" 33 34 #include "util/compiler.h" 35 36 #include "compiler/shader_enums.h" 37 #include "util/os_time.h" 38 39 #ifdef __cplusplus 40 extern "C" { 41 #endif 42 43 /** 44 * Gallium error codes. 45 * 46 * - A zero value always means success. 47 * - A negative value always means failure. 48 * - The meaning of a positive value is function dependent. 49 */ 50 enum pipe_error 51 { 52 PIPE_OK = 0, 53 PIPE_ERROR = -1, /**< Generic error */ 54 PIPE_ERROR_BAD_INPUT = -2, 55 PIPE_ERROR_OUT_OF_MEMORY = -3, 56 PIPE_ERROR_RETRY = -4 57 /* TODO */ 58 }; 59 60 /** 61 * Inequality functions. Used for depth test, stencil compare, alpha 62 * test, shadow compare, etc. 63 */ 64 enum pipe_compare_func { 65 PIPE_FUNC_NEVER, 66 PIPE_FUNC_LESS, 67 PIPE_FUNC_EQUAL, 68 PIPE_FUNC_LEQUAL, 69 PIPE_FUNC_GREATER, 70 PIPE_FUNC_NOTEQUAL, 71 PIPE_FUNC_GEQUAL, 72 PIPE_FUNC_ALWAYS, 73 }; 74 75 /** Polygon fill mode */ 76 enum { 77 PIPE_POLYGON_MODE_FILL, 78 PIPE_POLYGON_MODE_LINE, 79 PIPE_POLYGON_MODE_POINT, 80 PIPE_POLYGON_MODE_FILL_RECTANGLE, 81 }; 82 83 /** Polygon face specification, eg for culling */ 84 #define PIPE_FACE_NONE 0 85 #define PIPE_FACE_FRONT 1 86 #define PIPE_FACE_BACK 2 87 #define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK) 88 89 /** Stencil ops */ 90 enum pipe_stencil_op { 91 PIPE_STENCIL_OP_KEEP, 92 PIPE_STENCIL_OP_ZERO, 93 PIPE_STENCIL_OP_REPLACE, 94 PIPE_STENCIL_OP_INCR, 95 PIPE_STENCIL_OP_DECR, 96 PIPE_STENCIL_OP_INCR_WRAP, 97 PIPE_STENCIL_OP_DECR_WRAP, 98 PIPE_STENCIL_OP_INVERT, 99 }; 100 101 /** Texture types. 102 * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D 103 */ 104 enum pipe_texture_target 105 { 106 PIPE_BUFFER, 107 PIPE_TEXTURE_1D, 108 PIPE_TEXTURE_2D, 109 PIPE_TEXTURE_3D, 110 PIPE_TEXTURE_CUBE, 111 PIPE_TEXTURE_RECT, 112 PIPE_TEXTURE_1D_ARRAY, 113 PIPE_TEXTURE_2D_ARRAY, 114 PIPE_TEXTURE_CUBE_ARRAY, 115 PIPE_MAX_TEXTURE_TYPES, 116 }; 117 118 enum pipe_tex_face { 119 PIPE_TEX_FACE_POS_X, 120 PIPE_TEX_FACE_NEG_X, 121 PIPE_TEX_FACE_POS_Y, 122 PIPE_TEX_FACE_NEG_Y, 123 PIPE_TEX_FACE_POS_Z, 124 PIPE_TEX_FACE_NEG_Z, 125 PIPE_TEX_FACE_MAX, 126 }; 127 128 enum pipe_tex_wrap { 129 PIPE_TEX_WRAP_REPEAT, 130 PIPE_TEX_WRAP_CLAMP, 131 PIPE_TEX_WRAP_CLAMP_TO_EDGE, 132 PIPE_TEX_WRAP_CLAMP_TO_BORDER, 133 PIPE_TEX_WRAP_MIRROR_REPEAT, 134 PIPE_TEX_WRAP_MIRROR_CLAMP, 135 PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE, 136 PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER, 137 }; 138 139 /** Between mipmaps, ie mipfilter */ 140 enum pipe_tex_mipfilter { 141 PIPE_TEX_MIPFILTER_NEAREST, 142 PIPE_TEX_MIPFILTER_LINEAR, 143 PIPE_TEX_MIPFILTER_NONE, 144 }; 145 146 /** Within a mipmap, ie min/mag filter */ 147 enum pipe_tex_filter { 148 PIPE_TEX_FILTER_NEAREST, 149 PIPE_TEX_FILTER_LINEAR, 150 }; 151 152 enum pipe_tex_compare { 153 PIPE_TEX_COMPARE_NONE, 154 PIPE_TEX_COMPARE_R_TO_TEXTURE, 155 }; 156 157 enum pipe_tex_reduction_mode { 158 PIPE_TEX_REDUCTION_WEIGHTED_AVERAGE, 159 PIPE_TEX_REDUCTION_MIN, 160 PIPE_TEX_REDUCTION_MAX, 161 }; 162 163 /** 164 * Clear buffer bits 165 */ 166 #define PIPE_CLEAR_DEPTH (1 << 0) 167 #define PIPE_CLEAR_STENCIL (1 << 1) 168 #define PIPE_CLEAR_COLOR0 (1 << 2) 169 #define PIPE_CLEAR_COLOR1 (1 << 3) 170 #define PIPE_CLEAR_COLOR2 (1 << 4) 171 #define PIPE_CLEAR_COLOR3 (1 << 5) 172 #define PIPE_CLEAR_COLOR4 (1 << 6) 173 #define PIPE_CLEAR_COLOR5 (1 << 7) 174 #define PIPE_CLEAR_COLOR6 (1 << 8) 175 #define PIPE_CLEAR_COLOR7 (1 << 9) 176 /** Combined flags */ 177 /** All color buffers currently bound */ 178 #define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \ 179 PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \ 180 PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \ 181 PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7) 182 #define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL) 183 184 /** 185 * CPU access map flags 186 */ 187 enum pipe_map_flags 188 { 189 PIPE_MAP_NONE = 0, 190 /** 191 * Resource contents read back (or accessed directly) at transfer 192 * create time. 193 */ 194 PIPE_MAP_READ = 1 << 0, 195 196 /** 197 * Resource contents will be written back at buffer/texture_unmap 198 * time (or modified as a result of being accessed directly). 199 */ 200 PIPE_MAP_WRITE = 1 << 1, 201 202 /** 203 * Read/modify/write 204 */ 205 PIPE_MAP_READ_WRITE = PIPE_MAP_READ | PIPE_MAP_WRITE, 206 207 /** 208 * The transfer should map the texture storage directly. The driver may 209 * return NULL if that isn't possible, and the gallium frontend needs to cope 210 * with that and use an alternative path without this flag. 211 * 212 * E.g. the gallium frontend could have a simpler path which maps textures and 213 * does read/modify/write cycles on them directly, and a more complicated 214 * path which uses minimal read and write transfers. 215 * 216 * This flag supresses implicit "DISCARD" for buffer_subdata. 217 */ 218 PIPE_MAP_DIRECTLY = 1 << 2, 219 220 /** 221 * Discards the memory within the mapped region. 222 * 223 * It should not be used with PIPE_MAP_READ. 224 * 225 * See also: 226 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. 227 */ 228 PIPE_MAP_DISCARD_RANGE = 1 << 3, 229 230 /** 231 * Fail if the resource cannot be mapped immediately. 232 * 233 * See also: 234 * - Direct3D's D3DLOCK_DONOTWAIT flag. 235 * - Mesa's MESA_MAP_NOWAIT_BIT flag. 236 * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. 237 */ 238 PIPE_MAP_DONTBLOCK = 1 << 4, 239 240 /** 241 * Do not attempt to synchronize pending operations on the resource when mapping. 242 * 243 * It should not be used with PIPE_MAP_READ. 244 * 245 * See also: 246 * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. 247 * - Direct3D's D3DLOCK_NOOVERWRITE flag. 248 * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. 249 */ 250 PIPE_MAP_UNSYNCHRONIZED = 1 << 5, 251 252 /** 253 * Written ranges will be notified later with 254 * pipe_context::transfer_flush_region. 255 * 256 * It should not be used with PIPE_MAP_READ. 257 * 258 * See also: 259 * - pipe_context::transfer_flush_region 260 * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. 261 */ 262 PIPE_MAP_FLUSH_EXPLICIT = 1 << 6, 263 264 /** 265 * Discards all memory backing the resource. 266 * 267 * It should not be used with PIPE_MAP_READ. 268 * 269 * This is equivalent to: 270 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT 271 * - BufferData(NULL) on a GL buffer 272 * - Direct3D's D3DLOCK_DISCARD flag. 273 * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag. 274 * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag 275 * - D3D10's D3D10_MAP_WRITE_DISCARD flag. 276 */ 277 PIPE_MAP_DISCARD_WHOLE_RESOURCE = 1 << 7, 278 279 /** 280 * Allows the resource to be used for rendering while mapped. 281 * 282 * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating 283 * the resource. 284 * 285 * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) 286 * must be called to ensure the device can see what the CPU has written. 287 */ 288 PIPE_MAP_PERSISTENT = 1 << 8, 289 290 /** 291 * If PERSISTENT is set, this ensures any writes done by the device are 292 * immediately visible to the CPU and vice versa. 293 * 294 * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating 295 * the resource. 296 */ 297 PIPE_MAP_COHERENT = 1 << 9, 298 299 /** 300 * Map a resource in a thread-safe manner, because the calling thread can 301 * be any thread. It can only be used if both WRITE and UNSYNCHRONIZED are 302 * set. 303 */ 304 PIPE_MAP_THREAD_SAFE = 1 << 10, 305 306 /** 307 * Map only the depth aspect of a resource 308 */ 309 PIPE_MAP_DEPTH_ONLY = 1 << 11, 310 311 /** 312 * Map only the stencil aspect of a resource 313 */ 314 PIPE_MAP_STENCIL_ONLY = 1 << 12, 315 316 /** 317 * Mapping will be used only once (never remapped). 318 */ 319 PIPE_MAP_ONCE = 1 << 13, 320 321 /** 322 * This and higher bits are reserved for private use by drivers. Drivers 323 * should use this as (PIPE_MAP_DRV_PRV << i). 324 */ 325 PIPE_MAP_DRV_PRV = 1 << 14, 326 }; 327 328 /** 329 * Flags for the flush function. 330 */ 331 enum pipe_flush_flags 332 { 333 PIPE_FLUSH_END_OF_FRAME = (1 << 0), 334 PIPE_FLUSH_DEFERRED = (1 << 1), 335 PIPE_FLUSH_FENCE_FD = (1 << 2), 336 PIPE_FLUSH_ASYNC = (1 << 3), 337 PIPE_FLUSH_HINT_FINISH = (1 << 4), 338 PIPE_FLUSH_TOP_OF_PIPE = (1 << 5), 339 PIPE_FLUSH_BOTTOM_OF_PIPE = (1 << 6), 340 }; 341 342 /** 343 * Flags for pipe_context::dump_debug_state. 344 */ 345 #define PIPE_DUMP_DEVICE_STATUS_REGISTERS (1 << 0) 346 347 /** 348 * Create a compute-only context. Use in pipe_screen::context_create. 349 * This disables draw, blit, and clear*, render_condition, and other graphics 350 * functions. Interop with other graphics contexts is still allowed. 351 * This allows scheduling jobs on a compute-only hardware command queue that 352 * can run in parallel with graphics without stalling it. 353 */ 354 #define PIPE_CONTEXT_COMPUTE_ONLY (1 << 0) 355 356 /** 357 * Gather debug information and expect that pipe_context::dump_debug_state 358 * will be called. Use in pipe_screen::context_create. 359 */ 360 #define PIPE_CONTEXT_DEBUG (1 << 1) 361 362 /** 363 * Whether out-of-bounds shader loads must return zero and out-of-bounds 364 * shader stores must be dropped. 365 */ 366 #define PIPE_CONTEXT_ROBUST_BUFFER_ACCESS (1 << 2) 367 368 /** 369 * Prefer threaded pipe_context. It also implies that video codec functions 370 * will not be used. (they will be either no-ops or NULL when threading is 371 * enabled) 372 */ 373 #define PIPE_CONTEXT_PREFER_THREADED (1 << 3) 374 375 /** 376 * Create a high priority context. 377 */ 378 #define PIPE_CONTEXT_HIGH_PRIORITY (1 << 4) 379 380 /** 381 * Create a low priority context. 382 */ 383 #define PIPE_CONTEXT_LOW_PRIORITY (1 << 5) 384 385 /** Stop execution if the device is reset. */ 386 #define PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET (1 << 6) 387 388 /** 389 * Create a protected context to access protected content (surfaces, 390 * textures, ...) 391 * 392 * This is required to access protected images and surfaces if 393 * EGL_EXT_protected_surface is not supported. 394 */ 395 #define PIPE_CONTEXT_PROTECTED (1 << 7) 396 397 /** 398 * Create a context that does not use sampler LOD bias. If this is set, the 399 * frontend MUST set pipe_sampler_state::lod_bias to 0.0f for all samplers used 400 * with the context. Drivers MAY ignore lod_bias for such contexts. 401 * 402 * This may allow driver fast paths for GLES, which lacks sampler LOD bias. 403 */ 404 #define PIPE_CONTEXT_NO_LOD_BIAS (1 << 8) 405 406 /** 407 * Create a media-only context. Use in pipe_screen::context_create. 408 * This disables draw, blit, and clear*, render_condition, and other graphics. 409 * This also disabled all compute related functions 410 * functions. Interop with other media contexts is still allowed. 411 * This allows scheduling jobs on a media-only hardware command queue that 412 * can run in parallel with media without stalling it. 413 */ 414 #define PIPE_CONTEXT_MEDIA_ONLY (1 << 9) 415 416 /** 417 * Flags for pipe_context::memory_barrier. 418 */ 419 #define PIPE_BARRIER_MAPPED_BUFFER (1 << 0) 420 #define PIPE_BARRIER_SHADER_BUFFER (1 << 1) 421 #define PIPE_BARRIER_QUERY_BUFFER (1 << 2) 422 #define PIPE_BARRIER_VERTEX_BUFFER (1 << 3) 423 #define PIPE_BARRIER_INDEX_BUFFER (1 << 4) 424 #define PIPE_BARRIER_CONSTANT_BUFFER (1 << 5) 425 #define PIPE_BARRIER_INDIRECT_BUFFER (1 << 6) 426 #define PIPE_BARRIER_TEXTURE (1 << 7) 427 #define PIPE_BARRIER_IMAGE (1 << 8) 428 #define PIPE_BARRIER_FRAMEBUFFER (1 << 9) 429 #define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10) 430 #define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11) 431 #define PIPE_BARRIER_UPDATE_BUFFER (1 << 12) 432 #define PIPE_BARRIER_UPDATE_TEXTURE (1 << 13) 433 #define PIPE_BARRIER_ALL ((1 << 14) - 1) 434 435 #define PIPE_BARRIER_UPDATE \ 436 (PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE) 437 438 /** 439 * Flags for pipe_context::texture_barrier. 440 */ 441 #define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0) 442 #define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1) 443 444 /** 445 * Resource binding flags -- gallium frontends must specify in advance all 446 * the ways a resource might be used. 447 */ 448 #define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */ 449 #define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */ 450 #define PIPE_BIND_BLENDABLE (1 << 2) /* create_surface */ 451 #define PIPE_BIND_SAMPLER_VIEW (1 << 3) /* create_sampler_view */ 452 #define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */ 453 #define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */ 454 #define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */ 455 #define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */ 456 #define PIPE_BIND_VERTEX_STATE (1 << 8) /* create_vertex_state */ 457 /* gap */ 458 #define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */ 459 #define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */ 460 #define PIPE_BIND_CUSTOM (1 << 12) /* gallium frontend/winsys usages */ 461 #define PIPE_BIND_GLOBAL (1 << 13) /* set_global_binding */ 462 #define PIPE_BIND_SHADER_BUFFER (1 << 14) /* set_shader_buffers */ 463 #define PIPE_BIND_SHADER_IMAGE (1 << 15) /* set_shader_images */ 464 #define PIPE_BIND_COMPUTE_RESOURCE (1 << 16) /* set_compute_resources */ 465 #define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 17) /* pipe_draw_info.indirect */ 466 #define PIPE_BIND_QUERY_BUFFER (1 << 18) /* get_query_result_resource */ 467 468 /** 469 * The first two flags above were previously part of the amorphous 470 * TEXTURE_USAGE, most of which are now descriptions of the ways a 471 * particular texture can be bound to the gallium pipeline. The two flags 472 * below do not fit within that and probably need to be migrated to some 473 * other place. 474 * 475 * Scanout is used to ask for a texture suitable for actual scanout (hence 476 * the name), which implies extra layout constraints on some hardware. 477 * It may also have some special meaning regarding mouse cursor images. 478 * 479 * The shared flag is quite underspecified, but certainly isn't a 480 * binding flag - it seems more like a message to the winsys to create 481 * a shareable allocation. 482 * 483 * The third flag has been added to be able to force textures to be created 484 * in linear mode (no tiling). 485 */ 486 #define PIPE_BIND_SCANOUT (1 << 19) /* */ 487 #define PIPE_BIND_SHARED (1 << 20) /* get_texture_handle ??? */ 488 #define PIPE_BIND_LINEAR (1 << 21) 489 #define PIPE_BIND_PROTECTED (1 << 22) /* Resource will be protected/encrypted */ 490 #define PIPE_BIND_SAMPLER_REDUCTION_MINMAX (1 << 23) /* PIPE_CAP_SAMPLER_REDUCTION_MINMAX */ 491 /* Resource is the DRI_PRIME blit destination. Only set on on the render GPU. */ 492 #define PIPE_BIND_PRIME_BLIT_DST (1 << 24) 493 #define PIPE_BIND_USE_FRONT_RENDERING (1 << 25) /* Resource may be used for frontbuffer rendering */ 494 #define PIPE_BIND_CONST_BW (1 << 26) /* Avoid using a data dependent layout (AFBC, UBWC, etc) */ 495 #define PIPE_BIND_VIDEO_DECODE_DPB (1 << 27) /* video engine DPB decode reconstructed picture */ 496 #define PIPE_BIND_VIDEO_ENCODE_DPB (1 << 28) /* video engine DPB encode reconstructed picture */ 497 498 /** 499 * Flags for the driver about resource behaviour: 500 */ 501 #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0) 502 #define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1) 503 #define PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY (1 << 2) 504 #define PIPE_RESOURCE_FLAG_SPARSE (1 << 3) 505 #define PIPE_RESOURCE_FLAG_SINGLE_THREAD_USE (1 << 4) 506 #define PIPE_RESOURCE_FLAG_ENCRYPTED (1 << 5) 507 #define PIPE_RESOURCE_FLAG_DONT_OVER_ALLOCATE (1 << 6) 508 #define PIPE_RESOURCE_FLAG_DONT_MAP_DIRECTLY (1 << 7) /* for small visible VRAM */ 509 #define PIPE_RESOURCE_FLAG_UNMAPPABLE (1 << 8) /* implies staging transfers due to VK interop */ 510 #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 9) /* driver/winsys private */ 511 #define PIPE_RESOURCE_FLAG_FRONTEND_PRIV (1 << 24) /* gallium frontend private */ 512 513 /** 514 * Fixed-rate compression 515 */ 516 #define PIPE_COMPRESSION_FIXED_RATE_NONE 0x0 517 #define PIPE_COMPRESSION_FIXED_RATE_DEFAULT 0xF 518 519 /** 520 * Hint about the expected lifecycle of a resource. 521 * Sorted according to GPU vs CPU access. 522 */ 523 enum pipe_resource_usage { 524 PIPE_USAGE_DEFAULT, /* fast GPU access */ 525 PIPE_USAGE_IMMUTABLE, /* fast GPU access, immutable */ 526 PIPE_USAGE_DYNAMIC, /* uploaded data is used multiple times */ 527 PIPE_USAGE_STREAM, /* uploaded data is used once */ 528 PIPE_USAGE_STAGING, /* fast CPU access */ 529 }; 530 531 /** 532 * Tessellator spacing types 533 */ 534 enum pipe_tess_spacing { 535 PIPE_TESS_SPACING_FRACTIONAL_ODD, 536 PIPE_TESS_SPACING_FRACTIONAL_EVEN, 537 PIPE_TESS_SPACING_EQUAL, 538 }; 539 540 /** 541 * Query object types 542 */ 543 enum pipe_query_type { 544 PIPE_QUERY_OCCLUSION_COUNTER, 545 PIPE_QUERY_OCCLUSION_PREDICATE, 546 PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE, 547 PIPE_QUERY_TIMESTAMP, 548 PIPE_QUERY_TIMESTAMP_DISJOINT, 549 PIPE_QUERY_TIME_ELAPSED, 550 PIPE_QUERY_PRIMITIVES_GENERATED, 551 PIPE_QUERY_PRIMITIVES_EMITTED, 552 PIPE_QUERY_SO_STATISTICS, 553 PIPE_QUERY_SO_OVERFLOW_PREDICATE, 554 PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE, 555 PIPE_QUERY_GPU_FINISHED, 556 PIPE_QUERY_PIPELINE_STATISTICS, 557 PIPE_QUERY_PIPELINE_STATISTICS_SINGLE, 558 PIPE_QUERY_TYPES, 559 /* start of driver queries, see pipe_screen::get_driver_query_info */ 560 PIPE_QUERY_DRIVER_SPECIFIC = 256, 561 }; 562 563 /** 564 * Index for PIPE_QUERY_PIPELINE_STATISTICS subqueries. 565 */ 566 enum pipe_statistics_query_index { 567 PIPE_STAT_QUERY_IA_VERTICES, 568 PIPE_STAT_QUERY_IA_PRIMITIVES, 569 PIPE_STAT_QUERY_VS_INVOCATIONS, 570 PIPE_STAT_QUERY_GS_INVOCATIONS, 571 PIPE_STAT_QUERY_GS_PRIMITIVES, 572 PIPE_STAT_QUERY_C_INVOCATIONS, 573 PIPE_STAT_QUERY_C_PRIMITIVES, 574 PIPE_STAT_QUERY_PS_INVOCATIONS, 575 PIPE_STAT_QUERY_HS_INVOCATIONS, 576 PIPE_STAT_QUERY_DS_INVOCATIONS, 577 PIPE_STAT_QUERY_CS_INVOCATIONS, 578 PIPE_STAT_QUERY_TS_INVOCATIONS, 579 PIPE_STAT_QUERY_MS_INVOCATIONS, 580 }; 581 582 /** 583 * Conditional rendering modes 584 */ 585 enum pipe_render_cond_flag { 586 PIPE_RENDER_COND_WAIT, 587 PIPE_RENDER_COND_NO_WAIT, 588 PIPE_RENDER_COND_BY_REGION_WAIT, 589 PIPE_RENDER_COND_BY_REGION_NO_WAIT, 590 }; 591 592 /** 593 * Point sprite coord modes 594 */ 595 enum pipe_sprite_coord_mode { 596 PIPE_SPRITE_COORD_UPPER_LEFT, 597 PIPE_SPRITE_COORD_LOWER_LEFT, 598 }; 599 600 /** 601 * Viewport swizzles 602 */ 603 enum pipe_viewport_swizzle { 604 PIPE_VIEWPORT_SWIZZLE_POSITIVE_X, 605 PIPE_VIEWPORT_SWIZZLE_NEGATIVE_X, 606 PIPE_VIEWPORT_SWIZZLE_POSITIVE_Y, 607 PIPE_VIEWPORT_SWIZZLE_NEGATIVE_Y, 608 PIPE_VIEWPORT_SWIZZLE_POSITIVE_Z, 609 PIPE_VIEWPORT_SWIZZLE_NEGATIVE_Z, 610 PIPE_VIEWPORT_SWIZZLE_POSITIVE_W, 611 PIPE_VIEWPORT_SWIZZLE_NEGATIVE_W, 612 }; 613 614 /** 615 * Device reset status. 616 */ 617 enum pipe_reset_status 618 { 619 PIPE_NO_RESET, 620 PIPE_GUILTY_CONTEXT_RESET, 621 PIPE_INNOCENT_CONTEXT_RESET, 622 PIPE_UNKNOWN_CONTEXT_RESET, 623 }; 624 625 626 /** 627 * Conservative rasterization modes. 628 */ 629 enum pipe_conservative_raster_mode 630 { 631 PIPE_CONSERVATIVE_RASTER_OFF, 632 633 /** 634 * The post-snap mode means the conservative rasterization occurs after 635 * the conversion from floating-point to fixed-point coordinates 636 * on the subpixel grid. 637 */ 638 PIPE_CONSERVATIVE_RASTER_POST_SNAP, 639 640 /** 641 * The pre-snap mode means the conservative rasterization occurs before 642 * the conversion from floating-point to fixed-point coordinates. 643 */ 644 PIPE_CONSERVATIVE_RASTER_PRE_SNAP, 645 }; 646 647 648 /** 649 * resource_get_handle flags. 650 */ 651 /* Requires pipe_context::flush_resource before external use. */ 652 #define PIPE_HANDLE_USAGE_EXPLICIT_FLUSH (1 << 0) 653 /* Expected external use of the resource: */ 654 #define PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE (1 << 1) 655 #define PIPE_HANDLE_USAGE_SHADER_WRITE (1 << 2) 656 657 /** 658 * pipe_image_view access flags. 659 */ 660 #define PIPE_IMAGE_ACCESS_READ (1 << 0) 661 #define PIPE_IMAGE_ACCESS_WRITE (1 << 1) 662 #define PIPE_IMAGE_ACCESS_READ_WRITE (PIPE_IMAGE_ACCESS_READ | \ 663 PIPE_IMAGE_ACCESS_WRITE) 664 #define PIPE_IMAGE_ACCESS_COHERENT (1 << 2) 665 #define PIPE_IMAGE_ACCESS_VOLATILE (1 << 3) 666 #define PIPE_IMAGE_ACCESS_TEX2D_FROM_BUFFER (1 << 4) 667 #define PIPE_IMAGE_ACCESS_DRIVER_INTERNAL (1 << 5) 668 669 /** 670 * Shader subgroup feature flags aligned with GL_KHR_shader_subgroup. 671 */ 672 #define PIPE_SHADER_SUBGROUP_FEATURE_BASIC (1 << 0) 673 #define PIPE_SHADER_SUBGROUP_FEATURE_VOTE (1 << 1) 674 #define PIPE_SHADER_SUBGROUP_FEATURE_ARITHMETIC (1 << 2) 675 #define PIPE_SHADER_SUBGROUP_FEATURE_BALLOT (1 << 3) 676 #define PIPE_SHADER_SUBGROUP_FEATURE_SHUFFLE (1 << 4) 677 #define PIPE_SHADER_SUBGROUP_FEATURE_SHUFFLE_RELATIVE (1 << 5) 678 #define PIPE_SHADER_SUBGROUP_FEATURE_CLUSTERED (1 << 6) 679 #define PIPE_SHADER_SUBGROUP_FEATURE_QUAD (1 << 7) 680 #define PIPE_SHADER_SUBGROUP_NUM_FEATURES 8 681 682 /** 683 * Implementation capabilities/limits which are queried through 684 * pipe_screen::get_param() 685 */ 686 enum pipe_cap 687 { 688 PIPE_CAP_GRAPHICS, 689 PIPE_CAP_NPOT_TEXTURES, 690 PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS, 691 PIPE_CAP_ANISOTROPIC_FILTER, 692 PIPE_CAP_MAX_RENDER_TARGETS, 693 PIPE_CAP_OCCLUSION_QUERY, 694 PIPE_CAP_QUERY_TIME_ELAPSED, 695 PIPE_CAP_TEXTURE_SHADOW_MAP, 696 PIPE_CAP_TEXTURE_SWIZZLE, 697 PIPE_CAP_MAX_TEXTURE_2D_SIZE, 698 PIPE_CAP_MAX_TEXTURE_3D_LEVELS, 699 PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS, 700 PIPE_CAP_TEXTURE_MIRROR_CLAMP, 701 PIPE_CAP_BLEND_EQUATION_SEPARATE, 702 PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS, 703 PIPE_CAP_PRIMITIVE_RESTART, 704 /** subset of PRIMITIVE_RESTART where the restart index is always the fixed 705 * maximum value for the index type 706 */ 707 PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX, 708 /** blend enables and write masks per rendertarget */ 709 PIPE_CAP_INDEP_BLEND_ENABLE, 710 /** different blend funcs per rendertarget */ 711 PIPE_CAP_INDEP_BLEND_FUNC, 712 PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS, 713 PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT, 714 PIPE_CAP_FS_COORD_ORIGIN_LOWER_LEFT, 715 PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER, 716 PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER, 717 PIPE_CAP_DEPTH_CLIP_DISABLE, 718 PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE, 719 PIPE_CAP_DEPTH_CLAMP_ENABLE, 720 PIPE_CAP_SHADER_STENCIL_EXPORT, 721 PIPE_CAP_VS_INSTANCEID, 722 PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR, 723 PIPE_CAP_FRAGMENT_COLOR_CLAMPED, 724 PIPE_CAP_MIXED_COLORBUFFER_FORMATS, 725 PIPE_CAP_SEAMLESS_CUBE_MAP, 726 PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE, 727 PIPE_CAP_MIN_TEXEL_OFFSET, 728 PIPE_CAP_MAX_TEXEL_OFFSET, 729 PIPE_CAP_CONDITIONAL_RENDER, 730 PIPE_CAP_TEXTURE_BARRIER, 731 PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS, 732 PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS, 733 PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME, 734 PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS, 735 PIPE_CAP_VERTEX_COLOR_UNCLAMPED, 736 PIPE_CAP_VERTEX_COLOR_CLAMPED, 737 PIPE_CAP_GLSL_FEATURE_LEVEL, 738 PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY, 739 PIPE_CAP_ESSL_FEATURE_LEVEL, 740 PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION, 741 PIPE_CAP_USER_VERTEX_BUFFERS, 742 PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY, 743 PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY, 744 PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY, 745 PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY, 746 PIPE_CAP_COMPUTE, 747 PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT, 748 PIPE_CAP_START_INSTANCE, 749 PIPE_CAP_QUERY_TIMESTAMP, 750 PIPE_CAP_TIMER_RESOLUTION, 751 PIPE_CAP_TEXTURE_MULTISAMPLE, 752 PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, 753 PIPE_CAP_CUBE_MAP_ARRAY, 754 PIPE_CAP_TEXTURE_BUFFER_OBJECTS, 755 PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT, 756 PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY, 757 PIPE_CAP_TGSI_TEXCOORD, 758 PIPE_CAP_LINEAR_IMAGE_PITCH_ALIGNMENT, 759 PIPE_CAP_LINEAR_IMAGE_BASE_ADDRESS_ALIGNMENT, 760 PIPE_CAP_TEXTURE_TRANSFER_MODES, 761 PIPE_CAP_QUERY_PIPELINE_STATISTICS, 762 PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK, 763 PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT, 764 PIPE_CAP_MAX_VIEWPORTS, 765 PIPE_CAP_ENDIANNESS, 766 PIPE_CAP_MIXED_FRAMEBUFFER_SIZES, 767 PIPE_CAP_VS_LAYER_VIEWPORT, 768 PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES, 769 PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS, 770 PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS, 771 PIPE_CAP_TEXTURE_GATHER_SM5, 772 PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT, 773 PIPE_CAP_FAKE_SW_MSAA, 774 PIPE_CAP_TEXTURE_QUERY_LOD, 775 PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET, 776 PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET, 777 PIPE_CAP_SAMPLE_SHADING, 778 PIPE_CAP_TEXTURE_GATHER_OFFSETS, 779 PIPE_CAP_VS_WINDOW_SPACE_POSITION, 780 PIPE_CAP_MAX_VERTEX_STREAMS, 781 PIPE_CAP_DRAW_INDIRECT, 782 PIPE_CAP_FS_FINE_DERIVATIVE, 783 PIPE_CAP_VENDOR_ID, 784 PIPE_CAP_DEVICE_ID, 785 PIPE_CAP_ACCELERATED, 786 PIPE_CAP_VIDEO_MEMORY, 787 PIPE_CAP_UMA, 788 PIPE_CAP_CONDITIONAL_RENDER_INVERTED, 789 PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE, 790 PIPE_CAP_SAMPLER_VIEW_TARGET, 791 PIPE_CAP_CLIP_HALFZ, 792 PIPE_CAP_POLYGON_OFFSET_CLAMP, 793 PIPE_CAP_MULTISAMPLE_Z_RESOLVE, 794 PIPE_CAP_RESOURCE_FROM_USER_MEMORY, 795 PIPE_CAP_RESOURCE_FROM_USER_MEMORY_COMPUTE_ONLY, 796 PIPE_CAP_DEVICE_RESET_STATUS_QUERY, 797 PIPE_CAP_MAX_SHADER_PATCH_VARYINGS, 798 PIPE_CAP_TEXTURE_FLOAT_LINEAR, 799 PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR, 800 PIPE_CAP_DEPTH_BOUNDS_TEST, 801 PIPE_CAP_TEXTURE_QUERY_SAMPLES, 802 PIPE_CAP_FORCE_PERSAMPLE_INTERP, 803 PIPE_CAP_SHAREABLE_SHADERS, 804 PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS, 805 PIPE_CAP_CLEAR_SCISSORED, 806 PIPE_CAP_DRAW_PARAMETERS, 807 PIPE_CAP_SHADER_PACK_HALF_FLOAT, 808 PIPE_CAP_MULTI_DRAW_INDIRECT, 809 PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS, 810 PIPE_CAP_MULTI_DRAW_INDIRECT_PARTIAL_STRIDE, 811 PIPE_CAP_FS_POSITION_IS_SYSVAL, 812 PIPE_CAP_FS_POINT_IS_SYSVAL, 813 PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL, 814 PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT, 815 PIPE_CAP_INVALIDATE_BUFFER, 816 PIPE_CAP_GENERATE_MIPMAP, 817 PIPE_CAP_STRING_MARKER, 818 PIPE_CAP_SURFACE_REINTERPRET_BLOCKS, 819 PIPE_CAP_QUERY_BUFFER_OBJECT, 820 PIPE_CAP_QUERY_MEMORY_INFO, 821 PIPE_CAP_PCI_GROUP, 822 PIPE_CAP_PCI_BUS, 823 PIPE_CAP_PCI_DEVICE, 824 PIPE_CAP_PCI_FUNCTION, 825 PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT, 826 PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR, 827 PIPE_CAP_CULL_DISTANCE, 828 PIPE_CAP_CULL_DISTANCE_NOCOMBINE, 829 PIPE_CAP_SHADER_GROUP_VOTE, 830 PIPE_CAP_MAX_WINDOW_RECTANGLES, 831 PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED, 832 PIPE_CAP_VIEWPORT_SUBPIXEL_BITS, 833 PIPE_CAP_RASTERIZER_SUBPIXEL_BITS, 834 PIPE_CAP_MIXED_COLOR_DEPTH_BITS, 835 PIPE_CAP_SHADER_ARRAY_COMPONENTS, 836 PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS, 837 PIPE_CAP_NATIVE_FENCE_FD, 838 PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS, 839 PIPE_CAP_FBFETCH, 840 PIPE_CAP_LEGACY_MATH_RULES, 841 PIPE_CAP_FP16, 842 PIPE_CAP_DOUBLES, 843 PIPE_CAP_INT64, 844 PIPE_CAP_TGSI_TEX_TXF_LZ, 845 PIPE_CAP_SHADER_CLOCK, 846 PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE, 847 PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE, 848 PIPE_CAP_SHADER_BALLOT, 849 PIPE_CAP_TES_LAYER_VIEWPORT, 850 PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX, 851 PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION, 852 PIPE_CAP_POST_DEPTH_COVERAGE, 853 PIPE_CAP_BINDLESS_TEXTURE, 854 PIPE_CAP_NIR_SAMPLERS_AS_DEREF, 855 PIPE_CAP_QUERY_SO_OVERFLOW, 856 PIPE_CAP_MEMOBJ, 857 PIPE_CAP_LOAD_CONSTBUF, 858 PIPE_CAP_TILE_RASTER_ORDER, 859 PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES, 860 PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS, 861 PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET, 862 PIPE_CAP_CONTEXT_PRIORITY_MASK, 863 PIPE_CAP_FENCE_SIGNAL, 864 PIPE_CAP_CONSTBUF0_FLAGS, 865 PIPE_CAP_PACKED_UNIFORMS, 866 PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES, 867 PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES, 868 PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES, 869 PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES, 870 PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS, 871 PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE, 872 PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE, 873 PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS, 874 PIPE_CAP_MAX_GS_INVOCATIONS, 875 PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT, 876 PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE, 877 PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS, 878 PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS, 879 PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS, 880 PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET, 881 PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET, 882 PIPE_CAP_SURFACE_SAMPLE_COUNT, 883 PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD, 884 PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE, 885 PIPE_CAP_DEST_SURFACE_SRGB_CONTROL, 886 PIPE_CAP_MAX_VARYINGS, 887 PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK, 888 PIPE_CAP_COMPUTE_SHADER_DERIVATIVES, 889 PIPE_CAP_IMAGE_LOAD_FORMATTED, 890 PIPE_CAP_IMAGE_STORE_FORMATTED, 891 PIPE_CAP_THROTTLE, 892 PIPE_CAP_DMABUF, 893 PIPE_CAP_CL_GL_SHARING, 894 PIPE_CAP_PREFER_COMPUTE_FOR_MULTIMEDIA, 895 PIPE_CAP_FRAGMENT_SHADER_INTERLOCK, 896 PIPE_CAP_FBFETCH_COHERENT, 897 PIPE_CAP_ATOMIC_FLOAT_MINMAX, 898 PIPE_CAP_TGSI_DIV, 899 PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD, 900 PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES, 901 PIPE_CAP_TEXTURE_SHADOW_LOD, 902 PIPE_CAP_SHADER_SAMPLES_IDENTICAL, 903 PIPE_CAP_IMAGE_ATOMIC_INC_WRAP, 904 PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF, 905 PIPE_CAP_GL_SPIRV, 906 PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS, 907 PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION, 908 PIPE_CAP_TGSI_TG4_COMPONENT_IN_SWIZZLE, 909 PIPE_CAP_FLATSHADE, 910 PIPE_CAP_ALPHA_TEST, 911 PIPE_CAP_POINT_SIZE_FIXED, 912 PIPE_CAP_TWO_SIDED_COLOR, 913 PIPE_CAP_CLIP_PLANES, 914 PIPE_CAP_MAX_VERTEX_BUFFERS, 915 PIPE_CAP_OPENCL_INTEGER_FUNCTIONS, 916 PIPE_CAP_INTEGER_MULTIPLY_32X16, 917 /* Turn draw, dispatch, blit into NOOP */ 918 PIPE_CAP_FRONTEND_NOOP, 919 PIPE_CAP_NIR_IMAGES_AS_DEREF, 920 PIPE_CAP_PACKED_STREAM_OUTPUT, 921 PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED, 922 PIPE_CAP_PSIZ_CLAMPED, 923 PIPE_CAP_GL_BEGIN_END_BUFFER_SIZE, 924 PIPE_CAP_VIEWPORT_SWIZZLE, 925 PIPE_CAP_SYSTEM_SVM, 926 PIPE_CAP_VIEWPORT_MASK, 927 PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL, 928 PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE, 929 PIPE_CAP_GLSL_ZERO_INIT, 930 PIPE_CAP_BLEND_EQUATION_ADVANCED, 931 PIPE_CAP_NIR_ATOMICS_AS_DEREF, 932 PIPE_CAP_NO_CLIP_ON_COPY_TEX, 933 PIPE_CAP_MAX_TEXTURE_MB, 934 PIPE_CAP_SHADER_ATOMIC_INT64, 935 /** For EGL_EXT_protected_surface */ 936 PIPE_CAP_DEVICE_PROTECTED_SURFACE, 937 PIPE_CAP_PREFER_REAL_BUFFER_IN_CONSTBUF0, 938 PIPE_CAP_GL_CLAMP, 939 PIPE_CAP_TEXRECT, 940 PIPE_CAP_SAMPLER_REDUCTION_MINMAX, 941 PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB, 942 PIPE_CAP_ALLOW_DYNAMIC_VAO_FASTPATH, 943 PIPE_CAP_EMULATE_NONFIXED_PRIMITIVE_RESTART, 944 PIPE_CAP_SUPPORTED_PRIM_MODES, 945 PIPE_CAP_SUPPORTED_PRIM_MODES_WITH_RESTART, 946 PIPE_CAP_PREFER_BACK_BUFFER_REUSE, 947 PIPE_CAP_DRAW_VERTEX_STATE, 948 PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS, 949 PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE, 950 PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE, 951 PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS, 952 PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS, 953 PIPE_CAP_QUERY_SPARSE_TEXTURE_RESIDENCY, 954 PIPE_CAP_CLAMP_SPARSE_TEXTURE_LOD, 955 PIPE_CAP_ALLOW_DRAW_OUT_OF_ORDER, 956 PIPE_CAP_MAX_CONSTANT_BUFFER_SIZE_UINT, 957 PIPE_CAP_HARDWARE_GL_SELECT, 958 PIPE_CAP_DITHERING, 959 PIPE_CAP_FBFETCH_ZS, 960 PIPE_CAP_TIMELINE_SEMAPHORE_IMPORT, 961 PIPE_CAP_QUERY_TIMESTAMP_BITS, 962 /** For EGL_EXT_protected_content */ 963 PIPE_CAP_DEVICE_PROTECTED_CONTEXT, 964 PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT, 965 PIPE_CAP_NULL_TEXTURES, 966 PIPE_CAP_ASTC_VOID_EXTENTS_NEED_DENORM_FLUSH, 967 PIPE_CAP_VALIDATE_ALL_DIRTY_STATES, 968 PIPE_CAP_HAS_CONST_BW, 969 PIPE_CAP_PERFORMANCE_MONITOR, 970 PIPE_CAP_TEXTURE_SAMPLER_INDEPENDENT, 971 PIPE_CAP_ASTC_DECODE_MODE, 972 /** For GL_KHR_shader_subgroup */ 973 PIPE_CAP_SHADER_SUBGROUP_SIZE, 974 PIPE_CAP_SHADER_SUBGROUP_SUPPORTED_STAGES, 975 PIPE_CAP_SHADER_SUBGROUP_SUPPORTED_FEATURES, 976 PIPE_CAP_SHADER_SUBGROUP_QUAD_ALL_STAGES, 977 PIPE_CAP_MULTIVIEW, 978 PIPE_CAP_LAST, 979 /* XXX do not add caps after PIPE_CAP_LAST! */ 980 }; 981 982 enum pipe_point_size_lower_mode { 983 PIPE_POINT_SIZE_LOWER_ALWAYS, 984 PIPE_POINT_SIZE_LOWER_NEVER, 985 PIPE_POINT_SIZE_LOWER_USER_ONLY, 986 }; 987 988 enum pipe_texture_transfer_mode { 989 PIPE_TEXTURE_TRANSFER_DEFAULT = 0, 990 PIPE_TEXTURE_TRANSFER_BLIT = (1 << 0), 991 PIPE_TEXTURE_TRANSFER_COMPUTE = (1 << 1), 992 }; 993 994 /** 995 * Possible bits for PIPE_CAP_CONTEXT_PRIORITY_MASK param, which should 996 * return a bitmask of the supported priorities. If the driver does not 997 * support prioritized contexts, it can return 0. 998 * 999 * Note that these match __EGL_CONTEXT_PRIORITY_*_BIT. 1000 */ 1001 #define PIPE_CONTEXT_PRIORITY_LOW (1 << 0) 1002 #define PIPE_CONTEXT_PRIORITY_MEDIUM (1 << 1) 1003 #define PIPE_CONTEXT_PRIORITY_HIGH (1 << 2) 1004 1005 enum pipe_quirk_texture_border_color_swizzle { 1006 PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 = (1 << 0), 1007 PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 = (1 << 1), 1008 PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO = (1 << 2), 1009 PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_ALPHA_NOT_W = (1 << 3), 1010 }; 1011 1012 enum pipe_endian 1013 { 1014 PIPE_ENDIAN_LITTLE = 0, 1015 PIPE_ENDIAN_BIG = 1, 1016 #if UTIL_ARCH_LITTLE_ENDIAN 1017 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE 1018 #elif UTIL_ARCH_BIG_ENDIAN 1019 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG 1020 #endif 1021 }; 1022 1023 /** 1024 * Implementation limits which are queried through 1025 * pipe_screen::get_paramf() 1026 */ 1027 enum pipe_capf 1028 { 1029 PIPE_CAPF_MIN_LINE_WIDTH, 1030 PIPE_CAPF_MIN_LINE_WIDTH_AA, 1031 PIPE_CAPF_MAX_LINE_WIDTH, 1032 PIPE_CAPF_MAX_LINE_WIDTH_AA, 1033 PIPE_CAPF_LINE_WIDTH_GRANULARITY, 1034 PIPE_CAPF_MIN_POINT_SIZE, 1035 PIPE_CAPF_MIN_POINT_SIZE_AA, 1036 PIPE_CAPF_MAX_POINT_SIZE, 1037 PIPE_CAPF_MAX_POINT_SIZE_AA, 1038 PIPE_CAPF_POINT_SIZE_GRANULARITY, 1039 PIPE_CAPF_MAX_TEXTURE_ANISOTROPY, 1040 PIPE_CAPF_MAX_TEXTURE_LOD_BIAS, 1041 PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE, 1042 PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE, 1043 PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY, 1044 }; 1045 1046 /** Shader caps not specific to any single stage */ 1047 enum pipe_shader_cap 1048 { 1049 PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */ 1050 PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS, 1051 PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS, 1052 PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS, 1053 PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH, 1054 PIPE_SHADER_CAP_MAX_INPUTS, 1055 PIPE_SHADER_CAP_MAX_OUTPUTS, 1056 PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE, 1057 PIPE_SHADER_CAP_MAX_CONST_BUFFERS, 1058 PIPE_SHADER_CAP_MAX_TEMPS, 1059 /* boolean caps */ 1060 PIPE_SHADER_CAP_CONT_SUPPORTED, 1061 PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR, 1062 PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR, 1063 PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR, 1064 PIPE_SHADER_CAP_INDIRECT_CONST_ADDR, 1065 PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */ 1066 PIPE_SHADER_CAP_INTEGERS, 1067 PIPE_SHADER_CAP_INT64_ATOMICS, 1068 PIPE_SHADER_CAP_FP16, 1069 PIPE_SHADER_CAP_FP16_DERIVATIVES, 1070 PIPE_SHADER_CAP_FP16_CONST_BUFFERS, 1071 PIPE_SHADER_CAP_INT16, 1072 PIPE_SHADER_CAP_GLSL_16BIT_CONSTS, 1073 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS, 1074 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED, 1075 PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS, 1076 PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE, 1077 PIPE_SHADER_CAP_MAX_SHADER_BUFFERS, 1078 PIPE_SHADER_CAP_SUPPORTED_IRS, 1079 PIPE_SHADER_CAP_MAX_SHADER_IMAGES, 1080 PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS, 1081 PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS, 1082 }; 1083 1084 /** 1085 * Shader intermediate representation. 1086 * 1087 * Note that if the driver requests something other than TGSI, it must 1088 * always be prepared to receive TGSI in addition to its preferred IR. 1089 * If the driver requests TGSI as its preferred IR, it will *always* 1090 * get TGSI. 1091 * 1092 * Note that PIPE_SHADER_IR_TGSI should be zero for backwards compat with 1093 * gallium frontends that only understand TGSI. 1094 */ 1095 enum pipe_shader_ir 1096 { 1097 PIPE_SHADER_IR_TGSI = 0, 1098 PIPE_SHADER_IR_NATIVE, 1099 PIPE_SHADER_IR_NIR, 1100 PIPE_SHADER_IR_NIR_SERIALIZED, 1101 }; 1102 1103 /** 1104 * Compute-specific implementation capability. They can be queried 1105 * using pipe_screen::get_compute_param. 1106 */ 1107 enum pipe_compute_cap 1108 { 1109 PIPE_COMPUTE_CAP_ADDRESS_BITS, 1110 PIPE_COMPUTE_CAP_IR_TARGET, 1111 PIPE_COMPUTE_CAP_GRID_DIMENSION, 1112 PIPE_COMPUTE_CAP_MAX_GRID_SIZE, 1113 PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE, 1114 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, 1115 PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, 1116 PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE, 1117 PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE, 1118 PIPE_COMPUTE_CAP_MAX_INPUT_SIZE, 1119 PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, 1120 PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY, 1121 PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS, 1122 PIPE_COMPUTE_CAP_MAX_SUBGROUPS, 1123 PIPE_COMPUTE_CAP_IMAGES_SUPPORTED, 1124 PIPE_COMPUTE_CAP_SUBGROUP_SIZES, 1125 PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK, 1126 }; 1127 1128 /** 1129 * Resource parameters. They can be queried using 1130 * pipe_screen::get_resource_param. 1131 */ 1132 enum pipe_resource_param 1133 { 1134 PIPE_RESOURCE_PARAM_NPLANES, 1135 PIPE_RESOURCE_PARAM_STRIDE, 1136 PIPE_RESOURCE_PARAM_OFFSET, 1137 PIPE_RESOURCE_PARAM_MODIFIER, 1138 PIPE_RESOURCE_PARAM_HANDLE_TYPE_SHARED, 1139 PIPE_RESOURCE_PARAM_HANDLE_TYPE_KMS, 1140 PIPE_RESOURCE_PARAM_HANDLE_TYPE_FD, 1141 PIPE_RESOURCE_PARAM_LAYER_STRIDE, 1142 }; 1143 1144 /** 1145 * Types of parameters for pipe_context::set_context_param. 1146 */ 1147 enum pipe_context_param 1148 { 1149 /* Call util_thread_sched_apply_policy() for each driver thread that 1150 * benefits from it. 1151 */ 1152 PIPE_CONTEXT_PARAM_UPDATE_THREAD_SCHEDULING, 1153 }; 1154 1155 /** 1156 * Composite query types 1157 */ 1158 1159 /** 1160 * Query result for PIPE_QUERY_SO_STATISTICS. 1161 */ 1162 struct pipe_query_data_so_statistics 1163 { 1164 uint64_t num_primitives_written; 1165 uint64_t primitives_storage_needed; 1166 }; 1167 1168 /** 1169 * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT. 1170 */ 1171 struct pipe_query_data_timestamp_disjoint 1172 { 1173 uint64_t frequency; 1174 bool disjoint; 1175 }; 1176 1177 /** 1178 * Query result for PIPE_QUERY_PIPELINE_STATISTICS. 1179 */ 1180 struct pipe_query_data_pipeline_statistics 1181 { 1182 union { 1183 struct { 1184 uint64_t ia_vertices; /**< Num vertices read by the vertex fetcher. */ 1185 uint64_t ia_primitives; /**< Num primitives read by the vertex fetcher. */ 1186 uint64_t vs_invocations; /**< Num vertex shader invocations. */ 1187 uint64_t gs_invocations; /**< Num geometry shader invocations. */ 1188 uint64_t gs_primitives; /**< Num primitives output by a geometry shader. */ 1189 uint64_t c_invocations; /**< Num primitives sent to the rasterizer. */ 1190 uint64_t c_primitives; /**< Num primitives that were rendered. */ 1191 uint64_t ps_invocations; /**< Num pixel shader invocations. */ 1192 uint64_t hs_invocations; /**< Num hull shader invocations. */ 1193 uint64_t ds_invocations; /**< Num domain shader invocations. */ 1194 uint64_t cs_invocations; /**< Num compute shader invocations. */ 1195 uint64_t ts_invocations; /**< Num task shader invocations. */ 1196 uint64_t ms_invocations; /**< Num mesh shader invocations. */ 1197 }; 1198 uint64_t counters[13]; 1199 }; 1200 }; 1201 1202 /** 1203 * For batch queries. 1204 */ 1205 union pipe_numeric_type_union 1206 { 1207 uint64_t u64; 1208 uint32_t u32; 1209 float f; 1210 }; 1211 1212 /** 1213 * Query result (returned by pipe_context::get_query_result). 1214 */ 1215 union pipe_query_result 1216 { 1217 /* PIPE_QUERY_OCCLUSION_PREDICATE */ 1218 /* PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE */ 1219 /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */ 1220 /* PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE */ 1221 /* PIPE_QUERY_GPU_FINISHED */ 1222 bool b; 1223 1224 /* PIPE_QUERY_OCCLUSION_COUNTER */ 1225 /* PIPE_QUERY_TIMESTAMP */ 1226 /* PIPE_QUERY_TIME_ELAPSED */ 1227 /* PIPE_QUERY_PRIMITIVES_GENERATED */ 1228 /* PIPE_QUERY_PRIMITIVES_EMITTED */ 1229 /* PIPE_DRIVER_QUERY_TYPE_UINT64 */ 1230 /* PIPE_DRIVER_QUERY_TYPE_BYTES */ 1231 /* PIPE_DRIVER_QUERY_TYPE_MICROSECONDS */ 1232 /* PIPE_DRIVER_QUERY_TYPE_HZ */ 1233 uint64_t u64; 1234 1235 /* PIPE_DRIVER_QUERY_TYPE_UINT */ 1236 uint32_t u32; 1237 1238 /* PIPE_DRIVER_QUERY_TYPE_FLOAT */ 1239 /* PIPE_DRIVER_QUERY_TYPE_PERCENTAGE */ 1240 float f; 1241 1242 /* PIPE_QUERY_SO_STATISTICS */ 1243 struct pipe_query_data_so_statistics so_statistics; 1244 1245 /* PIPE_QUERY_TIMESTAMP_DISJOINT */ 1246 struct pipe_query_data_timestamp_disjoint timestamp_disjoint; 1247 1248 /* PIPE_QUERY_PIPELINE_STATISTICS */ 1249 struct pipe_query_data_pipeline_statistics pipeline_statistics; 1250 1251 /* batch queries (variable length) */ 1252 union pipe_numeric_type_union batch[1]; 1253 }; 1254 1255 enum pipe_query_value_type 1256 { 1257 PIPE_QUERY_TYPE_I32, 1258 PIPE_QUERY_TYPE_U32, 1259 PIPE_QUERY_TYPE_I64, 1260 PIPE_QUERY_TYPE_U64, 1261 }; 1262 1263 enum pipe_query_flags 1264 { 1265 PIPE_QUERY_WAIT = (1 << 0), 1266 PIPE_QUERY_PARTIAL = (1 << 1), 1267 }; 1268 1269 enum pipe_driver_query_type 1270 { 1271 PIPE_DRIVER_QUERY_TYPE_UINT64, 1272 PIPE_DRIVER_QUERY_TYPE_UINT, 1273 PIPE_DRIVER_QUERY_TYPE_FLOAT, 1274 PIPE_DRIVER_QUERY_TYPE_PERCENTAGE, 1275 PIPE_DRIVER_QUERY_TYPE_BYTES, 1276 PIPE_DRIVER_QUERY_TYPE_MICROSECONDS, 1277 PIPE_DRIVER_QUERY_TYPE_HZ, 1278 PIPE_DRIVER_QUERY_TYPE_DBM, 1279 PIPE_DRIVER_QUERY_TYPE_TEMPERATURE, 1280 PIPE_DRIVER_QUERY_TYPE_VOLTS, 1281 PIPE_DRIVER_QUERY_TYPE_AMPS, 1282 PIPE_DRIVER_QUERY_TYPE_WATTS, 1283 }; 1284 1285 /* Whether an average value per frame or a cumulative value should be 1286 * displayed. 1287 */ 1288 enum pipe_driver_query_result_type 1289 { 1290 PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE, 1291 PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE, 1292 }; 1293 1294 /** 1295 * Some hardware requires some hardware-specific queries to be submitted 1296 * as batched queries. The corresponding query objects are created using 1297 * create_batch_query, and at most one such query may be active at 1298 * any time. 1299 */ 1300 #define PIPE_DRIVER_QUERY_FLAG_BATCH (1 << 0) 1301 1302 /* Do not list this query in the HUD. */ 1303 #define PIPE_DRIVER_QUERY_FLAG_DONT_LIST (1 << 1) 1304 1305 struct pipe_driver_query_info 1306 { 1307 const char *name; 1308 unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */ 1309 union pipe_numeric_type_union max_value; /* max value that can be returned */ 1310 enum pipe_driver_query_type type; 1311 enum pipe_driver_query_result_type result_type; 1312 unsigned group_id; 1313 unsigned flags; 1314 }; 1315 1316 struct pipe_driver_query_group_info 1317 { 1318 const char *name; 1319 unsigned max_active_queries; 1320 unsigned num_queries; 1321 }; 1322 1323 enum pipe_fd_type 1324 { 1325 PIPE_FD_TYPE_NATIVE_SYNC, 1326 PIPE_FD_TYPE_SYNCOBJ, 1327 PIPE_FD_TYPE_TIMELINE_SEMAPHORE, 1328 }; 1329 1330 /** 1331 * counter type and counter data type enums used by INTEL_performance_query 1332 * APIs in gallium drivers. 1333 */ 1334 enum pipe_perf_counter_type 1335 { 1336 PIPE_PERF_COUNTER_TYPE_EVENT, 1337 PIPE_PERF_COUNTER_TYPE_DURATION_NORM, 1338 PIPE_PERF_COUNTER_TYPE_DURATION_RAW, 1339 PIPE_PERF_COUNTER_TYPE_THROUGHPUT, 1340 PIPE_PERF_COUNTER_TYPE_RAW, 1341 PIPE_PERF_COUNTER_TYPE_TIMESTAMP, 1342 }; 1343 1344 enum pipe_perf_counter_data_type 1345 { 1346 PIPE_PERF_COUNTER_DATA_TYPE_BOOL32, 1347 PIPE_PERF_COUNTER_DATA_TYPE_UINT32, 1348 PIPE_PERF_COUNTER_DATA_TYPE_UINT64, 1349 PIPE_PERF_COUNTER_DATA_TYPE_FLOAT, 1350 PIPE_PERF_COUNTER_DATA_TYPE_DOUBLE, 1351 }; 1352 1353 #define PIPE_ASTC_DECODE_FORMAT_FLOAT16 0 1354 #define PIPE_ASTC_DECODE_FORMAT_UNORM8 1 1355 #define PIPE_ASTC_DECODE_FORMAT_RGB9E5 2 1356 1357 #define PIPE_UUID_SIZE 16 1358 #define PIPE_LUID_SIZE 8 1359 1360 #if DETECT_OS_POSIX 1361 #define PIPE_MEMORY_FD 1362 #endif 1363 1364 #ifdef __cplusplus 1365 } 1366 #endif 1367 1368 #endif 1369