xref: /aosp_15_r20/external/mesa3d/src/intel/compiler/elk/tests/gen8/cr0.asm (revision 6104692788411f58d303aa86923a9ff6ecaded22) 
1and(1)          cr0<1>UD        cr0<0,1,0>UD    0xfffffb3fUD    { align1 1N switch };
2and(1)          cr0<1>UD        cr0<0,1,0>UD    0xffffff3fUD    { align1 1N switch };
3and(1)          cr0<1>UD        cr0<0,1,0>UD    0xfffffb7fUD    { align1 1N switch };
4and(1)          cr0<1>UD        cr0<0,1,0>UD    0xffffff7fUD    { align1 1N switch };
5and(1)          cr0<1>UD        cr0<0,1,0>UD    0xfffffbbfUD    { align1 1N switch };
6and(1)          cr0<1>UD        cr0<0,1,0>UD    0xffffffbfUD    { align1 1N switch };
7and(1)          cr0<1>UD        cr0<0,1,0>UD    0xffffffcfUD    { align1 1N switch };
8and(1)          cr0<1>UD        cr0<0,1,0>UD    0xfffffbffUD    { align1 1N switch };
9or(1)           cr0<1>UD        cr0<0,1,0>UD    0x00000400UD    { align1 1N switch };
10or(1)           cr0<1>UD        cr0<0,1,0>UD    0x00000030UD    { align1 1N switch };
11or(1)           cr0<1>UD        cr0<0,1,0>UD    0x00000040UD    { align1 1N switch };
12or(1)           cr0<1>UD        cr0<0,1,0>UD    0x00000440UD    { align1 1N switch };
13or(1)           cr0<1>UD        cr0<0,1,0>UD    0x00000080UD    { align1 1N switch };
14or(1)           cr0<1>UD        cr0<0,1,0>UD    0x00000480UD    { align1 1N switch };
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