1 /*
2 * Copyright © 2021 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26
27 #include "intel_device_info.h"
28 #include "intel_hwconfig.h"
29 #include "intel_hwconfig_types.h"
30 #include "intel/common/intel_gem.h"
31 #include "i915/intel_device_info.h"
32 #include "xe/intel_device_info.h"
33
34 #include "util/log.h"
35
36 #ifdef NDEBUG
37 #define DEBUG_BUILD false
38 #else
39 #define DEBUG_BUILD true
40 #endif
41
42 struct hwconfig {
43 uint32_t key;
44 uint32_t len;
45 uint32_t val[];
46 };
47
48 static char *
key_to_name(uint32_t key)49 key_to_name(uint32_t key)
50 {
51 #define HANDLE(key_name) case key_name: return #key_name
52 switch (key) {
53 HANDLE(INTEL_HWCONFIG_MAX_SLICES_SUPPORTED);
54 HANDLE(INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED);
55 HANDLE(INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS);
56 HANDLE(INTEL_HWCONFIG_NUM_PIXEL_PIPES);
57 HANDLE(INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES);
58 HANDLE(INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB);
59 HANDLE(INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT);
60 HANDLE(INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES);
61 HANDLE(INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR);
62 HANDLE(INTEL_HWCONFIG_MAX_MEMORY_CHANNELS);
63 HANDLE(INTEL_HWCONFIG_MEMORY_TYPE);
64 HANDLE(INTEL_HWCONFIG_CACHE_TYPES);
65 HANDLE(INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED);
66 HANDLE(INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB);
67 HANDLE(INTEL_HWCONFIG_NUM_THREADS_PER_EU);
68 HANDLE(INTEL_HWCONFIG_TOTAL_VS_THREADS);
69 HANDLE(INTEL_HWCONFIG_TOTAL_GS_THREADS);
70 HANDLE(INTEL_HWCONFIG_TOTAL_HS_THREADS);
71 HANDLE(INTEL_HWCONFIG_TOTAL_DS_THREADS);
72 HANDLE(INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS);
73 HANDLE(INTEL_HWCONFIG_TOTAL_PS_THREADS);
74 HANDLE(INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE);
75 HANDLE(INTEL_HWCONFIG_MAX_RCS);
76 HANDLE(INTEL_HWCONFIG_MAX_CCS);
77 HANDLE(INTEL_HWCONFIG_MAX_VCS);
78 HANDLE(INTEL_HWCONFIG_MAX_VECS);
79 HANDLE(INTEL_HWCONFIG_MAX_COPY_CS);
80 HANDLE(INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB);
81 HANDLE(INTEL_HWCONFIG_MIN_VS_URB_ENTRIES);
82 HANDLE(INTEL_HWCONFIG_MAX_VS_URB_ENTRIES);
83 HANDLE(INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES);
84 HANDLE(INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES);
85 HANDLE(INTEL_HWCONFIG_MIN_HS_URB_ENTRIES);
86 HANDLE(INTEL_HWCONFIG_MAX_HS_URB_ENTRIES);
87 HANDLE(INTEL_HWCONFIG_MIN_GS_URB_ENTRIES);
88 HANDLE(INTEL_HWCONFIG_MAX_GS_URB_ENTRIES);
89 HANDLE(INTEL_HWCONFIG_MIN_DS_URB_ENTRIES);
90 HANDLE(INTEL_HWCONFIG_MAX_DS_URB_ENTRIES);
91 HANDLE(INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE);
92 HANDLE(INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE);
93 HANDLE(INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES);
94 HANDLE(INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES);
95 HANDLE(INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES);
96 HANDLE(INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT);
97 HANDLE(INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT);
98 HANDLE(INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS);
99 HANDLE(INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS);
100 HANDLE(INTEL_HWCONFIG_MIN_CS_URB_ENTRIES);
101 HANDLE(INTEL_HWCONFIG_MAX_CS_URB_ENTRIES);
102 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB);
103 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST);
104 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC);
105 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO);
106 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z);
107 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR);
108 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE);
109 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER);
110 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW);
111 HANDLE(INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS);
112 HANDLE(INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT);
113 HANDLE(INTEL_HWCONFIG_RESERVED_CCS_WAYS);
114 HANDLE(INTEL_HWCONFIG_CSR_SIZE_IN_MB);
115 HANDLE(INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE);
116 HANDLE(INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB);
117 HANDLE(INTEL_HWCONFIG_SLM_SIZE_PER_DSS);
118 HANDLE(INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE);
119 HANDLE(INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS);
120 HANDLE(INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB);
121 HANDLE(INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB);
122 HANDLE(INTEL_HWCONFIG_MAX_SUBSLICE);
123 HANDLE(INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE);
124 HANDLE(INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB);
125 HANDLE(INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB);
126 #undef HANDLE
127 }
128 return "UNKNOWN_INTEL_HWCONFIG";
129 }
130
131 typedef void (*hwconfig_item_cb)(struct intel_device_info *devinfo,
132 const struct hwconfig *item);
133
134 static void
process_hwconfig_table(struct intel_device_info * devinfo,const struct hwconfig * hwconfig,int32_t hwconfig_len,hwconfig_item_cb item_callback_func)135 process_hwconfig_table(struct intel_device_info *devinfo,
136 const struct hwconfig *hwconfig,
137 int32_t hwconfig_len,
138 hwconfig_item_cb item_callback_func)
139 {
140 assert(hwconfig);
141 assert(hwconfig_len % 4 == 0);
142 const struct hwconfig *current = hwconfig;
143 const struct hwconfig *end =
144 (struct hwconfig*)(((uint32_t*)hwconfig) + (hwconfig_len / 4));
145 while (current < end) {
146 assert(current + 1 < end);
147 struct hwconfig *next =
148 (struct hwconfig*)((uint32_t*)current + 2 + current->len);
149 assert(next <= end);
150 item_callback_func(devinfo, current);
151 current = next;
152 }
153 assert(current == end);
154 }
155
156 static inline bool
apply_hwconfig(const struct intel_device_info * devinfo)157 apply_hwconfig(const struct intel_device_info *devinfo)
158 {
159 /* returns is true when the platform should apply hwconfig values */
160 return devinfo->verx10 >= 125;
161 }
162
163 /* If apply_hwconfig(devinfo) is true, then we apply the
164 * hwconfig value.
165 *
166 * For debug builds, if apply_hwconfig() is false, we will compare the
167 * hwconfig value with the current value in the devinfo and log a warning
168 * message if they differ. This should help to make sure the values in our
169 * devinfo structures match what hwconfig is specified.
170 */
171 #define DEVINFO_HWCONFIG(F, V) \
172 do { \
173 if (apply_hwconfig(devinfo)) \
174 devinfo->F = V; \
175 else if (DEBUG_BUILD && devinfo->F != (V)) \
176 mesa_logw("%s (%u) != devinfo->%s (%u)", \
177 key_to_name(item->key), (V), #F, \
178 devinfo->F); \
179 } while (0)
180
181 static void
apply_hwconfig_item(struct intel_device_info * devinfo,const struct hwconfig * item)182 apply_hwconfig_item(struct intel_device_info *devinfo,
183 const struct hwconfig *item)
184 {
185 switch (item->key) {
186 case INTEL_HWCONFIG_MAX_SLICES_SUPPORTED:
187 case INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED:
188 case INTEL_HWCONFIG_NUM_PIXEL_PIPES:
189 case INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES:
190 case INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB:
191 case INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT:
192 case INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES:
193 case INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR:
194 case INTEL_HWCONFIG_MAX_MEMORY_CHANNELS:
195 case INTEL_HWCONFIG_MEMORY_TYPE:
196 case INTEL_HWCONFIG_CACHE_TYPES:
197 case INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED:
198 case INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB:
199 break; /* ignore */
200 case INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS:
201 DEVINFO_HWCONFIG(max_eus_per_subslice, item->val[0]);
202 break;
203 case INTEL_HWCONFIG_NUM_THREADS_PER_EU:
204 DEVINFO_HWCONFIG(num_thread_per_eu, item->val[0]);
205 break;
206 case INTEL_HWCONFIG_TOTAL_VS_THREADS:
207 DEVINFO_HWCONFIG(max_vs_threads, item->val[0]);
208 break;
209 case INTEL_HWCONFIG_TOTAL_GS_THREADS:
210 DEVINFO_HWCONFIG(max_gs_threads, item->val[0]);
211 break;
212 case INTEL_HWCONFIG_TOTAL_HS_THREADS:
213 DEVINFO_HWCONFIG(max_tcs_threads, item->val[0]);
214 break;
215 case INTEL_HWCONFIG_TOTAL_DS_THREADS:
216 DEVINFO_HWCONFIG(max_tes_threads, item->val[0]);
217 break;
218 case INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS:
219 break; /* ignore */
220 case INTEL_HWCONFIG_TOTAL_PS_THREADS: {
221 unsigned threads = item->val[0];
222 if (devinfo->ver == 12)
223 threads /= 2;
224 DEVINFO_HWCONFIG(max_threads_per_psd, threads);
225 break;
226 }
227 case INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB:
228 DEVINFO_HWCONFIG(urb.size, item->val[0]);
229 break;
230 case INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE:
231 case INTEL_HWCONFIG_MAX_RCS:
232 case INTEL_HWCONFIG_MAX_CCS:
233 case INTEL_HWCONFIG_MAX_VCS:
234 case INTEL_HWCONFIG_MAX_VECS:
235 case INTEL_HWCONFIG_MAX_COPY_CS:
236 case INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB:
237 case INTEL_HWCONFIG_MIN_VS_URB_ENTRIES:
238 case INTEL_HWCONFIG_MAX_VS_URB_ENTRIES:
239 case INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES:
240 case INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES:
241 case INTEL_HWCONFIG_MIN_HS_URB_ENTRIES:
242 case INTEL_HWCONFIG_MAX_HS_URB_ENTRIES:
243 case INTEL_HWCONFIG_MIN_GS_URB_ENTRIES:
244 case INTEL_HWCONFIG_MAX_GS_URB_ENTRIES:
245 case INTEL_HWCONFIG_MIN_DS_URB_ENTRIES:
246 case INTEL_HWCONFIG_MAX_DS_URB_ENTRIES:
247 case INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE:
248 case INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE:
249 case INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES:
250 case INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES:
251 case INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES:
252 case INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
253 case INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
254 case INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS:
255 case INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS:
256 case INTEL_HWCONFIG_MIN_CS_URB_ENTRIES:
257 case INTEL_HWCONFIG_MAX_CS_URB_ENTRIES:
258 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB:
259 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST:
260 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC:
261 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO:
262 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z:
263 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR:
264 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE:
265 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER:
266 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW:
267 case INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS:
268 case INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT:
269 case INTEL_HWCONFIG_RESERVED_CCS_WAYS:
270 case INTEL_HWCONFIG_CSR_SIZE_IN_MB:
271 case INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE:
272 case INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB:
273 case INTEL_HWCONFIG_SLM_SIZE_PER_DSS:
274 case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE:
275 case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS:
276 case INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB:
277 case INTEL_HWCONFIG_MAX_SUBSLICE:
278 case INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE:
279 case INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB:
280 case INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB:
281 default:
282 break; /* ignore */
283 }
284 }
285
286 bool
intel_hwconfig_process_table(struct intel_device_info * devinfo,void * data,int32_t len)287 intel_hwconfig_process_table(struct intel_device_info *devinfo,
288 void *data, int32_t len)
289 {
290 process_hwconfig_table(devinfo, data, len, apply_hwconfig_item);
291
292 return apply_hwconfig(devinfo);
293 }
294
295 static void
print_hwconfig_item(struct intel_device_info * devinfo,const struct hwconfig * item)296 print_hwconfig_item(struct intel_device_info *devinfo,
297 const struct hwconfig *item)
298 {
299 printf("%s: ", key_to_name(item->key));
300 for (int i = 0; i < item->len; i++)
301 printf(i ? ", 0x%x (%d)" : "0x%x (%d)", item->val[i],
302 item->val[i]);
303 printf("\n");
304 }
305
306 static void
intel_print_hwconfig_table(const struct hwconfig * hwconfig,int32_t hwconfig_len)307 intel_print_hwconfig_table(const struct hwconfig *hwconfig,
308 int32_t hwconfig_len)
309 {
310 process_hwconfig_table(NULL, hwconfig, hwconfig_len, print_hwconfig_item);
311 }
312
313 void
intel_get_and_print_hwconfig_table(int fd,struct intel_device_info * devinfo)314 intel_get_and_print_hwconfig_table(int fd, struct intel_device_info *devinfo)
315 {
316 struct hwconfig *hwconfig;
317 int32_t hwconfig_len = 0;
318
319 switch (devinfo->kmd_type) {
320 case INTEL_KMD_TYPE_I915:
321 hwconfig = intel_device_info_i915_query_hwconfig(fd, &hwconfig_len);
322 break;
323 case INTEL_KMD_TYPE_XE:
324 hwconfig = intel_device_info_xe_query_hwconfig(fd, &hwconfig_len);
325 break;
326 default:
327 unreachable("unknown kmd type");
328 break;
329 }
330
331 if (hwconfig) {
332 intel_print_hwconfig_table(hwconfig, hwconfig_len);
333 free(hwconfig);
334 }
335 }
336