1/* Copyright © 2023 Intel Corporation 2 * SPDX-License-Identifier: MIT 3 */ 4 5#include "libintel_shaders.h" 6 7static void end_generated_draws(global void *dst_ptr, 8 uint32_t item_idx, 9 uint32_t draw_id, uint32_t draw_count, 10 uint32_t ring_count, uint32_t max_draw_count, 11 uint32_t flags, 12 uint64_t gen_addr, uint64_t end_addr) 13{ 14 uint32_t _3dprim_size_B = ((flags >> 16) & 0xff) * 4; 15 bool indirect_count = (flags & ANV_GENERATED_FLAG_COUNT) != 0; 16 bool ring_mode = (flags & ANV_GENERATED_FLAG_RING_MODE) != 0; 17 /* We can have an indirect draw count = 0. */ 18 uint32_t last_draw_id = draw_count == 0 ? 0 : (min(draw_count, max_draw_count) - 1); 19 global void *jump_dst = draw_count == 0 ? dst_ptr : (dst_ptr + _3dprim_size_B); 20 21 if (ring_mode) { 22 if (draw_id == last_draw_id) { 23 /* Exit the ring buffer to the next user commands */ 24 genX(write_MI_BATCH_BUFFER_START)(jump_dst, end_addr); 25 } else if (item_idx == (ring_count - 1)) { 26 /* Jump back to the generation shader to generate mode draws */ 27 genX(write_MI_BATCH_BUFFER_START)(jump_dst, gen_addr); 28 } 29 } else { 30 if (draw_id == last_draw_id && draw_count < max_draw_count) { 31 /* Skip forward to the end of the generated draws */ 32 genX(write_MI_BATCH_BUFFER_START)(jump_dst, end_addr); 33 } 34 } 35} 36 37void 38genX(libanv_write_draw)(global void *dst_base, 39 global void *indirect_base, 40 global void *draw_id_base, 41 uint32_t indirect_stride, 42 global uint32_t *_draw_count, 43 uint32_t draw_base, 44 uint32_t instance_multiplier, 45 uint32_t max_draw_count, 46 uint32_t flags, 47 uint32_t ring_count, 48 uint64_t gen_addr, 49 uint64_t end_addr, 50 uint32_t item_idx) 51{ 52 uint32_t _3dprim_size_B = ((flags >> 16) & 0xff) * 4; 53 uint32_t draw_id = draw_base + item_idx; 54 uint32_t draw_count = *_draw_count; 55 global void *dst_ptr = dst_base + item_idx * _3dprim_size_B; 56 global void *indirect_ptr = indirect_base + draw_id * indirect_stride; 57 global void *draw_id_ptr = draw_id_base + item_idx * 4; 58 59 if (draw_id < min(draw_count, max_draw_count)) { 60 bool is_indexed = (flags & ANV_GENERATED_FLAG_INDEXED) != 0; 61 bool is_predicated = (flags & ANV_GENERATED_FLAG_PREDICATED) != 0; 62 bool uses_tbimr = (flags & ANV_GENERATED_FLAG_TBIMR) != 0; 63 bool uses_base = (flags & ANV_GENERATED_FLAG_BASE) != 0; 64 bool uses_drawid = (flags & ANV_GENERATED_FLAG_DRAWID) != 0; 65 uint32_t mocs = (flags >> 8) & 0xff; 66 67 genX(write_draw)(dst_ptr, indirect_ptr, draw_id_ptr, 68 draw_id, instance_multiplier, 69 is_indexed, is_predicated, 70 uses_tbimr, uses_base, uses_drawid, 71 mocs); 72 } 73 74 end_generated_draws(dst_ptr, item_idx, draw_id, draw_count, 75 ring_count, max_draw_count, flags, 76 gen_addr, end_addr); 77} 78