xref: /aosp_15_r20/external/mesa3d/src/nouveau/compiler/nak_private.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2022 Collabora, Ltd.
3  * SPDX-License-Identifier: MIT
4  */
5 
6 #ifndef NAK_PRIVATE_H
7 #define NAK_PRIVATE_H
8 
9 #include "nak.h"
10 #include "nir.h"
11 #include "nv_device_info.h"
12 
13 #ifdef __cplusplus
14 extern "C" {
15 #endif
16 
17 bool nak_should_print_nir(void);
18 
19 struct nak_compiler {
20    uint8_t sm;
21    uint8_t warps_per_sm;
22 
23    struct nir_shader_compiler_options nir_options;
24 };
25 
26 enum ENUM_PACKED nak_attr {
27    /* System values A */
28    NAK_ATTR_TESS_LOD_LEFT     = 0x000,
29    NAK_ATTR_TESS_LOD_RIGHT    = 0x004,
30    NAK_ATTR_TESS_LOD_BOTTOM   = 0x008,
31    NAK_ATTR_TESS_LOD_TOP      = 0x00c,
32    NAK_ATTR_TESS_LOD          = NAK_ATTR_TESS_LOD_LEFT,
33    NAK_ATTR_TESS_INTERRIOR_U  = 0x010,
34    NAK_ATTR_TESS_INTERRIOR_V  = 0x014,
35    NAK_ATTR_TESS_INTERRIOR    = NAK_ATTR_TESS_INTERRIOR_U,
36 
37    /* Patch attributes */
38    NAK_ATTR_PATCH_START       = 0x020,
39 
40    /* System values B */
41    NAK_ATTR_PRIMITIVE_ID      = 0x060,
42    NAK_ATTR_RT_ARRAY_INDEX    = 0x064,
43    NAK_ATTR_VIEWPORT_INDEX    = 0x068,
44    NAK_ATTR_POINT_SIZE        = 0x06c,
45    NAK_ATTR_POSITION_X        = 0x070,
46    NAK_ATTR_POSITION_Y        = 0x074,
47    NAK_ATTR_POSITION_Z        = 0x078,
48    NAK_ATTR_POSITION_W        = 0x07c,
49    NAK_ATTR_POSITION          = NAK_ATTR_POSITION_X,
50 
51    /* Generic attributes */
52    NAK_ATTR_GENERIC_START     = 0x080,
53 
54    /* System values C */
55    NAK_ATTR_CLIP_CULL_DIST_0  = 0x2c0,
56    NAK_ATTR_CLIP_CULL_DIST_1  = 0x2c4,
57    NAK_ATTR_CLIP_CULL_DIST_2  = 0x2c8,
58    NAK_ATTR_CLIP_CULL_DIST_3  = 0x2cc,
59    NAK_ATTR_CLIP_CULL_DIST_4  = 0x2d0,
60    NAK_ATTR_CLIP_CULL_DIST_5  = 0x2d4,
61    NAK_ATTR_CLIP_CULL_DIST_6  = 0x2d8,
62    NAK_ATTR_CLIP_CULL_DIST_7  = 0x2dc,
63    NAK_ATTR_CLIP_CULL_DIST    = NAK_ATTR_CLIP_CULL_DIST_0,
64    NAK_ATTR_POINT_SPRITE_S    = 0x2e0,
65    NAK_ATTR_POINT_SPRITE_T    = 0x2e4,
66    NAK_ATTR_POINT_SPRITE      = NAK_ATTR_POINT_SPRITE_S,
67    NAK_ATTR_FOG_COORD         = 0x2e8,
68    /* Reserved                  0x2ec */
69    NAK_ATTR_TESS_COORD_X      = 0x2f0,
70    NAK_ATTR_TESS_COORD_Y      = 0x2f4,
71    NAK_ATTR_TESS_COORD        = NAK_ATTR_TESS_COORD_X,
72    NAK_ATTR_INSTANCE_ID       = 0x2f8,
73    NAK_ATTR_VERTEX_ID         = 0x2fc,
74 
75    NAK_ATTR_BARY_COORD_NO_PERSP_X = 0x3a8,
76    NAK_ATTR_BARY_COORD_NO_PERSP_Y = 0x3ac,
77    NAK_ATTR_BARY_COORD_NO_PERSP_Z = 0x3b0,
78    NAK_ATTR_BARY_COORD_NO_PERSP = NAK_ATTR_BARY_COORD_NO_PERSP_X,
79 
80    NAK_ATTR_BARY_COORD_X = 0x3b4,
81    NAK_ATTR_BARY_COORD_Y = 0x3b8,
82    NAK_ATTR_BARY_COORD_Z = 0x3bc,
83    NAK_ATTR_BARY_COORD = NAK_ATTR_BARY_COORD_X,
84 
85    /* Not in SPH */
86    NAK_ATTR_FRONT_FACE        = 0x3fc,
87 };
88 
89 static inline uint16_t
nak_attribute_attr_addr(gl_vert_attrib attrib)90 nak_attribute_attr_addr(gl_vert_attrib attrib)
91 {
92    assert(attrib >= VERT_ATTRIB_GENERIC0);
93    return NAK_ATTR_GENERIC_START + (attrib - VERT_ATTRIB_GENERIC0) * 0x10;
94 }
95 
96 uint16_t nak_varying_attr_addr(gl_varying_slot slot);
97 uint16_t nak_sysval_attr_addr(gl_system_value sysval);
98 
99 enum ENUM_PACKED nak_sv {
100    NAK_SV_LANE_ID          = 0x00,
101    NAK_SV_VIRTCFG          = 0x02,
102    NAK_SV_VIRTID           = 0x03,
103    NAK_SV_VERTEX_COUNT     = 0x10,
104    NAK_SV_INVOCATION_ID    = 0x11,
105    NAK_SV_THREAD_KILL      = 0x13,
106    NAK_SV_INVOCATION_INFO  = 0x1d,
107    NAK_SV_COMBINED_TID     = 0x20,
108    NAK_SV_TID_X            = 0x21,
109    NAK_SV_TID_Y            = 0x22,
110    NAK_SV_TID_Z            = 0x23,
111    NAK_SV_TID              = NAK_SV_TID_X,
112    NAK_SV_CTAID_X          = 0x25,
113    NAK_SV_CTAID_Y          = 0x26,
114    NAK_SV_CTAID_Z          = 0x27,
115    NAK_SV_CTAID            = NAK_SV_CTAID_X,
116    NAK_SV_LANEMASK_EQ      = 0x38,
117    NAK_SV_LANEMASK_LT      = 0x39,
118    NAK_SV_LANEMASK_LE      = 0x3a,
119    NAK_SV_LANEMASK_GT      = 0x3b,
120    NAK_SV_LANEMASK_GE      = 0x3c,
121    NAK_SV_CLOCK_LO         = 0x50,
122    NAK_SV_CLOCK_HI         = 0x51,
123    NAK_SV_CLOCK            = NAK_SV_CLOCK_LO,
124 };
125 
126 bool nak_nir_workgroup_has_one_subgroup(const nir_shader *nir);
127 
128 struct nak_xfb_info
129 nak_xfb_from_nir(const struct nir_xfb_info *nir_xfb);
130 
131 struct nak_io_addr_offset {
132    nir_scalar base;
133    int32_t offset;
134 };
135 
136 struct nak_io_addr_offset
137 nak_get_io_addr_offset(nir_def *addr, uint8_t imm_bits);
138 
139 enum nak_nir_lod_mode {
140    NAK_NIR_LOD_MODE_AUTO = 0,
141    NAK_NIR_LOD_MODE_ZERO,
142    NAK_NIR_LOD_MODE_BIAS,
143    NAK_NIR_LOD_MODE_LOD,
144    NAK_NIR_LOD_MODE_CLAMP,
145    NAK_NIR_LOD_MODE_BIAS_CLAMP,
146 };
147 
148 enum nak_nir_offset_mode {
149    NAK_NIR_OFFSET_MODE_NONE = 0,
150    NAK_NIR_OFFSET_MODE_AOFFI,
151    NAK_NIR_OFFSET_MODE_PER_PX,
152 };
153 
154 struct nak_nir_tex_flags {
155    enum nak_nir_lod_mode lod_mode:3;
156    enum nak_nir_offset_mode offset_mode:2;
157    bool has_z_cmpr:1;
158    bool is_sparse:1;
159    uint32_t pad:25;
160 };
161 
162 bool nak_nir_lower_scan_reduce(nir_shader *shader);
163 bool nak_nir_lower_tex(nir_shader *nir, const struct nak_compiler *nak);
164 bool nak_nir_lower_gs_intrinsics(nir_shader *shader);
165 bool nak_nir_lower_algebraic_late(nir_shader *nir, const struct nak_compiler *nak);
166 
167 struct nak_nir_attr_io_flags {
168    bool output : 1;
169    bool patch : 1;
170    bool phys : 1;
171    uint32_t pad:29;
172 };
173 
174 bool nak_nir_lower_vtg_io(nir_shader *nir, const struct nak_compiler *nak);
175 
176 enum nak_interp_mode {
177    NAK_INTERP_MODE_PERSPECTIVE,
178    NAK_INTERP_MODE_SCREEN_LINEAR,
179    NAK_INTERP_MODE_CONSTANT,
180 };
181 
182 enum nak_interp_freq {
183     NAK_INTERP_FREQ_PASS,
184     NAK_INTERP_FREQ_PASS_MUL_W,
185     NAK_INTERP_FREQ_CONSTANT,
186     NAK_INTERP_FREQ_STATE,
187 };
188 
189 enum nak_interp_loc {
190    NAK_INTERP_LOC_DEFAULT,
191    NAK_INTERP_LOC_CENTROID,
192    NAK_INTERP_LOC_OFFSET,
193 };
194 
195 struct nak_nir_ipa_flags {
196    enum nak_interp_mode interp_mode:2;
197    enum nak_interp_freq interp_freq:2;
198    enum nak_interp_loc interp_loc:2;
199    uint32_t pad:26;
200 };
201 
202 bool nak_nir_lower_fs_inputs(nir_shader *nir,
203                              const struct nak_compiler *nak,
204                              const struct nak_fs_key *fs_key);
205 
206 enum nak_fs_out {
207    NAK_FS_OUT_COLOR0 = 0x00,
208    NAK_FS_OUT_COLOR1 = 0x10,
209    NAK_FS_OUT_COLOR2 = 0x20,
210    NAK_FS_OUT_COLOR3 = 0x30,
211    NAK_FS_OUT_COLOR4 = 0x40,
212    NAK_FS_OUT_COLOR5 = 0x50,
213    NAK_FS_OUT_COLOR6 = 0x60,
214    NAK_FS_OUT_COLOR7 = 0x70,
215    NAK_FS_OUT_SAMPLE_MASK = 0x80,
216    NAK_FS_OUT_DEPTH = 0x84,
217 };
218 
219 #define NAK_FS_OUT_COLOR(n) (NAK_FS_OUT_COLOR0 + (n) * 16)
220 
221 bool nak_nir_split_64bit_conversions(nir_shader *nir);
222 bool nak_nir_lower_non_uniform_ldcx(nir_shader *nir);
223 bool nak_nir_add_barriers(nir_shader *nir, const struct nak_compiler *nak);
224 bool nak_nir_lower_cf(nir_shader *nir);
225 
226 void nak_optimize_nir(nir_shader *nir, const struct nak_compiler *nak);
227 
228 struct nak_memstream {
229    FILE *stream;
230    char *buffer;
231    size_t written;
232 };
233 
234 void nak_open_memstream(struct nak_memstream *memstream);
235 void nak_close_memstream(struct nak_memstream *memstream);
236 void nak_flush_memstream(struct nak_memstream *memstream);
237 void nak_clear_memstream(struct nak_memstream *memstream);
238 void nak_nir_asprint_instr(struct nak_memstream *memstream, const nir_instr *instr);
239 
240 #ifdef __cplusplus
241 }
242 #endif
243 
244 #endif /* NAK_PRIVATE */
245