1 /******************************************************************************* 2 Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. 3 4 Permission is hereby granted, free of charge, to any person obtaining a 5 copy of this software and associated documentation files (the "Software"), 6 to deal in the Software without restriction, including without limitation 7 the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 and/or sell copies of the Software, and to permit persons to whom the 9 Software is furnished to do so, subject to the following conditions: 10 11 The above copyright notice and this permission notice shall be included in 12 all copies or substantial portions of the Software. 13 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 DEALINGS IN THE SOFTWARE. 21 22 *******************************************************************************/ 23 #ifndef _cl006b_h_ 24 #define _cl006b_h_ 25 26 #ifdef __cplusplus 27 extern "C" { 28 #endif 29 30 #include "nvtypes.h" 31 32 /* class NV03_CHANNEL_DMA */ 33 #define NV03_CHANNEL_DMA (0x0000006B) 34 /* NvNotification[] fields and values */ 35 #define NV06B_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) 36 /* pio method data structure */ 37 typedef volatile struct _cl006b_tag0 { 38 NvV32 Reserved00[0x7c0]; 39 } Nv06bTypedef, Nv03ChannelDma; 40 #define NV06B_TYPEDEF Nv03ChannelDma 41 #define nv03ChannelDma Nv03ChannelDma 42 43 #ifdef __cplusplus 44 }; /* extern "C" */ 45 #endif 46 47 #endif /* _cl006b_h_ */ 48