1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _cl_kepler_inline_to_memory_a_h_ 25 #define _cl_kepler_inline_to_memory_a_h_ 26 27 /* AUTO GENERATED FILE -- DO NOT EDIT */ 28 /* Command: ../../class/bin/sw_header.pl kepler_inline_to_memory_a */ 29 30 #include "nvtypes.h" 31 32 #define KEPLER_INLINE_TO_MEMORY_A 0xA040 33 34 #define NVA040_SET_OBJECT 0x0000 35 #define NVA040_SET_OBJECT_CLASS_ID 15:0 36 #define NVA040_SET_OBJECT_ENGINE_ID 20:16 37 38 #define NVA040_NO_OPERATION 0x0100 39 #define NVA040_NO_OPERATION_V 31:0 40 41 #define NVA040_SET_NOTIFY_A 0x0104 42 #define NVA040_SET_NOTIFY_A_ADDRESS_UPPER 7:0 43 44 #define NVA040_SET_NOTIFY_B 0x0108 45 #define NVA040_SET_NOTIFY_B_ADDRESS_LOWER 31:0 46 47 #define NVA040_NOTIFY 0x010c 48 #define NVA040_NOTIFY_TYPE 31:0 49 #define NVA040_NOTIFY_TYPE_WRITE_ONLY 0x00000000 50 #define NVA040_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 51 52 #define NVA040_WAIT_FOR_IDLE 0x0110 53 #define NVA040_WAIT_FOR_IDLE_V 31:0 54 55 #define NVA040_SET_GLOBAL_RENDER_ENABLE_A 0x0130 56 #define NVA040_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 57 58 #define NVA040_SET_GLOBAL_RENDER_ENABLE_B 0x0134 59 #define NVA040_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 60 61 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C 0x0138 62 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 63 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 64 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 65 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 66 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 67 #define NVA040_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 68 69 #define NVA040_SEND_GO_IDLE 0x013c 70 #define NVA040_SEND_GO_IDLE_V 31:0 71 72 #define NVA040_PM_TRIGGER 0x0140 73 #define NVA040_PM_TRIGGER_V 31:0 74 75 #define NVA040_PM_TRIGGER_WFI 0x0144 76 #define NVA040_PM_TRIGGER_WFI_V 31:0 77 78 #define NVA040_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 79 #define NVA040_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 80 81 #define NVA040_SET_INSTRUMENTATION_METHOD_DATA 0x0154 82 #define NVA040_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 83 84 #define NVA040_LINE_LENGTH_IN 0x0180 85 #define NVA040_LINE_LENGTH_IN_VALUE 31:0 86 87 #define NVA040_LINE_COUNT 0x0184 88 #define NVA040_LINE_COUNT_VALUE 31:0 89 90 #define NVA040_OFFSET_OUT_UPPER 0x0188 91 #define NVA040_OFFSET_OUT_UPPER_VALUE 7:0 92 93 #define NVA040_OFFSET_OUT 0x018c 94 #define NVA040_OFFSET_OUT_VALUE 31:0 95 96 #define NVA040_PITCH_OUT 0x0190 97 #define NVA040_PITCH_OUT_VALUE 31:0 98 99 #define NVA040_SET_DST_BLOCK_SIZE 0x0194 100 #define NVA040_SET_DST_BLOCK_SIZE_WIDTH 3:0 101 #define NVA040_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 102 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT 7:4 103 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 104 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 105 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 106 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 107 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 108 #define NVA040_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 109 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH 11:8 110 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 111 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 112 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 113 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 114 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 115 #define NVA040_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 116 117 #define NVA040_SET_DST_WIDTH 0x0198 118 #define NVA040_SET_DST_WIDTH_V 31:0 119 120 #define NVA040_SET_DST_HEIGHT 0x019c 121 #define NVA040_SET_DST_HEIGHT_V 31:0 122 123 #define NVA040_SET_DST_DEPTH 0x01a0 124 #define NVA040_SET_DST_DEPTH_V 31:0 125 126 #define NVA040_SET_DST_LAYER 0x01a4 127 #define NVA040_SET_DST_LAYER_V 31:0 128 129 #define NVA040_SET_DST_ORIGIN_BYTES_X 0x01a8 130 #define NVA040_SET_DST_ORIGIN_BYTES_X_V 19:0 131 132 #define NVA040_SET_DST_ORIGIN_SAMPLES_Y 0x01ac 133 #define NVA040_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 134 135 #define NVA040_LAUNCH_DMA 0x01b0 136 #define NVA040_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 137 #define NVA040_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 138 #define NVA040_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 139 #define NVA040_LAUNCH_DMA_COMPLETION_TYPE 5:4 140 #define NVA040_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 141 #define NVA040_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 142 #define NVA040_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 143 #define NVA040_LAUNCH_DMA_INTERRUPT_TYPE 9:8 144 #define NVA040_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 145 #define NVA040_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 146 #define NVA040_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 147 #define NVA040_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 148 #define NVA040_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 149 #define NVA040_LAUNCH_DMA_REDUCTION_ENABLE 1:1 150 #define NVA040_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 151 #define NVA040_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 152 #define NVA040_LAUNCH_DMA_REDUCTION_OP 15:13 153 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 154 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 155 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 156 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 157 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 158 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 159 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 160 #define NVA040_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 161 #define NVA040_LAUNCH_DMA_REDUCTION_FORMAT 3:2 162 #define NVA040_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 163 #define NVA040_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 164 #define NVA040_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 165 #define NVA040_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 166 #define NVA040_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 167 168 #define NVA040_LOAD_INLINE_DATA 0x01b4 169 #define NVA040_LOAD_INLINE_DATA_V 31:0 170 171 #define NVA040_SET_I2M_SEMAPHORE_A 0x01dc 172 #define NVA040_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 173 174 #define NVA040_SET_I2M_SEMAPHORE_B 0x01e0 175 #define NVA040_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 176 177 #define NVA040_SET_I2M_SEMAPHORE_C 0x01e4 178 #define NVA040_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 179 180 #define NVA040_SET_I2M_SPARE_NOOP00 0x01f0 181 #define NVA040_SET_I2M_SPARE_NOOP00_V 31:0 182 183 #define NVA040_SET_I2M_SPARE_NOOP01 0x01f4 184 #define NVA040_SET_I2M_SPARE_NOOP01_V 31:0 185 186 #define NVA040_SET_I2M_SPARE_NOOP02 0x01f8 187 #define NVA040_SET_I2M_SPARE_NOOP02_V 31:0 188 189 #define NVA040_SET_I2M_SPARE_NOOP03 0x01fc 190 #define NVA040_SET_I2M_SPARE_NOOP03_V 31:0 191 192 #define NVA040_SET_FALCON00 0x0200 193 #define NVA040_SET_FALCON00_V 31:0 194 195 #define NVA040_SET_FALCON01 0x0204 196 #define NVA040_SET_FALCON01_V 31:0 197 198 #define NVA040_SET_FALCON02 0x0208 199 #define NVA040_SET_FALCON02_V 31:0 200 201 #define NVA040_SET_FALCON03 0x020c 202 #define NVA040_SET_FALCON03_V 31:0 203 204 #define NVA040_SET_FALCON04 0x0210 205 #define NVA040_SET_FALCON04_V 31:0 206 207 #define NVA040_SET_FALCON05 0x0214 208 #define NVA040_SET_FALCON05_V 31:0 209 210 #define NVA040_SET_FALCON06 0x0218 211 #define NVA040_SET_FALCON06_V 31:0 212 213 #define NVA040_SET_FALCON07 0x021c 214 #define NVA040_SET_FALCON07_V 31:0 215 216 #define NVA040_SET_FALCON08 0x0220 217 #define NVA040_SET_FALCON08_V 31:0 218 219 #define NVA040_SET_FALCON09 0x0224 220 #define NVA040_SET_FALCON09_V 31:0 221 222 #define NVA040_SET_FALCON10 0x0228 223 #define NVA040_SET_FALCON10_V 31:0 224 225 #define NVA040_SET_FALCON11 0x022c 226 #define NVA040_SET_FALCON11_V 31:0 227 228 #define NVA040_SET_FALCON12 0x0230 229 #define NVA040_SET_FALCON12_V 31:0 230 231 #define NVA040_SET_FALCON13 0x0234 232 #define NVA040_SET_FALCON13_V 31:0 233 234 #define NVA040_SET_FALCON14 0x0238 235 #define NVA040_SET_FALCON14_V 31:0 236 237 #define NVA040_SET_FALCON15 0x023c 238 #define NVA040_SET_FALCON15_V 31:0 239 240 #define NVA040_SET_FALCON16 0x0240 241 #define NVA040_SET_FALCON16_V 31:0 242 243 #define NVA040_SET_FALCON17 0x0244 244 #define NVA040_SET_FALCON17_V 31:0 245 246 #define NVA040_SET_FALCON18 0x0248 247 #define NVA040_SET_FALCON18_V 31:0 248 249 #define NVA040_SET_FALCON19 0x024c 250 #define NVA040_SET_FALCON19_V 31:0 251 252 #define NVA040_SET_FALCON20 0x0250 253 #define NVA040_SET_FALCON20_V 31:0 254 255 #define NVA040_SET_FALCON21 0x0254 256 #define NVA040_SET_FALCON21_V 31:0 257 258 #define NVA040_SET_FALCON22 0x0258 259 #define NVA040_SET_FALCON22_V 31:0 260 261 #define NVA040_SET_FALCON23 0x025c 262 #define NVA040_SET_FALCON23_V 31:0 263 264 #define NVA040_SET_FALCON24 0x0260 265 #define NVA040_SET_FALCON24_V 31:0 266 267 #define NVA040_SET_FALCON25 0x0264 268 #define NVA040_SET_FALCON25_V 31:0 269 270 #define NVA040_SET_FALCON26 0x0268 271 #define NVA040_SET_FALCON26_V 31:0 272 273 #define NVA040_SET_FALCON27 0x026c 274 #define NVA040_SET_FALCON27_V 31:0 275 276 #define NVA040_SET_FALCON28 0x0270 277 #define NVA040_SET_FALCON28_V 31:0 278 279 #define NVA040_SET_FALCON29 0x0274 280 #define NVA040_SET_FALCON29_V 31:0 281 282 #define NVA040_SET_FALCON30 0x0278 283 #define NVA040_SET_FALCON30_V 31:0 284 285 #define NVA040_SET_FALCON31 0x027c 286 #define NVA040_SET_FALCON31_V 31:0 287 288 #define NVA040_SET_RENDER_ENABLE_A 0x1550 289 #define NVA040_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 290 291 #define NVA040_SET_RENDER_ENABLE_B 0x1554 292 #define NVA040_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 293 294 #define NVA040_SET_RENDER_ENABLE_C 0x1558 295 #define NVA040_SET_RENDER_ENABLE_C_MODE 2:0 296 #define NVA040_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 297 #define NVA040_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 298 #define NVA040_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 299 #define NVA040_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 300 #define NVA040_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 301 302 #define NVA040_SET_RENDER_ENABLE_OVERRIDE 0x1944 303 #define NVA040_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 304 #define NVA040_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 305 #define NVA040_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 306 #define NVA040_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 307 308 #define NVA040_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) 309 #define NVA040_SET_MME_SHADOW_SCRATCH_V 31:0 310 311 #endif /* _cl_kepler_inline_to_memory_a_h_ */ 312