1 /*
2 * Copyright (C) 2021 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "util/u_memory.h"
25 #include "compiler.h"
26
27 /* Validatation doesn't make sense in release builds */
28 #ifndef NDEBUG
29
30 /* Validate that all sources are initialized in all read components. This is
31 * required for correct register allocation. We check a weaker condition, that
32 * all sources that are read are written at some point (equivalently, the live
33 * set is empty at the start of the program). TODO: Strengthen */
34
35 bool
bi_validate_initialization(bi_context * ctx)36 bi_validate_initialization(bi_context *ctx)
37 {
38 bool success = true;
39
40 /* Calculate the live set */
41 bi_block *entry = bi_entry_block(ctx);
42 bi_compute_liveness_ssa(ctx);
43
44 /* Validate that the live set is indeed empty */
45 for (unsigned i = 0; i < ctx->ssa_alloc; ++i) {
46 if (BITSET_TEST(entry->ssa_live_in, i)) {
47 fprintf(stderr, "%u\n", i);
48 success = false;
49 }
50 }
51
52 return success;
53 }
54
55 /*
56 * Validate that there are no bi_registers accessed except at the beginning of
57 * the start block, and that preloads are unique. This ensures RA can coalesce
58 * preloads without interference tracking.
59 */
60 static bool
bi_validate_preload(bi_context * ctx)61 bi_validate_preload(bi_context *ctx)
62 {
63 bool start = true;
64 uint64_t preloaded = 0;
65
66 bi_foreach_block(ctx, block) {
67 bi_foreach_instr_in_block(block, I) {
68 /* No instruction should have a register destination */
69 bi_foreach_dest(I, d) {
70 if (I->dest[d].type == BI_INDEX_REGISTER)
71 return false;
72 }
73
74 /* Preloads are register moves at the start */
75 bool is_preload = start && I->op == BI_OPCODE_MOV_I32 &&
76 I->src[0].type == BI_INDEX_REGISTER;
77
78 /* After the first nonpreload, we're done preloading */
79 start &= is_preload;
80
81 /* Only preloads may have a register source */
82 bi_foreach_src(I, s) {
83 if (I->src[s].type == BI_INDEX_REGISTER && !is_preload)
84 return false;
85 }
86
87 /* Check uniqueness */
88 if (is_preload) {
89 unsigned r = I->src[0].value;
90
91 if (preloaded & BITFIELD64_BIT(r))
92 return false;
93
94 preloaded |= BITFIELD64_BIT(r);
95 }
96 }
97
98 /* Only the first block may preload */
99 start = false;
100 }
101
102 return true;
103 }
104
105 /*
106 * Type check the dimensionality of sources and destinations. This occurs in two
107 * passes, first to gather all destination sizes, second to validate all source
108 * sizes. Depends on SSA form.
109 */
110 static bool
bi_validate_width(bi_context * ctx)111 bi_validate_width(bi_context *ctx)
112 {
113 bool succ = true;
114 uint8_t *width = calloc(ctx->ssa_alloc, sizeof(uint8_t));
115
116 bi_foreach_instr_global(ctx, I) {
117 bi_foreach_dest(I, d) {
118 assert(bi_is_ssa(I->dest[d]));
119
120 unsigned v = I->dest[d].value;
121 assert(width[v] == 0 && "broken SSA");
122
123 width[v] = bi_count_write_registers(I, d);
124 }
125 }
126
127 bi_foreach_instr_global(ctx, I) {
128 bi_foreach_ssa_src(I, s) {
129 unsigned v = I->src[s].value;
130 unsigned n = bi_count_read_registers(I, s);
131
132 if (width[v] != n) {
133 succ = false;
134 fprintf(stderr, "source %u, expected width %u, got width %u\n", s,
135 n, width[v]);
136 bi_print_instr(I, stderr);
137 fprintf(stderr, "\n");
138 }
139 }
140 }
141
142 free(width);
143 return succ;
144 }
145
146 /*
147 * Validate that all destinations of the instruction are present.
148 */
149 static bool
bi_validate_dest(bi_context * ctx)150 bi_validate_dest(bi_context *ctx)
151 {
152 bool succ = true;
153
154 bi_foreach_instr_global(ctx, I) {
155 bi_foreach_dest(I, d) {
156 if (bi_is_null(I->dest[d])) {
157 succ = false;
158 fprintf(stderr, "expected dest %u", d);
159 bi_print_instr(I, stderr);
160 fprintf(stderr, "\n");
161 }
162 }
163 }
164
165 return succ;
166 }
167
168 /*
169 * Validate that phis only appear at the beginning of blocks.
170 */
171 static bool
bi_validate_phi_ordering(bi_context * ctx)172 bi_validate_phi_ordering(bi_context *ctx)
173 {
174 bi_foreach_block(ctx, block) {
175 bool start = true;
176
177 bi_foreach_instr_in_block(block, I) {
178 if (start)
179 start = I->op == BI_OPCODE_PHI;
180 else if (I->op == BI_OPCODE_PHI)
181 return false;
182 }
183 }
184
185 return true;
186 }
187
188 void
bi_validate(bi_context * ctx,const char * after)189 bi_validate(bi_context *ctx, const char *after)
190 {
191 bool fail = false;
192
193 if (bifrost_debug & BIFROST_DBG_NOVALIDATE)
194 return;
195
196 if (!bi_validate_initialization(ctx)) {
197 fprintf(stderr, "Uninitialized data read after %s\n", after);
198 fail = true;
199 }
200
201 if (!bi_validate_preload(ctx)) {
202 fprintf(stderr, "Unexpected preload after %s\n", after);
203 fail = true;
204 }
205
206 if (!bi_validate_width(ctx)) {
207 fprintf(stderr, "Unexpected vector with after %s\n", after);
208 fail = true;
209 }
210
211 if (!bi_validate_dest(ctx)) {
212 fprintf(stderr, "Unexpected source/dest after %s\n", after);
213 fail = true;
214 }
215
216 if (!bi_validate_phi_ordering(ctx)) {
217 fprintf(stderr, "Unexpected phi ordering after %s\n", after);
218 fail = true;
219 }
220
221 if (fail) {
222 bi_print_shader(ctx, stderr);
223 exit(1);
224 }
225 }
226
227 #endif /* NDEBUG */
228