1 /*
2 * Copyright © 2022 Collabora, LTD
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "vk_pipeline.h"
25
26 #include "vk_alloc.h"
27 #include "vk_common_entrypoints.h"
28 #include "vk_command_buffer.h"
29 #include "vk_descriptor_set_layout.h"
30 #include "vk_device.h"
31 #include "vk_graphics_state.h"
32 #include "vk_log.h"
33 #include "vk_nir.h"
34 #include "vk_physical_device.h"
35 #include "vk_pipeline_layout.h"
36 #include "vk_shader.h"
37 #include "vk_shader_module.h"
38 #include "vk_util.h"
39
40 #include "nir_serialize.h"
41
42 #include "util/mesa-sha1.h"
43
44 bool
vk_pipeline_shader_stage_is_null(const VkPipelineShaderStageCreateInfo * info)45 vk_pipeline_shader_stage_is_null(const VkPipelineShaderStageCreateInfo *info)
46 {
47 if (info->module != VK_NULL_HANDLE)
48 return false;
49
50 vk_foreach_struct_const(ext, info->pNext) {
51 if (ext->sType == VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO ||
52 ext->sType == VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_MODULE_IDENTIFIER_CREATE_INFO_EXT)
53 return false;
54 }
55
56 return true;
57 }
58
59 bool
vk_pipeline_shader_stage_has_identifier(const VkPipelineShaderStageCreateInfo * info)60 vk_pipeline_shader_stage_has_identifier(const VkPipelineShaderStageCreateInfo *info)
61 {
62 const VkPipelineShaderStageModuleIdentifierCreateInfoEXT *id_info =
63 vk_find_struct_const(info->pNext, PIPELINE_SHADER_STAGE_MODULE_IDENTIFIER_CREATE_INFO_EXT);
64
65 return id_info && id_info->identifierSize != 0;
66 }
67
68 static nir_shader *
get_builtin_nir(const VkPipelineShaderStageCreateInfo * info)69 get_builtin_nir(const VkPipelineShaderStageCreateInfo *info)
70 {
71 VK_FROM_HANDLE(vk_shader_module, module, info->module);
72
73 nir_shader *nir = NULL;
74 if (module != NULL) {
75 nir = module->nir;
76 } else {
77 const VkPipelineShaderStageNirCreateInfoMESA *nir_info =
78 vk_find_struct_const(info->pNext, PIPELINE_SHADER_STAGE_NIR_CREATE_INFO_MESA);
79 if (nir_info != NULL)
80 nir = nir_info->nir;
81 }
82
83 if (nir == NULL)
84 return NULL;
85
86 assert(nir->info.stage == vk_to_mesa_shader_stage(info->stage));
87 ASSERTED nir_function_impl *entrypoint = nir_shader_get_entrypoint(nir);
88 assert(strcmp(entrypoint->function->name, info->pName) == 0);
89 assert(info->pSpecializationInfo == NULL);
90
91 return nir;
92 }
93
94 static uint32_t
get_required_subgroup_size(const void * info_pNext)95 get_required_subgroup_size(const void *info_pNext)
96 {
97 const VkPipelineShaderStageRequiredSubgroupSizeCreateInfo *rss_info =
98 vk_find_struct_const(info_pNext,
99 PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO);
100 return rss_info != NULL ? rss_info->requiredSubgroupSize : 0;
101 }
102
103 enum gl_subgroup_size
vk_get_subgroup_size(uint32_t spirv_version,gl_shader_stage stage,const void * info_pNext,bool allow_varying,bool require_full)104 vk_get_subgroup_size(uint32_t spirv_version,
105 gl_shader_stage stage,
106 const void *info_pNext,
107 bool allow_varying,
108 bool require_full)
109 {
110 uint32_t req_subgroup_size = get_required_subgroup_size(info_pNext);
111 if (req_subgroup_size > 0) {
112 assert(util_is_power_of_two_nonzero(req_subgroup_size));
113 assert(req_subgroup_size >= 4 && req_subgroup_size <= 128);
114 return req_subgroup_size;
115 } else if (allow_varying || spirv_version >= 0x10600) {
116 /* Starting with SPIR-V 1.6, varying subgroup size the default */
117 return SUBGROUP_SIZE_VARYING;
118 } else if (require_full) {
119 assert(stage == MESA_SHADER_COMPUTE ||
120 stage == MESA_SHADER_MESH ||
121 stage == MESA_SHADER_TASK);
122 return SUBGROUP_SIZE_FULL_SUBGROUPS;
123 } else {
124 return SUBGROUP_SIZE_API_CONSTANT;
125 }
126 }
127
128 VkResult
vk_pipeline_shader_stage_to_nir(struct vk_device * device,VkPipelineCreateFlags2KHR pipeline_flags,const VkPipelineShaderStageCreateInfo * info,const struct spirv_to_nir_options * spirv_options,const struct nir_shader_compiler_options * nir_options,void * mem_ctx,nir_shader ** nir_out)129 vk_pipeline_shader_stage_to_nir(struct vk_device *device,
130 VkPipelineCreateFlags2KHR pipeline_flags,
131 const VkPipelineShaderStageCreateInfo *info,
132 const struct spirv_to_nir_options *spirv_options,
133 const struct nir_shader_compiler_options *nir_options,
134 void *mem_ctx, nir_shader **nir_out)
135 {
136 VK_FROM_HANDLE(vk_shader_module, module, info->module);
137 const gl_shader_stage stage = vk_to_mesa_shader_stage(info->stage);
138
139 assert(info->sType == VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO);
140
141 nir_shader *builtin_nir = get_builtin_nir(info);
142 if (builtin_nir != NULL) {
143 nir_validate_shader(builtin_nir, "internal shader");
144
145 nir_shader *clone = nir_shader_clone(mem_ctx, builtin_nir);
146 if (clone == NULL)
147 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
148
149 assert(clone->options == NULL || clone->options == nir_options);
150 clone->options = nir_options;
151
152 *nir_out = clone;
153 return VK_SUCCESS;
154 }
155
156 const uint32_t *spirv_data;
157 uint32_t spirv_size;
158 if (module != NULL) {
159 spirv_data = (uint32_t *)module->data;
160 spirv_size = module->size;
161 } else {
162 const VkShaderModuleCreateInfo *minfo =
163 vk_find_struct_const(info->pNext, SHADER_MODULE_CREATE_INFO);
164 if (unlikely(minfo == NULL)) {
165 return vk_errorf(device, VK_ERROR_UNKNOWN,
166 "No shader module provided");
167 }
168 spirv_data = minfo->pCode;
169 spirv_size = minfo->codeSize;
170 }
171
172 enum gl_subgroup_size subgroup_size = vk_get_subgroup_size(
173 vk_spirv_version(spirv_data, spirv_size),
174 stage, info->pNext,
175 info->flags & VK_PIPELINE_SHADER_STAGE_CREATE_ALLOW_VARYING_SUBGROUP_SIZE_BIT,
176 info->flags & VK_PIPELINE_SHADER_STAGE_CREATE_REQUIRE_FULL_SUBGROUPS_BIT);
177
178 nir_shader *nir = vk_spirv_to_nir(device, spirv_data, spirv_size, stage,
179 info->pName, subgroup_size,
180 info->pSpecializationInfo,
181 spirv_options, nir_options,
182 false /* internal */,
183 mem_ctx);
184 if (nir == NULL)
185 return vk_errorf(device, VK_ERROR_UNKNOWN, "spirv_to_nir failed");
186
187 if (pipeline_flags & VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR)
188 NIR_PASS(_, nir, nir_lower_view_index_to_device_index);
189
190 *nir_out = nir;
191
192 return VK_SUCCESS;
193 }
194
195 void
vk_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags,const VkPipelineShaderStageCreateInfo * info,const struct vk_pipeline_robustness_state * rstate,unsigned char * stage_sha1)196 vk_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags,
197 const VkPipelineShaderStageCreateInfo *info,
198 const struct vk_pipeline_robustness_state *rstate,
199 unsigned char *stage_sha1)
200 {
201 VK_FROM_HANDLE(vk_shader_module, module, info->module);
202
203 const nir_shader *builtin_nir = get_builtin_nir(info);
204 if (builtin_nir != NULL) {
205 /* Internal NIR module: serialize and hash the NIR shader.
206 * We don't need to hash other info fields since they should match the
207 * NIR data.
208 */
209 struct blob blob;
210
211 blob_init(&blob);
212 nir_serialize(&blob, builtin_nir, false);
213 assert(!blob.out_of_memory);
214 _mesa_sha1_compute(blob.data, blob.size, stage_sha1);
215 blob_finish(&blob);
216 return;
217 }
218
219 const VkShaderModuleCreateInfo *minfo =
220 vk_find_struct_const(info->pNext, SHADER_MODULE_CREATE_INFO);
221 const VkPipelineShaderStageModuleIdentifierCreateInfoEXT *iinfo =
222 vk_find_struct_const(info->pNext, PIPELINE_SHADER_STAGE_MODULE_IDENTIFIER_CREATE_INFO_EXT);
223
224 struct mesa_sha1 ctx;
225
226 _mesa_sha1_init(&ctx);
227
228 /* We only care about one of the pipeline flags */
229 pipeline_flags &= VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR;
230 _mesa_sha1_update(&ctx, &pipeline_flags, sizeof(pipeline_flags));
231
232 _mesa_sha1_update(&ctx, &info->flags, sizeof(info->flags));
233
234 assert(util_bitcount(info->stage) == 1);
235 _mesa_sha1_update(&ctx, &info->stage, sizeof(info->stage));
236
237 if (module) {
238 _mesa_sha1_update(&ctx, module->hash, sizeof(module->hash));
239 } else if (minfo) {
240 blake3_hash spirv_hash;
241
242 _mesa_blake3_compute(minfo->pCode, minfo->codeSize, spirv_hash);
243 _mesa_sha1_update(&ctx, spirv_hash, sizeof(spirv_hash));
244 } else {
245 /* It is legal to pass in arbitrary identifiers as long as they don't exceed
246 * the limit. Shaders with bogus identifiers are more or less guaranteed to fail. */
247 assert(iinfo);
248 assert(iinfo->identifierSize <= VK_MAX_SHADER_MODULE_IDENTIFIER_SIZE_EXT);
249 _mesa_sha1_update(&ctx, iinfo->pIdentifier, iinfo->identifierSize);
250 }
251
252 if (rstate) {
253 _mesa_sha1_update(&ctx, &rstate->storage_buffers, sizeof(rstate->storage_buffers));
254 _mesa_sha1_update(&ctx, &rstate->uniform_buffers, sizeof(rstate->uniform_buffers));
255 _mesa_sha1_update(&ctx, &rstate->vertex_inputs, sizeof(rstate->vertex_inputs));
256 _mesa_sha1_update(&ctx, &rstate->images, sizeof(rstate->images));
257 }
258
259 _mesa_sha1_update(&ctx, info->pName, strlen(info->pName));
260
261 if (info->pSpecializationInfo) {
262 _mesa_sha1_update(&ctx, info->pSpecializationInfo->pMapEntries,
263 info->pSpecializationInfo->mapEntryCount *
264 sizeof(*info->pSpecializationInfo->pMapEntries));
265 _mesa_sha1_update(&ctx, info->pSpecializationInfo->pData,
266 info->pSpecializationInfo->dataSize);
267 }
268
269 uint32_t req_subgroup_size = get_required_subgroup_size(info);
270 _mesa_sha1_update(&ctx, &req_subgroup_size, sizeof(req_subgroup_size));
271
272 _mesa_sha1_final(&ctx, stage_sha1);
273 }
274
275 static VkPipelineRobustnessBufferBehaviorEXT
vk_device_default_robust_buffer_behavior(const struct vk_device * device)276 vk_device_default_robust_buffer_behavior(const struct vk_device *device)
277 {
278 if (device->enabled_features.robustBufferAccess2) {
279 return VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_ROBUST_BUFFER_ACCESS_2_EXT;
280 } else if (device->enabled_features.robustBufferAccess) {
281 return VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_ROBUST_BUFFER_ACCESS_EXT;
282 } else {
283 return VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DISABLED_EXT;
284 }
285 }
286
287 static VkPipelineRobustnessImageBehaviorEXT
vk_device_default_robust_image_behavior(const struct vk_device * device)288 vk_device_default_robust_image_behavior(const struct vk_device *device)
289 {
290 if (device->enabled_features.robustImageAccess2) {
291 return VK_PIPELINE_ROBUSTNESS_IMAGE_BEHAVIOR_ROBUST_IMAGE_ACCESS_2_EXT;
292 } else if (device->enabled_features.robustImageAccess) {
293 return VK_PIPELINE_ROBUSTNESS_IMAGE_BEHAVIOR_ROBUST_IMAGE_ACCESS_EXT;
294 } else {
295 return VK_PIPELINE_ROBUSTNESS_IMAGE_BEHAVIOR_DISABLED_EXT;
296 }
297 }
298
299 void
vk_pipeline_robustness_state_fill(const struct vk_device * device,struct vk_pipeline_robustness_state * rs,const void * pipeline_pNext,const void * shader_stage_pNext)300 vk_pipeline_robustness_state_fill(const struct vk_device *device,
301 struct vk_pipeline_robustness_state *rs,
302 const void *pipeline_pNext,
303 const void *shader_stage_pNext)
304 {
305 rs->uniform_buffers = VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DEVICE_DEFAULT_EXT;
306 rs->storage_buffers = VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DEVICE_DEFAULT_EXT;
307 rs->vertex_inputs = VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DEVICE_DEFAULT_EXT;
308 rs->images = VK_PIPELINE_ROBUSTNESS_IMAGE_BEHAVIOR_DEVICE_DEFAULT_EXT;
309 rs->null_uniform_buffer_descriptor = device->enabled_features.nullDescriptor;
310 rs->null_storage_buffer_descriptor = device->enabled_features.nullDescriptor;
311
312 const VkPipelineRobustnessCreateInfoEXT *shader_info =
313 vk_find_struct_const(shader_stage_pNext,
314 PIPELINE_ROBUSTNESS_CREATE_INFO_EXT);
315 if (shader_info) {
316 rs->storage_buffers = shader_info->storageBuffers;
317 rs->uniform_buffers = shader_info->uniformBuffers;
318 rs->vertex_inputs = shader_info->vertexInputs;
319 rs->images = shader_info->images;
320 } else {
321 const VkPipelineRobustnessCreateInfoEXT *pipeline_info =
322 vk_find_struct_const(pipeline_pNext,
323 PIPELINE_ROBUSTNESS_CREATE_INFO_EXT);
324 if (pipeline_info) {
325 rs->storage_buffers = pipeline_info->storageBuffers;
326 rs->uniform_buffers = pipeline_info->uniformBuffers;
327 rs->vertex_inputs = pipeline_info->vertexInputs;
328 rs->images = pipeline_info->images;
329 }
330 }
331
332 if (rs->storage_buffers ==
333 VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DEVICE_DEFAULT_EXT)
334 rs->storage_buffers = vk_device_default_robust_buffer_behavior(device);
335
336 if (rs->uniform_buffers ==
337 VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DEVICE_DEFAULT_EXT)
338 rs->uniform_buffers = vk_device_default_robust_buffer_behavior(device);
339
340 if (rs->vertex_inputs ==
341 VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DEVICE_DEFAULT_EXT)
342 rs->vertex_inputs = vk_device_default_robust_buffer_behavior(device);
343
344 if (rs->images == VK_PIPELINE_ROBUSTNESS_IMAGE_BEHAVIOR_DEVICE_DEFAULT_EXT)
345 rs->images = vk_device_default_robust_image_behavior(device);
346 }
347
348 void *
vk_pipeline_zalloc(struct vk_device * device,const struct vk_pipeline_ops * ops,VkPipelineBindPoint bind_point,VkPipelineCreateFlags2KHR flags,const VkAllocationCallbacks * alloc,size_t size)349 vk_pipeline_zalloc(struct vk_device *device,
350 const struct vk_pipeline_ops *ops,
351 VkPipelineBindPoint bind_point,
352 VkPipelineCreateFlags2KHR flags,
353 const VkAllocationCallbacks *alloc,
354 size_t size)
355 {
356 struct vk_pipeline *pipeline;
357
358 pipeline = vk_object_zalloc(device, alloc, size, VK_OBJECT_TYPE_PIPELINE);
359 if (pipeline == NULL)
360 return NULL;
361
362 pipeline->ops = ops;
363 pipeline->bind_point = bind_point;
364 pipeline->flags = flags;
365
366 return pipeline;
367 }
368
369 void
vk_pipeline_free(struct vk_device * device,const VkAllocationCallbacks * alloc,struct vk_pipeline * pipeline)370 vk_pipeline_free(struct vk_device *device,
371 const VkAllocationCallbacks *alloc,
372 struct vk_pipeline *pipeline)
373 {
374 vk_object_free(device, alloc, &pipeline->base);
375 }
376
377 VKAPI_ATTR void VKAPI_CALL
vk_common_DestroyPipeline(VkDevice _device,VkPipeline _pipeline,const VkAllocationCallbacks * pAllocator)378 vk_common_DestroyPipeline(VkDevice _device,
379 VkPipeline _pipeline,
380 const VkAllocationCallbacks *pAllocator)
381 {
382 VK_FROM_HANDLE(vk_device, device, _device);
383 VK_FROM_HANDLE(vk_pipeline, pipeline, _pipeline);
384
385 if (pipeline == NULL)
386 return;
387
388 pipeline->ops->destroy(device, pipeline, pAllocator);
389 }
390
391 VKAPI_ATTR VkResult VKAPI_CALL
vk_common_GetPipelineExecutablePropertiesKHR(VkDevice _device,const VkPipelineInfoKHR * pPipelineInfo,uint32_t * pExecutableCount,VkPipelineExecutablePropertiesKHR * pProperties)392 vk_common_GetPipelineExecutablePropertiesKHR(
393 VkDevice _device,
394 const VkPipelineInfoKHR *pPipelineInfo,
395 uint32_t *pExecutableCount,
396 VkPipelineExecutablePropertiesKHR *pProperties)
397 {
398 VK_FROM_HANDLE(vk_device, device, _device);
399 VK_FROM_HANDLE(vk_pipeline, pipeline, pPipelineInfo->pipeline);
400
401 return pipeline->ops->get_executable_properties(device, pipeline,
402 pExecutableCount,
403 pProperties);
404 }
405
406 VKAPI_ATTR VkResult VKAPI_CALL
vk_common_GetPipelineExecutableStatisticsKHR(VkDevice _device,const VkPipelineExecutableInfoKHR * pExecutableInfo,uint32_t * pStatisticCount,VkPipelineExecutableStatisticKHR * pStatistics)407 vk_common_GetPipelineExecutableStatisticsKHR(
408 VkDevice _device,
409 const VkPipelineExecutableInfoKHR *pExecutableInfo,
410 uint32_t *pStatisticCount,
411 VkPipelineExecutableStatisticKHR *pStatistics)
412 {
413 VK_FROM_HANDLE(vk_device, device, _device);
414 VK_FROM_HANDLE(vk_pipeline, pipeline, pExecutableInfo->pipeline);
415
416 return pipeline->ops->get_executable_statistics(device, pipeline,
417 pExecutableInfo->executableIndex,
418 pStatisticCount, pStatistics);
419 }
420
421 VKAPI_ATTR VkResult VKAPI_CALL
vk_common_GetPipelineExecutableInternalRepresentationsKHR(VkDevice _device,const VkPipelineExecutableInfoKHR * pExecutableInfo,uint32_t * pInternalRepresentationCount,VkPipelineExecutableInternalRepresentationKHR * pInternalRepresentations)422 vk_common_GetPipelineExecutableInternalRepresentationsKHR(
423 VkDevice _device,
424 const VkPipelineExecutableInfoKHR *pExecutableInfo,
425 uint32_t *pInternalRepresentationCount,
426 VkPipelineExecutableInternalRepresentationKHR* pInternalRepresentations)
427 {
428 VK_FROM_HANDLE(vk_device, device, _device);
429 VK_FROM_HANDLE(vk_pipeline, pipeline, pExecutableInfo->pipeline);
430
431 return pipeline->ops->get_internal_representations(device, pipeline,
432 pExecutableInfo->executableIndex,
433 pInternalRepresentationCount,
434 pInternalRepresentations);
435 }
436
437 VKAPI_ATTR void VKAPI_CALL
vk_common_CmdBindPipeline(VkCommandBuffer commandBuffer,VkPipelineBindPoint pipelineBindPoint,VkPipeline _pipeline)438 vk_common_CmdBindPipeline(VkCommandBuffer commandBuffer,
439 VkPipelineBindPoint pipelineBindPoint,
440 VkPipeline _pipeline)
441 {
442 VK_FROM_HANDLE(vk_command_buffer, cmd_buffer, commandBuffer);
443 VK_FROM_HANDLE(vk_pipeline, pipeline, _pipeline);
444
445 assert(pipeline->bind_point == pipelineBindPoint);
446
447 pipeline->ops->cmd_bind(cmd_buffer, pipeline);
448 }
449
450 static const struct vk_pipeline_cache_object_ops pipeline_shader_cache_ops;
451
452 static struct vk_shader *
vk_shader_from_cache_obj(struct vk_pipeline_cache_object * object)453 vk_shader_from_cache_obj(struct vk_pipeline_cache_object *object)
454 {
455 assert(object->ops == &pipeline_shader_cache_ops);
456 return container_of(object, struct vk_shader, pipeline.cache_obj);
457 }
458
459 static bool
vk_pipeline_shader_serialize(struct vk_pipeline_cache_object * object,struct blob * blob)460 vk_pipeline_shader_serialize(struct vk_pipeline_cache_object *object,
461 struct blob *blob)
462 {
463 struct vk_shader *shader = vk_shader_from_cache_obj(object);
464 struct vk_device *device = shader->base.device;
465
466 return shader->ops->serialize(device, shader, blob);
467 }
468
469 static void
vk_shader_init_cache_obj(struct vk_device * device,struct vk_shader * shader,const void * key_data,size_t key_size)470 vk_shader_init_cache_obj(struct vk_device *device, struct vk_shader *shader,
471 const void *key_data, size_t key_size)
472 {
473 assert(key_size == sizeof(shader->pipeline.cache_key));
474 memcpy(&shader->pipeline.cache_key, key_data,
475 sizeof(shader->pipeline.cache_key));
476
477 vk_pipeline_cache_object_init(device, &shader->pipeline.cache_obj,
478 &pipeline_shader_cache_ops,
479 &shader->pipeline.cache_key,
480 sizeof(shader->pipeline.cache_key));
481 }
482
483 static struct vk_pipeline_cache_object *
vk_pipeline_shader_deserialize(struct vk_pipeline_cache * cache,const void * key_data,size_t key_size,struct blob_reader * blob)484 vk_pipeline_shader_deserialize(struct vk_pipeline_cache *cache,
485 const void *key_data, size_t key_size,
486 struct blob_reader *blob)
487 {
488 struct vk_device *device = cache->base.device;
489 const struct vk_device_shader_ops *ops = device->shader_ops;
490
491 /* TODO: Do we really want to always use the latest version? */
492 const uint32_t version = device->physical->properties.shaderBinaryVersion;
493
494 struct vk_shader *shader;
495 VkResult result = ops->deserialize(device, blob, version,
496 &device->alloc, &shader);
497 if (result != VK_SUCCESS) {
498 assert(result == VK_ERROR_OUT_OF_HOST_MEMORY);
499 return NULL;
500 }
501
502 vk_shader_init_cache_obj(device, shader, key_data, key_size);
503
504 return &shader->pipeline.cache_obj;
505 }
506
507 static void
vk_pipeline_shader_destroy(struct vk_device * device,struct vk_pipeline_cache_object * object)508 vk_pipeline_shader_destroy(struct vk_device *device,
509 struct vk_pipeline_cache_object *object)
510 {
511 struct vk_shader *shader = vk_shader_from_cache_obj(object);
512 assert(shader->base.device == device);
513
514 vk_shader_destroy(device, shader, &device->alloc);
515 }
516
517 static const struct vk_pipeline_cache_object_ops pipeline_shader_cache_ops = {
518 .serialize = vk_pipeline_shader_serialize,
519 .deserialize = vk_pipeline_shader_deserialize,
520 .destroy = vk_pipeline_shader_destroy,
521 };
522
523 static struct vk_shader *
vk_shader_ref(struct vk_shader * shader)524 vk_shader_ref(struct vk_shader *shader)
525 {
526 vk_pipeline_cache_object_ref(&shader->pipeline.cache_obj);
527 return shader;
528 }
529
530 static void
vk_shader_unref(struct vk_device * device,struct vk_shader * shader)531 vk_shader_unref(struct vk_device *device, struct vk_shader *shader)
532 {
533 vk_pipeline_cache_object_unref(device, &shader->pipeline.cache_obj);
534 }
535
536 PRAGMA_DIAGNOSTIC_PUSH
537 PRAGMA_DIAGNOSTIC_ERROR(-Wpadded)
538 struct vk_pipeline_tess_info {
539 unsigned tcs_vertices_out : 8;
540 unsigned primitive_mode : 2; /* tess_primitive_mode */
541 unsigned spacing : 2; /* gl_tess_spacing */
542 unsigned ccw : 1;
543 unsigned point_mode : 1;
544 unsigned _pad : 18;
545 };
546 PRAGMA_DIAGNOSTIC_POP
547 static_assert(sizeof(struct vk_pipeline_tess_info) == 4,
548 "This struct has no holes");
549
550 static void
vk_pipeline_gather_nir_tess_info(const nir_shader * nir,struct vk_pipeline_tess_info * info)551 vk_pipeline_gather_nir_tess_info(const nir_shader *nir,
552 struct vk_pipeline_tess_info *info)
553 {
554 info->tcs_vertices_out = nir->info.tess.tcs_vertices_out;
555 info->primitive_mode = nir->info.tess._primitive_mode;
556 info->spacing = nir->info.tess.spacing;
557 info->ccw = nir->info.tess.ccw;
558 info->point_mode = nir->info.tess.point_mode;
559 }
560
561 static void
vk_pipeline_replace_nir_tess_info(nir_shader * nir,const struct vk_pipeline_tess_info * info)562 vk_pipeline_replace_nir_tess_info(nir_shader *nir,
563 const struct vk_pipeline_tess_info *info)
564 {
565 nir->info.tess.tcs_vertices_out = info->tcs_vertices_out;
566 nir->info.tess._primitive_mode = info->primitive_mode;
567 nir->info.tess.spacing = info->spacing;
568 nir->info.tess.ccw = info->ccw;
569 nir->info.tess.point_mode = info->point_mode;
570 }
571
572 static void
vk_pipeline_tess_info_merge(struct vk_pipeline_tess_info * dst,const struct vk_pipeline_tess_info * src)573 vk_pipeline_tess_info_merge(struct vk_pipeline_tess_info *dst,
574 const struct vk_pipeline_tess_info *src)
575 {
576 /* The Vulkan 1.0.38 spec, section 21.1 Tessellator says:
577 *
578 * "PointMode. Controls generation of points rather than triangles
579 * or lines. This functionality defaults to disabled, and is
580 * enabled if either shader stage includes the execution mode.
581 *
582 * and about Triangles, Quads, IsoLines, VertexOrderCw, VertexOrderCcw,
583 * PointMode, SpacingEqual, SpacingFractionalEven, SpacingFractionalOdd,
584 * and OutputVertices, it says:
585 *
586 * "One mode must be set in at least one of the tessellation
587 * shader stages."
588 *
589 * So, the fields can be set in either the TCS or TES, but they must
590 * agree if set in both.
591 */
592 assert(dst->tcs_vertices_out == 0 ||
593 src->tcs_vertices_out == 0 ||
594 dst->tcs_vertices_out == src->tcs_vertices_out);
595 dst->tcs_vertices_out |= src->tcs_vertices_out;
596
597 static_assert(TESS_SPACING_UNSPECIFIED == 0, "");
598 assert(dst->spacing == TESS_SPACING_UNSPECIFIED ||
599 src->spacing == TESS_SPACING_UNSPECIFIED ||
600 dst->spacing == src->spacing);
601 dst->spacing |= src->spacing;
602
603 static_assert(TESS_PRIMITIVE_UNSPECIFIED == 0, "");
604 assert(dst->primitive_mode == TESS_PRIMITIVE_UNSPECIFIED ||
605 src->primitive_mode == TESS_PRIMITIVE_UNSPECIFIED ||
606 dst->primitive_mode == src->primitive_mode);
607 dst->primitive_mode |= src->primitive_mode;
608 dst->ccw |= src->ccw;
609 dst->point_mode |= src->point_mode;
610 }
611
612 struct vk_pipeline_precomp_shader {
613 struct vk_pipeline_cache_object cache_obj;
614
615 /* Key for this cache_obj in the pipeline cache.
616 *
617 * This is always the output of vk_pipeline_hash_shader_stage() so it must
618 * be a SHA1 hash.
619 */
620 uint8_t cache_key[SHA1_DIGEST_LENGTH];
621
622 gl_shader_stage stage;
623
624 struct vk_pipeline_robustness_state rs;
625
626 /* Tessellation info if the shader is a tessellation shader */
627 struct vk_pipeline_tess_info tess;
628
629 /* Hash of the vk_pipeline_precomp_shader
630 *
631 * This is the hash of the final compiled NIR together with tess info and
632 * robustness state. It's used as a key for final binary lookups. By
633 * having this as a separate key, we can de-duplicate cases where you have
634 * different SPIR-V or specialization constants but end up compiling the
635 * same NIR shader in the end anyway.
636 */
637 blake3_hash blake3;
638
639 struct blob nir_blob;
640 };
641
642 static struct vk_pipeline_precomp_shader *
vk_pipeline_precomp_shader_ref(struct vk_pipeline_precomp_shader * shader)643 vk_pipeline_precomp_shader_ref(struct vk_pipeline_precomp_shader *shader)
644 {
645 vk_pipeline_cache_object_ref(&shader->cache_obj);
646 return shader;
647 }
648
649 static void
vk_pipeline_precomp_shader_unref(struct vk_device * device,struct vk_pipeline_precomp_shader * shader)650 vk_pipeline_precomp_shader_unref(struct vk_device *device,
651 struct vk_pipeline_precomp_shader *shader)
652 {
653 vk_pipeline_cache_object_unref(device, &shader->cache_obj);
654 }
655
656 static const struct vk_pipeline_cache_object_ops pipeline_precomp_shader_cache_ops;
657
658 static struct vk_pipeline_precomp_shader *
vk_pipeline_precomp_shader_from_cache_obj(struct vk_pipeline_cache_object * obj)659 vk_pipeline_precomp_shader_from_cache_obj(struct vk_pipeline_cache_object *obj)
660 {
661 assert(obj->ops == & pipeline_precomp_shader_cache_ops);
662 return container_of(obj, struct vk_pipeline_precomp_shader, cache_obj);
663 }
664
665 static struct vk_pipeline_precomp_shader *
vk_pipeline_precomp_shader_create(struct vk_device * device,const void * key_data,size_t key_size,const struct vk_pipeline_robustness_state * rs,nir_shader * nir)666 vk_pipeline_precomp_shader_create(struct vk_device *device,
667 const void *key_data, size_t key_size,
668 const struct vk_pipeline_robustness_state *rs,
669 nir_shader *nir)
670 {
671 struct blob blob;
672 blob_init(&blob);
673
674 nir_serialize(&blob, nir, false);
675
676 if (blob.out_of_memory)
677 goto fail_blob;
678
679 struct vk_pipeline_precomp_shader *shader =
680 vk_zalloc(&device->alloc, sizeof(*shader), 8,
681 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
682 if (shader == NULL)
683 goto fail_blob;
684
685 assert(sizeof(shader->cache_key) == key_size);
686 memcpy(shader->cache_key, key_data, sizeof(shader->cache_key));
687
688 vk_pipeline_cache_object_init(device, &shader->cache_obj,
689 &pipeline_precomp_shader_cache_ops,
690 shader->cache_key,
691 sizeof(shader->cache_key));
692
693 shader->stage = nir->info.stage;
694 shader->rs = *rs;
695
696 vk_pipeline_gather_nir_tess_info(nir, &shader->tess);
697
698 struct mesa_blake3 blake3_ctx;
699 _mesa_blake3_init(&blake3_ctx);
700 _mesa_blake3_update(&blake3_ctx, rs, sizeof(*rs));
701 _mesa_blake3_update(&blake3_ctx, blob.data, blob.size);
702 _mesa_blake3_final(&blake3_ctx, shader->blake3);
703
704 shader->nir_blob = blob;
705
706 return shader;
707
708 fail_blob:
709 blob_finish(&blob);
710
711 return NULL;
712 }
713
714 static bool
vk_pipeline_precomp_shader_serialize(struct vk_pipeline_cache_object * obj,struct blob * blob)715 vk_pipeline_precomp_shader_serialize(struct vk_pipeline_cache_object *obj,
716 struct blob *blob)
717 {
718 struct vk_pipeline_precomp_shader *shader =
719 vk_pipeline_precomp_shader_from_cache_obj(obj);
720
721 blob_write_uint32(blob, shader->stage);
722 blob_write_bytes(blob, &shader->rs, sizeof(shader->rs));
723 blob_write_bytes(blob, &shader->tess, sizeof(shader->tess));
724 blob_write_bytes(blob, shader->blake3, sizeof(shader->blake3));
725 blob_write_uint64(blob, shader->nir_blob.size);
726 blob_write_bytes(blob, shader->nir_blob.data, shader->nir_blob.size);
727
728 return !blob->out_of_memory;
729 }
730
731 static struct vk_pipeline_cache_object *
vk_pipeline_precomp_shader_deserialize(struct vk_pipeline_cache * cache,const void * key_data,size_t key_size,struct blob_reader * blob)732 vk_pipeline_precomp_shader_deserialize(struct vk_pipeline_cache *cache,
733 const void *key_data, size_t key_size,
734 struct blob_reader *blob)
735 {
736 struct vk_device *device = cache->base.device;
737
738 struct vk_pipeline_precomp_shader *shader =
739 vk_zalloc(&device->alloc, sizeof(*shader), 8,
740 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
741 if (shader == NULL)
742 return NULL;
743
744 assert(sizeof(shader->cache_key) == key_size);
745 memcpy(shader->cache_key, key_data, sizeof(shader->cache_key));
746
747 vk_pipeline_cache_object_init(device, &shader->cache_obj,
748 &pipeline_precomp_shader_cache_ops,
749 shader->cache_key,
750 sizeof(shader->cache_key));
751
752 shader->stage = blob_read_uint32(blob);
753 blob_copy_bytes(blob, &shader->rs, sizeof(shader->rs));
754 blob_copy_bytes(blob, &shader->tess, sizeof(shader->tess));
755 blob_copy_bytes(blob, shader->blake3, sizeof(shader->blake3));
756
757 uint64_t nir_size = blob_read_uint64(blob);
758 if (blob->overrun || nir_size > SIZE_MAX)
759 goto fail_shader;
760
761 const void *nir_data = blob_read_bytes(blob, nir_size);
762 if (blob->overrun)
763 goto fail_shader;
764
765 blob_init(&shader->nir_blob);
766 blob_write_bytes(&shader->nir_blob, nir_data, nir_size);
767 if (shader->nir_blob.out_of_memory)
768 goto fail_nir_blob;
769
770 return &shader->cache_obj;
771
772 fail_nir_blob:
773 blob_finish(&shader->nir_blob);
774 fail_shader:
775 vk_pipeline_cache_object_finish(&shader->cache_obj);
776 vk_free(&device->alloc, shader);
777
778 return NULL;
779 }
780
781 static void
vk_pipeline_precomp_shader_destroy(struct vk_device * device,struct vk_pipeline_cache_object * obj)782 vk_pipeline_precomp_shader_destroy(struct vk_device *device,
783 struct vk_pipeline_cache_object *obj)
784 {
785 struct vk_pipeline_precomp_shader *shader =
786 vk_pipeline_precomp_shader_from_cache_obj(obj);
787
788 blob_finish(&shader->nir_blob);
789 vk_pipeline_cache_object_finish(&shader->cache_obj);
790 vk_free(&device->alloc, shader);
791 }
792
793 static nir_shader *
vk_pipeline_precomp_shader_get_nir(const struct vk_pipeline_precomp_shader * shader,const struct nir_shader_compiler_options * nir_options)794 vk_pipeline_precomp_shader_get_nir(const struct vk_pipeline_precomp_shader *shader,
795 const struct nir_shader_compiler_options *nir_options)
796 {
797 struct blob_reader blob;
798 blob_reader_init(&blob, shader->nir_blob.data, shader->nir_blob.size);
799
800 nir_shader *nir = nir_deserialize(NULL, nir_options, &blob);
801 if (blob.overrun) {
802 ralloc_free(nir);
803 return NULL;
804 }
805
806 return nir;
807 }
808
809 static const struct vk_pipeline_cache_object_ops pipeline_precomp_shader_cache_ops = {
810 .serialize = vk_pipeline_precomp_shader_serialize,
811 .deserialize = vk_pipeline_precomp_shader_deserialize,
812 .destroy = vk_pipeline_precomp_shader_destroy,
813 };
814
815 static VkResult
vk_pipeline_precompile_shader(struct vk_device * device,struct vk_pipeline_cache * cache,VkPipelineCreateFlags2KHR pipeline_flags,const void * pipeline_info_pNext,const VkPipelineShaderStageCreateInfo * info,struct vk_pipeline_precomp_shader ** ps_out)816 vk_pipeline_precompile_shader(struct vk_device *device,
817 struct vk_pipeline_cache *cache,
818 VkPipelineCreateFlags2KHR pipeline_flags,
819 const void *pipeline_info_pNext,
820 const VkPipelineShaderStageCreateInfo *info,
821 struct vk_pipeline_precomp_shader **ps_out)
822 {
823 const struct vk_device_shader_ops *ops = device->shader_ops;
824 VkResult result;
825
826 struct vk_pipeline_robustness_state rs;
827 vk_pipeline_robustness_state_fill(device, &rs,
828 pipeline_info_pNext,
829 info->pNext);
830
831 uint8_t stage_sha1[SHA1_DIGEST_LENGTH];
832 vk_pipeline_hash_shader_stage(pipeline_flags, info, &rs, stage_sha1);
833
834 if (cache != NULL) {
835 struct vk_pipeline_cache_object *cache_obj =
836 vk_pipeline_cache_lookup_object(cache, stage_sha1, sizeof(stage_sha1),
837 &pipeline_precomp_shader_cache_ops,
838 NULL /* cache_hit */);
839 if (cache_obj != NULL) {
840 *ps_out = vk_pipeline_precomp_shader_from_cache_obj(cache_obj);
841 return VK_SUCCESS;
842 }
843 }
844
845 if (pipeline_flags &
846 VK_PIPELINE_CREATE_2_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT_KHR)
847 return VK_PIPELINE_COMPILE_REQUIRED;
848
849 const gl_shader_stage stage = vk_to_mesa_shader_stage(info->stage);
850 const struct nir_shader_compiler_options *nir_options =
851 ops->get_nir_options(device->physical, stage, &rs);
852 const struct spirv_to_nir_options spirv_options =
853 ops->get_spirv_options(device->physical, stage, &rs);
854
855 nir_shader *nir;
856 result = vk_pipeline_shader_stage_to_nir(device, pipeline_flags, info,
857 &spirv_options, nir_options,
858 NULL, &nir);
859 if (result != VK_SUCCESS)
860 return result;
861
862 if (ops->preprocess_nir != NULL)
863 ops->preprocess_nir(device->physical, nir);
864
865 struct vk_pipeline_precomp_shader *shader =
866 vk_pipeline_precomp_shader_create(device, stage_sha1,
867 sizeof(stage_sha1),
868 &rs, nir);
869 ralloc_free(nir);
870 if (shader == NULL)
871 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
872
873 if (cache != NULL) {
874 struct vk_pipeline_cache_object *cache_obj = &shader->cache_obj;
875 cache_obj = vk_pipeline_cache_add_object(cache, cache_obj);
876 shader = vk_pipeline_precomp_shader_from_cache_obj(cache_obj);
877 }
878
879 *ps_out = shader;
880
881 return VK_SUCCESS;
882 }
883
884 struct vk_pipeline_stage {
885 gl_shader_stage stage;
886
887 struct vk_pipeline_precomp_shader *precomp;
888 struct vk_shader *shader;
889 };
890
891 static int
cmp_vk_pipeline_stages(const void * _a,const void * _b)892 cmp_vk_pipeline_stages(const void *_a, const void *_b)
893 {
894 const struct vk_pipeline_stage *a = _a, *b = _b;
895 return vk_shader_cmp_graphics_stages(a->stage, b->stage);
896 }
897
898 static bool
vk_pipeline_stage_is_null(const struct vk_pipeline_stage * stage)899 vk_pipeline_stage_is_null(const struct vk_pipeline_stage *stage)
900 {
901 return stage->precomp == NULL && stage->shader == NULL;
902 }
903
904 static void
vk_pipeline_stage_finish(struct vk_device * device,struct vk_pipeline_stage * stage)905 vk_pipeline_stage_finish(struct vk_device *device,
906 struct vk_pipeline_stage *stage)
907 {
908 if (stage->precomp != NULL)
909 vk_pipeline_precomp_shader_unref(device, stage->precomp);
910
911 if (stage->shader)
912 vk_shader_unref(device, stage->shader);
913 }
914
915 static struct vk_pipeline_stage
vk_pipeline_stage_clone(const struct vk_pipeline_stage * in)916 vk_pipeline_stage_clone(const struct vk_pipeline_stage *in)
917 {
918 struct vk_pipeline_stage out = {
919 .stage = in->stage,
920 };
921
922 if (in->precomp)
923 out.precomp = vk_pipeline_precomp_shader_ref(in->precomp);
924
925 if (in->shader)
926 out.shader = vk_shader_ref(in->shader);
927
928 return out;
929 }
930
931 struct vk_graphics_pipeline {
932 struct vk_pipeline base;
933
934 union {
935 struct {
936 struct vk_graphics_pipeline_all_state all_state;
937 struct vk_graphics_pipeline_state state;
938 } lib;
939
940 struct {
941 struct vk_vertex_input_state _dynamic_vi;
942 struct vk_sample_locations_state _dynamic_sl;
943 struct vk_dynamic_graphics_state dynamic;
944 } linked;
945 };
946
947 uint32_t set_layout_count;
948 struct vk_descriptor_set_layout *set_layouts[MESA_VK_MAX_DESCRIPTOR_SETS];
949
950 uint32_t stage_count;
951 struct vk_pipeline_stage stages[MESA_VK_MAX_GRAPHICS_PIPELINE_STAGES];
952 };
953
954 static void
vk_graphics_pipeline_destroy(struct vk_device * device,struct vk_pipeline * pipeline,const VkAllocationCallbacks * pAllocator)955 vk_graphics_pipeline_destroy(struct vk_device *device,
956 struct vk_pipeline *pipeline,
957 const VkAllocationCallbacks *pAllocator)
958 {
959 struct vk_graphics_pipeline *gfx_pipeline =
960 container_of(pipeline, struct vk_graphics_pipeline, base);
961
962 for (uint32_t i = 0; i < gfx_pipeline->stage_count; i++)
963 vk_pipeline_stage_finish(device, &gfx_pipeline->stages[i]);
964
965 for (uint32_t i = 0; i < gfx_pipeline->set_layout_count; i++) {
966 if (gfx_pipeline->set_layouts[i] != NULL)
967 vk_descriptor_set_layout_unref(device, gfx_pipeline->set_layouts[i]);
968 }
969
970 vk_pipeline_free(device, pAllocator, pipeline);
971 }
972
973 static bool
vk_device_supports_stage(struct vk_device * device,gl_shader_stage stage)974 vk_device_supports_stage(struct vk_device *device,
975 gl_shader_stage stage)
976 {
977 const struct vk_features *features = &device->physical->supported_features;
978
979 switch (stage) {
980 case MESA_SHADER_VERTEX:
981 case MESA_SHADER_FRAGMENT:
982 case MESA_SHADER_COMPUTE:
983 return true;
984 case MESA_SHADER_TESS_CTRL:
985 case MESA_SHADER_TESS_EVAL:
986 return features->tessellationShader;
987 case MESA_SHADER_GEOMETRY:
988 return features->geometryShader;
989 case MESA_SHADER_TASK:
990 return features->taskShader;
991 case MESA_SHADER_MESH:
992 return features->meshShader;
993 default:
994 return false;
995 }
996 }
997
998 static const gl_shader_stage all_gfx_stages[] = {
999 MESA_SHADER_VERTEX,
1000 MESA_SHADER_TESS_CTRL,
1001 MESA_SHADER_TESS_EVAL,
1002 MESA_SHADER_GEOMETRY,
1003 MESA_SHADER_TASK,
1004 MESA_SHADER_MESH,
1005 MESA_SHADER_FRAGMENT,
1006 };
1007
1008 static void
vk_graphics_pipeline_cmd_bind(struct vk_command_buffer * cmd_buffer,struct vk_pipeline * pipeline)1009 vk_graphics_pipeline_cmd_bind(struct vk_command_buffer *cmd_buffer,
1010 struct vk_pipeline *pipeline)
1011 {
1012 struct vk_device *device = cmd_buffer->base.device;
1013 const struct vk_device_shader_ops *ops = device->shader_ops;
1014
1015 struct vk_graphics_pipeline *gfx_pipeline = NULL;
1016 struct vk_shader *stage_shader[PIPE_SHADER_MESH_TYPES] = { NULL, };
1017 if (pipeline != NULL) {
1018 assert(pipeline->bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
1019 assert(!(pipeline->flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR));
1020 gfx_pipeline = container_of(pipeline, struct vk_graphics_pipeline, base);
1021
1022 for (uint32_t i = 0; i < gfx_pipeline->stage_count; i++) {
1023 struct vk_shader *shader = gfx_pipeline->stages[i].shader;
1024 stage_shader[shader->stage] = shader;
1025 }
1026 }
1027
1028 uint32_t stage_count = 0;
1029 gl_shader_stage stages[ARRAY_SIZE(all_gfx_stages)];
1030 struct vk_shader *shaders[ARRAY_SIZE(all_gfx_stages)];
1031
1032 VkShaderStageFlags vk_stages = 0;
1033 for (uint32_t i = 0; i < ARRAY_SIZE(all_gfx_stages); i++) {
1034 gl_shader_stage stage = all_gfx_stages[i];
1035 if (!vk_device_supports_stage(device, stage)) {
1036 assert(stage_shader[stage] == NULL);
1037 continue;
1038 }
1039
1040 vk_stages |= mesa_to_vk_shader_stage(stage);
1041
1042 stages[stage_count] = stage;
1043 shaders[stage_count] = stage_shader[stage];
1044 stage_count++;
1045 }
1046 ops->cmd_bind_shaders(cmd_buffer, stage_count, stages, shaders);
1047
1048 if (gfx_pipeline != NULL) {
1049 cmd_buffer->pipeline_shader_stages |= vk_stages;
1050 ops->cmd_set_dynamic_graphics_state(cmd_buffer,
1051 &gfx_pipeline->linked.dynamic);
1052 } else {
1053 cmd_buffer->pipeline_shader_stages &= ~vk_stages;
1054 }
1055 }
1056
1057 static VkShaderCreateFlagsEXT
vk_pipeline_to_shader_flags(VkPipelineCreateFlags2KHR pipeline_flags,gl_shader_stage stage)1058 vk_pipeline_to_shader_flags(VkPipelineCreateFlags2KHR pipeline_flags,
1059 gl_shader_stage stage)
1060 {
1061 VkShaderCreateFlagsEXT shader_flags = 0;
1062
1063 if (pipeline_flags & VK_PIPELINE_CREATE_2_CAPTURE_INTERNAL_REPRESENTATIONS_BIT_KHR)
1064 shader_flags |= VK_SHADER_CREATE_CAPTURE_INTERNAL_REPRESENTATIONS_BIT_MESA;
1065
1066 if (stage == MESA_SHADER_FRAGMENT) {
1067 if (pipeline_flags & VK_PIPELINE_CREATE_2_RENDERING_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR)
1068 shader_flags |= VK_SHADER_CREATE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_EXT;
1069
1070 if (pipeline_flags & VK_PIPELINE_CREATE_2_RENDERING_FRAGMENT_DENSITY_MAP_ATTACHMENT_BIT_EXT)
1071 shader_flags |= VK_SHADER_CREATE_FRAGMENT_DENSITY_MAP_ATTACHMENT_BIT_EXT;
1072 }
1073
1074 if (stage == MESA_SHADER_COMPUTE) {
1075 if (pipeline_flags & VK_PIPELINE_CREATE_2_DISPATCH_BASE_BIT_KHR)
1076 shader_flags |= VK_SHADER_CREATE_DISPATCH_BASE_BIT_EXT;
1077 }
1078
1079 return shader_flags;
1080 }
1081
1082 static VkResult
vk_graphics_pipeline_compile_shaders(struct vk_device * device,struct vk_pipeline_cache * cache,struct vk_graphics_pipeline * pipeline,struct vk_pipeline_layout * pipeline_layout,const struct vk_graphics_pipeline_state * state,uint32_t stage_count,struct vk_pipeline_stage * stages,VkPipelineCreationFeedback * stage_feedbacks)1083 vk_graphics_pipeline_compile_shaders(struct vk_device *device,
1084 struct vk_pipeline_cache *cache,
1085 struct vk_graphics_pipeline *pipeline,
1086 struct vk_pipeline_layout *pipeline_layout,
1087 const struct vk_graphics_pipeline_state *state,
1088 uint32_t stage_count,
1089 struct vk_pipeline_stage *stages,
1090 VkPipelineCreationFeedback *stage_feedbacks)
1091 {
1092 const struct vk_device_shader_ops *ops = device->shader_ops;
1093 VkResult result;
1094
1095 if (stage_count == 0)
1096 return VK_SUCCESS;
1097
1098 /* If we're linking, throw away any previously compiled shaders as they
1099 * likely haven't been properly linked. We keep the precompiled shaders
1100 * and we still look it up in the cache so it may still be fast.
1101 */
1102 if (pipeline->base.flags & VK_PIPELINE_CREATE_2_LINK_TIME_OPTIMIZATION_BIT_EXT) {
1103 for (uint32_t i = 0; i < stage_count; i++) {
1104 if (stages[i].shader != NULL) {
1105 vk_shader_unref(device, stages[i].shader);
1106 stages[i].shader = NULL;
1107 }
1108 }
1109 }
1110
1111 bool have_all_shaders = true;
1112 VkShaderStageFlags all_stages = 0;
1113 struct vk_pipeline_precomp_shader *tcs_precomp = NULL, *tes_precomp = NULL;
1114 for (uint32_t i = 0; i < stage_count; i++) {
1115 all_stages |= mesa_to_vk_shader_stage(stages[i].stage);
1116
1117 if (stages[i].shader == NULL)
1118 have_all_shaders = false;
1119
1120 if (stages[i].stage == MESA_SHADER_TESS_CTRL)
1121 tcs_precomp = stages[i].precomp;
1122
1123 if (stages[i].stage == MESA_SHADER_TESS_EVAL)
1124 tes_precomp = stages[i].precomp;
1125 }
1126
1127 /* If we already have a shader for each stage, there's nothing to do. */
1128 if (have_all_shaders)
1129 return VK_SUCCESS;
1130
1131 struct vk_pipeline_tess_info tess_info = { ._pad = 0 };
1132 if (tcs_precomp != NULL && tes_precomp != NULL) {
1133 tess_info = tcs_precomp->tess;
1134 vk_pipeline_tess_info_merge(&tess_info, &tes_precomp->tess);
1135 }
1136
1137 struct mesa_blake3 blake3_ctx;
1138 _mesa_blake3_init(&blake3_ctx);
1139 for (uint32_t i = 0; i < pipeline->set_layout_count; i++) {
1140 if (pipeline->set_layouts[i] != NULL) {
1141 _mesa_blake3_update(&blake3_ctx, pipeline->set_layouts[i]->blake3,
1142 sizeof(pipeline->set_layouts[i]->blake3));
1143 }
1144 }
1145 if (pipeline_layout != NULL) {
1146 _mesa_blake3_update(&blake3_ctx, &pipeline_layout->push_ranges,
1147 sizeof(pipeline_layout->push_ranges[0]) *
1148 pipeline_layout->push_range_count);
1149 }
1150 blake3_hash layout_blake3;
1151 _mesa_blake3_final(&blake3_ctx, layout_blake3);
1152
1153 /* Partition the shaders */
1154 uint32_t part_count;
1155 uint32_t partition[MESA_VK_MAX_GRAPHICS_PIPELINE_STAGES + 1] = { 0 };
1156 if (pipeline->base.flags & VK_PIPELINE_CREATE_2_LINK_TIME_OPTIMIZATION_BIT_EXT) {
1157 partition[1] = stage_count;
1158 part_count = 1;
1159 } else if (ops->link_geom_stages) {
1160 if (stages[0].stage == MESA_SHADER_FRAGMENT) {
1161 assert(stage_count == 1);
1162 partition[1] = stage_count;
1163 part_count = 1;
1164 } else if (stages[stage_count - 1].stage == MESA_SHADER_FRAGMENT) {
1165 /* In this case we have both */
1166 assert(stage_count > 1);
1167 partition[1] = stage_count - 1;
1168 partition[2] = stage_count;
1169 part_count = 2;
1170 } else {
1171 /* In this case we only have geometry */
1172 partition[1] = stage_count;
1173 part_count = 1;
1174 }
1175 } else {
1176 /* Otherwise, we're don't want to link anything */
1177 part_count = stage_count;
1178 for (uint32_t i = 0; i < stage_count; i++)
1179 partition[i + 1] = i + 1;
1180 }
1181
1182 for (uint32_t p = 0; p < part_count; p++) {
1183 const int64_t part_start = os_time_get_nano();
1184
1185 /* Don't try to re-compile any fast-link shaders */
1186 if (!(pipeline->base.flags &
1187 VK_PIPELINE_CREATE_2_LINK_TIME_OPTIMIZATION_BIT_EXT)) {
1188 assert(partition[p + 1] == partition[p] + 1);
1189 if (stages[partition[p]].shader != NULL)
1190 continue;
1191 }
1192
1193 struct vk_shader_pipeline_cache_key shader_key = { 0 };
1194
1195 _mesa_blake3_init(&blake3_ctx);
1196
1197 VkShaderStageFlags part_stages = 0;
1198 for (uint32_t i = partition[p]; i < partition[p + 1]; i++) {
1199 const struct vk_pipeline_stage *stage = &stages[i];
1200
1201 part_stages |= mesa_to_vk_shader_stage(stage->stage);
1202 _mesa_blake3_update(&blake3_ctx, stage->precomp->blake3,
1203 sizeof(stage->precomp->blake3));
1204
1205 VkShaderCreateFlagsEXT shader_flags =
1206 vk_pipeline_to_shader_flags(pipeline->base.flags, stage->stage);
1207 _mesa_blake3_update(&blake3_ctx, &shader_flags, sizeof(shader_flags));
1208 }
1209
1210 blake3_hash state_blake3;
1211 ops->hash_graphics_state(device->physical, state,
1212 part_stages, state_blake3);
1213
1214 _mesa_blake3_update(&blake3_ctx, state_blake3, sizeof(state_blake3));
1215 _mesa_blake3_update(&blake3_ctx, layout_blake3, sizeof(layout_blake3));
1216
1217 if (part_stages & (VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT |
1218 VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT))
1219 _mesa_blake3_update(&blake3_ctx, &tess_info, sizeof(tess_info));
1220
1221 /* The set of geometry stages used together is used to generate the
1222 * nextStage mask as well as VK_SHADER_CREATE_NO_TASK_SHADER_BIT_EXT.
1223 */
1224 const VkShaderStageFlags geom_stages =
1225 all_stages & ~VK_SHADER_STAGE_FRAGMENT_BIT;
1226 _mesa_blake3_update(&blake3_ctx, &geom_stages, sizeof(geom_stages));
1227
1228 _mesa_blake3_final(&blake3_ctx, shader_key.blake3);
1229
1230 if (cache != NULL) {
1231 /* From the Vulkan 1.3.278 spec:
1232 *
1233 * "VK_PIPELINE_CREATION_FEEDBACK_APPLICATION_PIPELINE_CACHE_HIT_BIT
1234 * indicates that a readily usable pipeline or pipeline stage was
1235 * found in the pipelineCache specified by the application in the
1236 * pipeline creation command.
1237 *
1238 * [...]
1239 *
1240 * Note
1241 *
1242 * Implementations are encouraged to provide a meaningful signal
1243 * to applications using this bit. The intention is to communicate
1244 * to the application that the pipeline or pipeline stage was
1245 * created “as fast as it gets” using the pipeline cache provided
1246 * by the application. If an implementation uses an internal
1247 * cache, it is discouraged from setting this bit as the feedback
1248 * would be unactionable."
1249 *
1250 * The cache_hit value returned by vk_pipeline_cache_lookup_object()
1251 * is only set to true when the shader is found in the provided
1252 * pipeline cache. It is left false if we fail to find it in the
1253 * memory cache but find it in the disk cache even though that's
1254 * still a cache hit from the perspective of the compile pipeline.
1255 */
1256 bool all_shaders_found = true;
1257 bool all_cache_hits = true;
1258 for (uint32_t i = partition[p]; i < partition[p + 1]; i++) {
1259 struct vk_pipeline_stage *stage = &stages[i];
1260
1261 shader_key.stage = stage->stage;
1262
1263 if (stage->shader) {
1264 /* If we have a shader from some library pipeline and the key
1265 * matches, just use that.
1266 */
1267 if (memcmp(&stage->shader->pipeline.cache_key,
1268 &shader_key, sizeof(shader_key)) == 0)
1269 continue;
1270
1271 /* Otherwise, throw it away */
1272 vk_shader_unref(device, stage->shader);
1273 stage->shader = NULL;
1274 }
1275
1276 bool cache_hit = false;
1277 struct vk_pipeline_cache_object *cache_obj =
1278 vk_pipeline_cache_lookup_object(cache, &shader_key,
1279 sizeof(shader_key),
1280 &pipeline_shader_cache_ops,
1281 &cache_hit);
1282 if (cache_obj != NULL) {
1283 assert(stage->shader == NULL);
1284 stage->shader = vk_shader_from_cache_obj(cache_obj);
1285 } else {
1286 all_shaders_found = false;
1287 }
1288
1289 if (cache_obj == NULL && !cache_hit)
1290 all_cache_hits = false;
1291 }
1292
1293 if (all_cache_hits && cache != device->mem_cache) {
1294 /* The pipeline cache only really helps if we hit for everything
1295 * in the partition. Otherwise, we have to go re-compile it all
1296 * anyway.
1297 */
1298 for (uint32_t i = partition[p]; i < partition[p + 1]; i++) {
1299 struct vk_pipeline_stage *stage = &stages[i];
1300
1301 stage_feedbacks[stage->stage].flags |=
1302 VK_PIPELINE_CREATION_FEEDBACK_APPLICATION_PIPELINE_CACHE_HIT_BIT;
1303 }
1304 }
1305
1306 if (all_shaders_found) {
1307 /* Update duration to take cache lookups into account */
1308 const int64_t part_end = os_time_get_nano();
1309 for (uint32_t i = partition[p]; i < partition[p + 1]; i++) {
1310 struct vk_pipeline_stage *stage = &stages[i];
1311 stage_feedbacks[stage->stage].duration += part_end - part_start;
1312 }
1313 continue;
1314 }
1315 }
1316
1317 if (pipeline->base.flags &
1318 VK_PIPELINE_CREATE_2_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT_KHR)
1319 return VK_PIPELINE_COMPILE_REQUIRED;
1320
1321 struct vk_shader_compile_info infos[MESA_VK_MAX_GRAPHICS_PIPELINE_STAGES];
1322 for (uint32_t i = partition[p]; i < partition[p + 1]; i++) {
1323 struct vk_pipeline_stage *stage = &stages[i];
1324
1325 VkShaderCreateFlagsEXT shader_flags =
1326 vk_pipeline_to_shader_flags(pipeline->base.flags, stage->stage);
1327
1328 if (partition[p + 1] - partition[p] > 1)
1329 shader_flags |= VK_SHADER_CREATE_LINK_STAGE_BIT_EXT;
1330
1331 if ((part_stages & VK_SHADER_STAGE_MESH_BIT_EXT) &&
1332 !(geom_stages & VK_SHADER_STAGE_TASK_BIT_EXT))
1333 shader_flags = VK_SHADER_CREATE_NO_TASK_SHADER_BIT_EXT;
1334
1335 VkShaderStageFlags next_stage;
1336 if (stage->stage == MESA_SHADER_FRAGMENT) {
1337 next_stage = 0;
1338 } else if (i + 1 < stage_count) {
1339 /* We hash geom_stages above so this is safe */
1340 next_stage = mesa_to_vk_shader_stage(stages[i + 1].stage);
1341 } else {
1342 /* We're the last geometry stage */
1343 next_stage = VK_SHADER_STAGE_FRAGMENT_BIT;
1344 }
1345
1346 const struct nir_shader_compiler_options *nir_options =
1347 ops->get_nir_options(device->physical, stage->stage,
1348 &stage->precomp->rs);
1349
1350 nir_shader *nir =
1351 vk_pipeline_precomp_shader_get_nir(stage->precomp, nir_options);
1352 if (nir == NULL) {
1353 for (uint32_t j = partition[p]; j < i; j++)
1354 ralloc_free(infos[i].nir);
1355
1356 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
1357 }
1358
1359 if (stage->stage == MESA_SHADER_TESS_CTRL ||
1360 stage->stage == MESA_SHADER_TESS_EVAL)
1361 vk_pipeline_replace_nir_tess_info(nir, &tess_info);
1362
1363 const VkPushConstantRange *push_range = NULL;
1364 if (pipeline_layout != NULL) {
1365 for (uint32_t r = 0; r < pipeline_layout->push_range_count; r++) {
1366 if (pipeline_layout->push_ranges[r].stageFlags &
1367 mesa_to_vk_shader_stage(stage->stage)) {
1368 assert(push_range == NULL);
1369 push_range = &pipeline_layout->push_ranges[r];
1370 }
1371 }
1372 }
1373
1374 infos[i] = (struct vk_shader_compile_info) {
1375 .stage = stage->stage,
1376 .flags = shader_flags,
1377 .next_stage_mask = next_stage,
1378 .nir = nir,
1379 .robustness = &stage->precomp->rs,
1380 .set_layout_count = pipeline->set_layout_count,
1381 .set_layouts = pipeline->set_layouts,
1382 .push_constant_range_count = push_range != NULL,
1383 .push_constant_ranges = push_range != NULL ? push_range : NULL,
1384 };
1385 }
1386
1387 /* vk_shader_ops::compile() consumes the NIR regardless of whether or
1388 * not it succeeds and only generates shaders on success. Once this
1389 * returns, we own the shaders but not the NIR in infos.
1390 */
1391 struct vk_shader *shaders[MESA_VK_MAX_GRAPHICS_PIPELINE_STAGES];
1392 result = ops->compile(device, partition[p + 1] - partition[p],
1393 &infos[partition[p]],
1394 state,
1395 &device->alloc,
1396 &shaders[partition[p]]);
1397 if (result != VK_SUCCESS)
1398 return result;
1399
1400 const int64_t part_end = os_time_get_nano();
1401 for (uint32_t i = partition[p]; i < partition[p + 1]; i++) {
1402 struct vk_pipeline_stage *stage = &stages[i];
1403
1404 shader_key.stage = stage->stage;
1405 vk_shader_init_cache_obj(device, shaders[i], &shader_key,
1406 sizeof(shader_key));
1407
1408 if (stage->shader == NULL) {
1409 struct vk_pipeline_cache_object *cache_obj =
1410 &shaders[i]->pipeline.cache_obj;
1411 if (cache != NULL)
1412 cache_obj = vk_pipeline_cache_add_object(cache, cache_obj);
1413
1414 stage->shader = vk_shader_from_cache_obj(cache_obj);
1415 } else {
1416 /* This can fail to happen if only some of the shaders were found
1417 * in the pipeline cache. In this case, we just throw away the
1418 * shader as vk_pipeline_cache_add_object() would throw it away
1419 * for us anyway.
1420 */
1421 assert(memcmp(&stage->shader->pipeline.cache_key,
1422 &shaders[i]->pipeline.cache_key,
1423 sizeof(shaders[i]->pipeline.cache_key)) == 0);
1424
1425 vk_shader_unref(device, shaders[i]);
1426 }
1427
1428 stage_feedbacks[stage->stage].duration += part_end - part_start;
1429 }
1430 }
1431
1432 return VK_SUCCESS;
1433 }
1434
1435 static VkResult
vk_graphics_pipeline_get_executable_properties(struct vk_device * device,struct vk_pipeline * pipeline,uint32_t * executable_count,VkPipelineExecutablePropertiesKHR * properties)1436 vk_graphics_pipeline_get_executable_properties(
1437 struct vk_device *device,
1438 struct vk_pipeline *pipeline,
1439 uint32_t *executable_count,
1440 VkPipelineExecutablePropertiesKHR *properties)
1441 {
1442 struct vk_graphics_pipeline *gfx_pipeline =
1443 container_of(pipeline, struct vk_graphics_pipeline, base);
1444 VkResult result;
1445
1446 if (properties == NULL) {
1447 *executable_count = 0;
1448 for (uint32_t i = 0; i < gfx_pipeline->stage_count; i++) {
1449 struct vk_shader *shader = gfx_pipeline->stages[i].shader;
1450
1451 uint32_t shader_exec_count = 0;
1452 result = shader->ops->get_executable_properties(device, shader,
1453 &shader_exec_count,
1454 NULL);
1455 assert(result == VK_SUCCESS);
1456 *executable_count += shader_exec_count;
1457 }
1458 } else {
1459 uint32_t arr_len = *executable_count;
1460 *executable_count = 0;
1461 for (uint32_t i = 0; i < gfx_pipeline->stage_count; i++) {
1462 struct vk_shader *shader = gfx_pipeline->stages[i].shader;
1463
1464 uint32_t shader_exec_count = arr_len - *executable_count;
1465 result = shader->ops->get_executable_properties(device, shader,
1466 &shader_exec_count,
1467 &properties[*executable_count]);
1468 if (result != VK_SUCCESS)
1469 return result;
1470
1471 *executable_count += shader_exec_count;
1472 }
1473 }
1474
1475 return VK_SUCCESS;
1476 }
1477
1478 static inline struct vk_shader *
vk_graphics_pipeline_executable_shader(struct vk_device * device,struct vk_graphics_pipeline * gfx_pipeline,uint32_t * executable_index)1479 vk_graphics_pipeline_executable_shader(struct vk_device *device,
1480 struct vk_graphics_pipeline *gfx_pipeline,
1481 uint32_t *executable_index)
1482 {
1483 for (uint32_t i = 0; i < gfx_pipeline->stage_count; i++) {
1484 struct vk_shader *shader = gfx_pipeline->stages[i].shader;
1485
1486 uint32_t shader_exec_count = 0;
1487 shader->ops->get_executable_properties(device, shader,
1488 &shader_exec_count, NULL);
1489
1490 if (*executable_index < shader_exec_count)
1491 return shader;
1492 else
1493 *executable_index -= shader_exec_count;
1494 }
1495
1496 return NULL;
1497 }
1498
1499 static VkResult
vk_graphics_pipeline_get_executable_statistics(struct vk_device * device,struct vk_pipeline * pipeline,uint32_t executable_index,uint32_t * statistic_count,VkPipelineExecutableStatisticKHR * statistics)1500 vk_graphics_pipeline_get_executable_statistics(
1501 struct vk_device *device,
1502 struct vk_pipeline *pipeline,
1503 uint32_t executable_index,
1504 uint32_t *statistic_count,
1505 VkPipelineExecutableStatisticKHR *statistics)
1506 {
1507 struct vk_graphics_pipeline *gfx_pipeline =
1508 container_of(pipeline, struct vk_graphics_pipeline, base);
1509
1510 struct vk_shader *shader =
1511 vk_graphics_pipeline_executable_shader(device, gfx_pipeline,
1512 &executable_index);
1513 if (shader == NULL) {
1514 *statistic_count = 0;
1515 return VK_SUCCESS;
1516 }
1517
1518 return shader->ops->get_executable_statistics(device, shader,
1519 executable_index,
1520 statistic_count,
1521 statistics);
1522 }
1523
1524 static VkResult
vk_graphics_pipeline_get_internal_representations(struct vk_device * device,struct vk_pipeline * pipeline,uint32_t executable_index,uint32_t * internal_representation_count,VkPipelineExecutableInternalRepresentationKHR * internal_representations)1525 vk_graphics_pipeline_get_internal_representations(
1526 struct vk_device *device,
1527 struct vk_pipeline *pipeline,
1528 uint32_t executable_index,
1529 uint32_t *internal_representation_count,
1530 VkPipelineExecutableInternalRepresentationKHR* internal_representations)
1531 {
1532 struct vk_graphics_pipeline *gfx_pipeline =
1533 container_of(pipeline, struct vk_graphics_pipeline, base);
1534
1535 struct vk_shader *shader =
1536 vk_graphics_pipeline_executable_shader(device, gfx_pipeline,
1537 &executable_index);
1538 if (shader == NULL) {
1539 *internal_representation_count = 0;
1540 return VK_SUCCESS;
1541 }
1542
1543 return shader->ops->get_executable_internal_representations(
1544 device, shader, executable_index,
1545 internal_representation_count, internal_representations);
1546 }
1547
1548 static const struct vk_pipeline_ops vk_graphics_pipeline_ops = {
1549 .destroy = vk_graphics_pipeline_destroy,
1550 .get_executable_statistics = vk_graphics_pipeline_get_executable_statistics,
1551 .get_executable_properties = vk_graphics_pipeline_get_executable_properties,
1552 .get_internal_representations = vk_graphics_pipeline_get_internal_representations,
1553 .cmd_bind = vk_graphics_pipeline_cmd_bind,
1554 };
1555
1556 static VkResult
vk_create_graphics_pipeline(struct vk_device * device,struct vk_pipeline_cache * cache,const VkGraphicsPipelineCreateInfo * pCreateInfo,const VkAllocationCallbacks * pAllocator,VkPipeline * pPipeline)1557 vk_create_graphics_pipeline(struct vk_device *device,
1558 struct vk_pipeline_cache *cache,
1559 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1560 const VkAllocationCallbacks *pAllocator,
1561 VkPipeline *pPipeline)
1562 {
1563 VK_FROM_HANDLE(vk_pipeline_layout, pipeline_layout, pCreateInfo->layout);
1564 const int64_t pipeline_start = os_time_get_nano();
1565 VkResult result;
1566
1567 const VkPipelineCreateFlags2KHR pipeline_flags =
1568 vk_graphics_pipeline_create_flags(pCreateInfo);
1569
1570 const VkPipelineCreationFeedbackCreateInfo *feedback_info =
1571 vk_find_struct_const(pCreateInfo->pNext,
1572 PIPELINE_CREATION_FEEDBACK_CREATE_INFO);
1573
1574 const VkPipelineLibraryCreateInfoKHR *libs_info =
1575 vk_find_struct_const(pCreateInfo->pNext,
1576 PIPELINE_LIBRARY_CREATE_INFO_KHR);
1577
1578 struct vk_graphics_pipeline *pipeline =
1579 vk_pipeline_zalloc(device, &vk_graphics_pipeline_ops,
1580 VK_PIPELINE_BIND_POINT_GRAPHICS,
1581 pipeline_flags, pAllocator, sizeof(*pipeline));
1582 if (pipeline == NULL)
1583 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
1584
1585 struct vk_pipeline_stage stages[PIPE_SHADER_MESH_TYPES];
1586 memset(stages, 0, sizeof(stages));
1587
1588 VkPipelineCreationFeedback stage_feedbacks[PIPE_SHADER_MESH_TYPES];
1589 memset(stage_feedbacks, 0, sizeof(stage_feedbacks));
1590
1591 struct vk_graphics_pipeline_state state_tmp, *state;
1592 struct vk_graphics_pipeline_all_state all_state_tmp, *all_state;
1593 if (pipeline->base.flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR) {
1594 /* For pipeline libraries, the state is stored in the pipeline */
1595 state = &pipeline->lib.state;
1596 all_state = &pipeline->lib.all_state;
1597 } else {
1598 /* For linked pipelines, we throw the state away at the end of pipeline
1599 * creation and only keep the dynamic state.
1600 */
1601 memset(&state_tmp, 0, sizeof(state_tmp));
1602 state = &state_tmp;
1603 all_state = &all_state_tmp;
1604 }
1605
1606 /* If we have libraries, import them first. */
1607 if (libs_info) {
1608 for (uint32_t i = 0; i < libs_info->libraryCount; i++) {
1609 VK_FROM_HANDLE(vk_pipeline, lib_pipeline, libs_info->pLibraries[i]);
1610 assert(lib_pipeline->bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
1611 assert(lib_pipeline->flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR);
1612 struct vk_graphics_pipeline *lib_gfx_pipeline =
1613 container_of(lib_pipeline, struct vk_graphics_pipeline, base);
1614
1615 vk_graphics_pipeline_state_merge(state, &lib_gfx_pipeline->lib.state);
1616
1617 pipeline->set_layout_count = MAX2(pipeline->set_layout_count,
1618 lib_gfx_pipeline->set_layout_count);
1619 for (uint32_t i = 0; i < lib_gfx_pipeline->set_layout_count; i++) {
1620 if (lib_gfx_pipeline->set_layouts[i] == NULL)
1621 continue;
1622
1623 if (pipeline->set_layouts[i] == NULL) {
1624 pipeline->set_layouts[i] =
1625 vk_descriptor_set_layout_ref(lib_gfx_pipeline->set_layouts[i]);
1626 }
1627 }
1628
1629 for (uint32_t i = 0; i < lib_gfx_pipeline->stage_count; i++) {
1630 const struct vk_pipeline_stage *lib_stage =
1631 &lib_gfx_pipeline->stages[i];
1632
1633 /* We shouldn't have duplicated stages in the imported pipeline
1634 * but it's cheap enough to protect against it so we may as well.
1635 */
1636 assert(lib_stage->stage < ARRAY_SIZE(stages));
1637 assert(vk_pipeline_stage_is_null(&stages[lib_stage->stage]));
1638 if (!vk_pipeline_stage_is_null(&stages[lib_stage->stage]))
1639 continue;
1640
1641 stages[lib_stage->stage] = vk_pipeline_stage_clone(lib_stage);
1642 }
1643 }
1644 }
1645
1646 result = vk_graphics_pipeline_state_fill(device, state,
1647 pCreateInfo,
1648 NULL /* driver_rp */,
1649 0 /* driver_rp_flags */,
1650 all_state,
1651 NULL, 0, NULL);
1652 if (result != VK_SUCCESS)
1653 goto fail_stages;
1654
1655 if (!(pipeline->base.flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR)) {
1656 pipeline->linked.dynamic.vi = &pipeline->linked._dynamic_vi;
1657 pipeline->linked.dynamic.ms.sample_locations =
1658 &pipeline->linked._dynamic_sl;
1659 vk_dynamic_graphics_state_fill(&pipeline->linked.dynamic, &state_tmp);
1660 }
1661
1662 if (pipeline_layout != NULL) {
1663 pipeline->set_layout_count = MAX2(pipeline->set_layout_count,
1664 pipeline_layout->set_count);
1665 for (uint32_t i = 0; i < pipeline_layout->set_count; i++) {
1666 if (pipeline_layout->set_layouts[i] == NULL)
1667 continue;
1668
1669 if (pipeline->set_layouts[i] == NULL) {
1670 pipeline->set_layouts[i] =
1671 vk_descriptor_set_layout_ref(pipeline_layout->set_layouts[i]);
1672 }
1673 }
1674 }
1675
1676 for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) {
1677 const VkPipelineShaderStageCreateInfo *stage_info =
1678 &pCreateInfo->pStages[i];
1679
1680 const int64_t stage_start = os_time_get_nano();
1681
1682 assert(util_bitcount(stage_info->stage) == 1);
1683 if (!(state->shader_stages & stage_info->stage))
1684 continue;
1685
1686 gl_shader_stage stage = vk_to_mesa_shader_stage(stage_info->stage);
1687 assert(vk_device_supports_stage(device, stage));
1688
1689 stage_feedbacks[stage].flags |=
1690 VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT;
1691
1692 if (!vk_pipeline_stage_is_null(&stages[stage]))
1693 continue;
1694
1695 struct vk_pipeline_precomp_shader *precomp;
1696 result = vk_pipeline_precompile_shader(device, cache, pipeline_flags,
1697 pCreateInfo->pNext,
1698 stage_info,
1699 &precomp);
1700 if (result != VK_SUCCESS)
1701 goto fail_stages;
1702
1703 stages[stage] = (struct vk_pipeline_stage) {
1704 .stage = stage,
1705 .precomp = precomp,
1706 };
1707
1708 const int64_t stage_end = os_time_get_nano();
1709 stage_feedbacks[stage].duration += stage_end - stage_start;
1710 }
1711
1712 /* Compact the array of stages */
1713 uint32_t stage_count = 0;
1714 for (uint32_t s = 0; s < ARRAY_SIZE(stages); s++) {
1715 assert(s >= stage_count);
1716 if (!vk_pipeline_stage_is_null(&stages[s]))
1717 stages[stage_count++] = stages[s];
1718 }
1719 for (uint32_t s = stage_count; s < ARRAY_SIZE(stages); s++)
1720 memset(&stages[s], 0, sizeof(stages[s]));
1721
1722 /* Sort so we always give the driver shaders in order.
1723 *
1724 * This makes everything easier for everyone. This also helps stabilize
1725 * shader keys so that we get a cache hit even if the client gives us
1726 * the stages in a different order.
1727 */
1728 qsort(stages, stage_count, sizeof(*stages), cmp_vk_pipeline_stages);
1729
1730 result = vk_graphics_pipeline_compile_shaders(device, cache, pipeline,
1731 pipeline_layout, state,
1732 stage_count, stages,
1733 stage_feedbacks);
1734 if (result != VK_SUCCESS)
1735 goto fail_stages;
1736
1737 /* Throw away precompiled shaders unless the client explicitly asks us to
1738 * keep them.
1739 */
1740 if (!(pipeline_flags &
1741 VK_PIPELINE_CREATE_2_RETAIN_LINK_TIME_OPTIMIZATION_INFO_BIT_EXT)) {
1742 for (uint32_t i = 0; i < stage_count; i++) {
1743 if (stages[i].precomp != NULL) {
1744 vk_pipeline_precomp_shader_unref(device, stages[i].precomp);
1745 stages[i].precomp = NULL;
1746 }
1747 }
1748 }
1749
1750 pipeline->stage_count = stage_count;
1751 for (uint32_t i = 0; i < stage_count; i++)
1752 pipeline->stages[i] = stages[i];
1753
1754 const int64_t pipeline_end = os_time_get_nano();
1755 if (feedback_info != NULL) {
1756 VkPipelineCreationFeedback pipeline_feedback = {
1757 .flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT,
1758 .duration = pipeline_end - pipeline_start,
1759 };
1760
1761 /* From the Vulkan 1.3.275 spec:
1762 *
1763 * "An implementation should set the
1764 * VK_PIPELINE_CREATION_FEEDBACK_APPLICATION_PIPELINE_CACHE_HIT_BIT
1765 * bit if it was able to avoid the large majority of pipeline or
1766 * pipeline stage creation work by using the pipelineCache parameter"
1767 *
1768 * We really shouldn't set this bit unless all the shaders hit the
1769 * cache.
1770 */
1771 uint32_t cache_hit_count = 0;
1772 for (uint32_t i = 0; i < stage_count; i++) {
1773 const gl_shader_stage stage = stages[i].stage;
1774 if (stage_feedbacks[stage].flags &
1775 VK_PIPELINE_CREATION_FEEDBACK_APPLICATION_PIPELINE_CACHE_HIT_BIT)
1776 cache_hit_count++;
1777 }
1778 if (cache_hit_count > 0 && cache_hit_count == stage_count) {
1779 pipeline_feedback.flags |=
1780 VK_PIPELINE_CREATION_FEEDBACK_APPLICATION_PIPELINE_CACHE_HIT_BIT;
1781 }
1782
1783 *feedback_info->pPipelineCreationFeedback = pipeline_feedback;
1784
1785 /* VUID-VkGraphicsPipelineCreateInfo-pipelineStageCreationFeedbackCount-06594 */
1786 assert(feedback_info->pipelineStageCreationFeedbackCount == 0 ||
1787 feedback_info->pipelineStageCreationFeedbackCount ==
1788 pCreateInfo->stageCount);
1789 for (uint32_t i = 0;
1790 i < feedback_info->pipelineStageCreationFeedbackCount; i++) {
1791 const gl_shader_stage stage =
1792 vk_to_mesa_shader_stage(pCreateInfo->pStages[i].stage);
1793
1794 feedback_info->pPipelineStageCreationFeedbacks[i] =
1795 stage_feedbacks[stage];
1796 }
1797 }
1798
1799 *pPipeline = vk_pipeline_to_handle(&pipeline->base);
1800
1801 return VK_SUCCESS;
1802
1803 fail_stages:
1804 for (uint32_t i = 0; i < ARRAY_SIZE(stages); i++)
1805 vk_pipeline_stage_finish(device, &stages[i]);
1806
1807 vk_graphics_pipeline_destroy(device, &pipeline->base, pAllocator);
1808
1809 return result;
1810 }
1811
1812 VKAPI_ATTR VkResult VKAPI_CALL
vk_common_CreateGraphicsPipelines(VkDevice _device,VkPipelineCache pipelineCache,uint32_t createInfoCount,const VkGraphicsPipelineCreateInfo * pCreateInfos,const VkAllocationCallbacks * pAllocator,VkPipeline * pPipelines)1813 vk_common_CreateGraphicsPipelines(VkDevice _device,
1814 VkPipelineCache pipelineCache,
1815 uint32_t createInfoCount,
1816 const VkGraphicsPipelineCreateInfo *pCreateInfos,
1817 const VkAllocationCallbacks *pAllocator,
1818 VkPipeline *pPipelines)
1819 {
1820 VK_FROM_HANDLE(vk_device, device, _device);
1821 VK_FROM_HANDLE(vk_pipeline_cache, cache, pipelineCache);
1822 VkResult first_error_or_success = VK_SUCCESS;
1823
1824 /* Use implicit pipeline cache if there's no cache set */
1825 if (!cache && device->mem_cache)
1826 cache = device->mem_cache;
1827
1828 /* From the Vulkan 1.3.274 spec:
1829 *
1830 * "When attempting to create many pipelines in a single command, it is
1831 * possible that creation may fail for a subset of them. In this case,
1832 * the corresponding elements of pPipelines will be set to
1833 * VK_NULL_HANDLE.
1834 */
1835 memset(pPipelines, 0, createInfoCount * sizeof(*pPipelines));
1836
1837 unsigned i = 0;
1838 for (; i < createInfoCount; i++) {
1839 VkResult result = vk_create_graphics_pipeline(device, cache,
1840 &pCreateInfos[i],
1841 pAllocator,
1842 &pPipelines[i]);
1843 if (result == VK_SUCCESS)
1844 continue;
1845
1846 if (first_error_or_success == VK_SUCCESS)
1847 first_error_or_success = result;
1848
1849 /* Bail out on the first error != VK_PIPELINE_COMPILE_REQUIRED as it
1850 * is not obvious what error should be report upon 2 different failures.
1851 */
1852 if (result != VK_PIPELINE_COMPILE_REQUIRED)
1853 return result;
1854
1855 const VkPipelineCreateFlags2KHR flags =
1856 vk_graphics_pipeline_create_flags(&pCreateInfos[i]);
1857 if (flags & VK_PIPELINE_CREATE_2_EARLY_RETURN_ON_FAILURE_BIT_KHR)
1858 return result;
1859 }
1860
1861 return first_error_or_success;
1862 }
1863
1864 struct vk_compute_pipeline {
1865 struct vk_pipeline base;
1866 struct vk_shader *shader;
1867 };
1868
1869 static void
vk_compute_pipeline_destroy(struct vk_device * device,struct vk_pipeline * pipeline,const VkAllocationCallbacks * pAllocator)1870 vk_compute_pipeline_destroy(struct vk_device *device,
1871 struct vk_pipeline *pipeline,
1872 const VkAllocationCallbacks *pAllocator)
1873 {
1874 struct vk_compute_pipeline *comp_pipeline =
1875 container_of(pipeline, struct vk_compute_pipeline, base);
1876
1877 vk_shader_unref(device, comp_pipeline->shader);
1878 vk_pipeline_free(device, pAllocator, pipeline);
1879 }
1880
1881 static void
vk_compute_pipeline_cmd_bind(struct vk_command_buffer * cmd_buffer,struct vk_pipeline * pipeline)1882 vk_compute_pipeline_cmd_bind(struct vk_command_buffer *cmd_buffer,
1883 struct vk_pipeline *pipeline)
1884 {
1885 struct vk_device *device = cmd_buffer->base.device;
1886 const struct vk_device_shader_ops *ops = device->shader_ops;
1887
1888 struct vk_shader *shader = NULL;
1889 if (pipeline != NULL) {
1890 assert(pipeline->bind_point == VK_PIPELINE_BIND_POINT_COMPUTE);
1891 struct vk_compute_pipeline *comp_pipeline =
1892 container_of(pipeline, struct vk_compute_pipeline, base);
1893
1894 shader = comp_pipeline->shader;
1895
1896 cmd_buffer->pipeline_shader_stages |= VK_SHADER_STAGE_COMPUTE_BIT;
1897 } else {
1898 cmd_buffer->pipeline_shader_stages &= ~VK_SHADER_STAGE_COMPUTE_BIT;
1899 }
1900
1901 gl_shader_stage stage = MESA_SHADER_COMPUTE;
1902 ops->cmd_bind_shaders(cmd_buffer, 1, &stage, &shader);
1903 }
1904
1905 static VkResult
vk_pipeline_compile_compute_stage(struct vk_device * device,struct vk_pipeline_cache * cache,struct vk_compute_pipeline * pipeline,struct vk_pipeline_layout * pipeline_layout,struct vk_pipeline_stage * stage,bool * cache_hit)1906 vk_pipeline_compile_compute_stage(struct vk_device *device,
1907 struct vk_pipeline_cache *cache,
1908 struct vk_compute_pipeline *pipeline,
1909 struct vk_pipeline_layout *pipeline_layout,
1910 struct vk_pipeline_stage *stage,
1911 bool *cache_hit)
1912 {
1913 const struct vk_device_shader_ops *ops = device->shader_ops;
1914 VkResult result;
1915
1916 const VkPushConstantRange *push_range = NULL;
1917 if (pipeline_layout != NULL) {
1918 for (uint32_t r = 0; r < pipeline_layout->push_range_count; r++) {
1919 if (pipeline_layout->push_ranges[r].stageFlags &
1920 VK_SHADER_STAGE_COMPUTE_BIT) {
1921 assert(push_range == NULL);
1922 push_range = &pipeline_layout->push_ranges[r];
1923 }
1924 }
1925 }
1926
1927 VkShaderCreateFlagsEXT shader_flags =
1928 vk_pipeline_to_shader_flags(pipeline->base.flags, MESA_SHADER_COMPUTE);
1929
1930 struct mesa_blake3 blake3_ctx;
1931 _mesa_blake3_init(&blake3_ctx);
1932
1933 _mesa_blake3_update(&blake3_ctx, stage->precomp->blake3,
1934 sizeof(stage->precomp->blake3));
1935
1936 _mesa_blake3_update(&blake3_ctx, &shader_flags, sizeof(shader_flags));
1937
1938 for (uint32_t i = 0; i < pipeline_layout->set_count; i++) {
1939 if (pipeline_layout->set_layouts[i] != NULL) {
1940 _mesa_blake3_update(&blake3_ctx,
1941 pipeline_layout->set_layouts[i]->blake3,
1942 sizeof(pipeline_layout->set_layouts[i]->blake3));
1943 }
1944 }
1945 if (push_range != NULL)
1946 _mesa_blake3_update(&blake3_ctx, push_range, sizeof(*push_range));
1947
1948 struct vk_shader_pipeline_cache_key shader_key = {
1949 .stage = MESA_SHADER_COMPUTE,
1950 };
1951 _mesa_blake3_final(&blake3_ctx, shader_key.blake3);
1952
1953 if (cache != NULL) {
1954 struct vk_pipeline_cache_object *cache_obj =
1955 vk_pipeline_cache_lookup_object(cache, &shader_key,
1956 sizeof(shader_key),
1957 &pipeline_shader_cache_ops,
1958 cache_hit);
1959 if (cache_obj != NULL) {
1960 stage->shader = vk_shader_from_cache_obj(cache_obj);
1961 return VK_SUCCESS;
1962 }
1963 }
1964
1965 if (pipeline->base.flags &
1966 VK_PIPELINE_CREATE_2_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT_KHR)
1967 return VK_PIPELINE_COMPILE_REQUIRED;
1968
1969 const struct nir_shader_compiler_options *nir_options =
1970 ops->get_nir_options(device->physical, stage->stage,
1971 &stage->precomp->rs);
1972
1973 nir_shader *nir = vk_pipeline_precomp_shader_get_nir(stage->precomp,
1974 nir_options);
1975 if (nir == NULL)
1976 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
1977
1978 /* vk_device_shader_ops::compile() consumes the NIR regardless of whether
1979 * or not it succeeds and only generates shaders on success. Once compile()
1980 * returns, we own the shaders but not the NIR in infos.
1981 */
1982 struct vk_shader_compile_info compile_info = {
1983 .stage = stage->stage,
1984 .flags = shader_flags,
1985 .next_stage_mask = 0,
1986 .nir = nir,
1987 .robustness = &stage->precomp->rs,
1988 .set_layout_count = pipeline_layout->set_count,
1989 .set_layouts = pipeline_layout->set_layouts,
1990 .push_constant_range_count = push_range != NULL,
1991 .push_constant_ranges = push_range != NULL ? push_range : NULL,
1992 };
1993
1994 struct vk_shader *shader;
1995 result = ops->compile(device, 1, &compile_info, NULL,
1996 &device->alloc, &shader);
1997 if (result != VK_SUCCESS)
1998 return result;
1999
2000 vk_shader_init_cache_obj(device, shader, &shader_key, sizeof(shader_key));
2001
2002 struct vk_pipeline_cache_object *cache_obj = &shader->pipeline.cache_obj;
2003 if (cache != NULL)
2004 cache_obj = vk_pipeline_cache_add_object(cache, cache_obj);
2005
2006 stage->shader = vk_shader_from_cache_obj(cache_obj);
2007
2008 return VK_SUCCESS;
2009 }
2010
2011 static VkResult
vk_compute_pipeline_get_executable_properties(struct vk_device * device,struct vk_pipeline * pipeline,uint32_t * executable_count,VkPipelineExecutablePropertiesKHR * properties)2012 vk_compute_pipeline_get_executable_properties(
2013 struct vk_device *device,
2014 struct vk_pipeline *pipeline,
2015 uint32_t *executable_count,
2016 VkPipelineExecutablePropertiesKHR *properties)
2017 {
2018 struct vk_compute_pipeline *comp_pipeline =
2019 container_of(pipeline, struct vk_compute_pipeline, base);
2020 struct vk_shader *shader = comp_pipeline->shader;
2021
2022 return shader->ops->get_executable_properties(device, shader,
2023 executable_count,
2024 properties);
2025 }
2026
2027 static VkResult
vk_compute_pipeline_get_executable_statistics(struct vk_device * device,struct vk_pipeline * pipeline,uint32_t executable_index,uint32_t * statistic_count,VkPipelineExecutableStatisticKHR * statistics)2028 vk_compute_pipeline_get_executable_statistics(
2029 struct vk_device *device,
2030 struct vk_pipeline *pipeline,
2031 uint32_t executable_index,
2032 uint32_t *statistic_count,
2033 VkPipelineExecutableStatisticKHR *statistics)
2034 {
2035 struct vk_compute_pipeline *comp_pipeline =
2036 container_of(pipeline, struct vk_compute_pipeline, base);
2037 struct vk_shader *shader = comp_pipeline->shader;
2038
2039 return shader->ops->get_executable_statistics(device, shader,
2040 executable_index,
2041 statistic_count,
2042 statistics);
2043 }
2044
2045 static VkResult
vk_compute_pipeline_get_internal_representations(struct vk_device * device,struct vk_pipeline * pipeline,uint32_t executable_index,uint32_t * internal_representation_count,VkPipelineExecutableInternalRepresentationKHR * internal_representations)2046 vk_compute_pipeline_get_internal_representations(
2047 struct vk_device *device,
2048 struct vk_pipeline *pipeline,
2049 uint32_t executable_index,
2050 uint32_t *internal_representation_count,
2051 VkPipelineExecutableInternalRepresentationKHR* internal_representations)
2052 {
2053 struct vk_compute_pipeline *comp_pipeline =
2054 container_of(pipeline, struct vk_compute_pipeline, base);
2055 struct vk_shader *shader = comp_pipeline->shader;
2056
2057 return shader->ops->get_executable_internal_representations(
2058 device, shader, executable_index,
2059 internal_representation_count, internal_representations);
2060 }
2061
2062 static const struct vk_pipeline_ops vk_compute_pipeline_ops = {
2063 .destroy = vk_compute_pipeline_destroy,
2064 .get_executable_statistics = vk_compute_pipeline_get_executable_statistics,
2065 .get_executable_properties = vk_compute_pipeline_get_executable_properties,
2066 .get_internal_representations = vk_compute_pipeline_get_internal_representations,
2067 .cmd_bind = vk_compute_pipeline_cmd_bind,
2068 };
2069
2070 static VkResult
vk_create_compute_pipeline(struct vk_device * device,struct vk_pipeline_cache * cache,const VkComputePipelineCreateInfo * pCreateInfo,const VkAllocationCallbacks * pAllocator,VkPipeline * pPipeline)2071 vk_create_compute_pipeline(struct vk_device *device,
2072 struct vk_pipeline_cache *cache,
2073 const VkComputePipelineCreateInfo *pCreateInfo,
2074 const VkAllocationCallbacks *pAllocator,
2075 VkPipeline *pPipeline)
2076 {
2077 VK_FROM_HANDLE(vk_pipeline_layout, pipeline_layout, pCreateInfo->layout);
2078 int64_t pipeline_start = os_time_get_nano();
2079 VkResult result;
2080
2081 const VkPipelineCreateFlags2KHR pipeline_flags =
2082 vk_compute_pipeline_create_flags(pCreateInfo);
2083
2084 const VkPipelineCreationFeedbackCreateInfo *feedback_info =
2085 vk_find_struct_const(pCreateInfo->pNext,
2086 PIPELINE_CREATION_FEEDBACK_CREATE_INFO);
2087
2088 struct vk_compute_pipeline *pipeline =
2089 vk_pipeline_zalloc(device, &vk_compute_pipeline_ops,
2090 VK_PIPELINE_BIND_POINT_COMPUTE,
2091 pipeline_flags, pAllocator, sizeof(*pipeline));
2092 if (pipeline == NULL)
2093 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
2094
2095 struct vk_pipeline_stage stage = {
2096 .stage = MESA_SHADER_COMPUTE,
2097 };
2098 result = vk_pipeline_precompile_shader(device, cache, pipeline_flags,
2099 pCreateInfo->pNext,
2100 &pCreateInfo->stage,
2101 &stage.precomp);
2102 if (result != VK_SUCCESS)
2103 goto fail_pipeline;
2104
2105 bool cache_hit;
2106 result = vk_pipeline_compile_compute_stage(device, cache, pipeline,
2107 pipeline_layout, &stage,
2108 &cache_hit);
2109 if (result != VK_SUCCESS)
2110 goto fail_stage;
2111
2112 if (stage.precomp != NULL)
2113 vk_pipeline_precomp_shader_unref(device, stage.precomp);
2114 pipeline->shader = stage.shader;
2115
2116 const int64_t pipeline_end = os_time_get_nano();
2117 if (feedback_info != NULL) {
2118 VkPipelineCreationFeedback pipeline_feedback = {
2119 .flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT,
2120 .duration = pipeline_end - pipeline_start,
2121 };
2122 if (cache_hit && cache != device->mem_cache) {
2123 pipeline_feedback.flags |=
2124 VK_PIPELINE_CREATION_FEEDBACK_APPLICATION_PIPELINE_CACHE_HIT_BIT;
2125 }
2126
2127 *feedback_info->pPipelineCreationFeedback = pipeline_feedback;
2128 if (feedback_info->pipelineStageCreationFeedbackCount > 0) {
2129 feedback_info->pPipelineStageCreationFeedbacks[0] =
2130 pipeline_feedback;
2131 }
2132 }
2133
2134 *pPipeline = vk_pipeline_to_handle(&pipeline->base);
2135
2136 return VK_SUCCESS;
2137
2138 fail_stage:
2139 vk_pipeline_stage_finish(device, &stage);
2140 fail_pipeline:
2141 vk_pipeline_free(device, pAllocator, &pipeline->base);
2142
2143 return result;
2144 }
2145
2146 VKAPI_ATTR VkResult VKAPI_CALL
vk_common_CreateComputePipelines(VkDevice _device,VkPipelineCache pipelineCache,uint32_t createInfoCount,const VkComputePipelineCreateInfo * pCreateInfos,const VkAllocationCallbacks * pAllocator,VkPipeline * pPipelines)2147 vk_common_CreateComputePipelines(VkDevice _device,
2148 VkPipelineCache pipelineCache,
2149 uint32_t createInfoCount,
2150 const VkComputePipelineCreateInfo *pCreateInfos,
2151 const VkAllocationCallbacks *pAllocator,
2152 VkPipeline *pPipelines)
2153 {
2154 VK_FROM_HANDLE(vk_device, device, _device);
2155 VK_FROM_HANDLE(vk_pipeline_cache, cache, pipelineCache);
2156 VkResult first_error_or_success = VK_SUCCESS;
2157
2158 /* Use implicit pipeline cache if there's no cache set */
2159 if (!cache && device->mem_cache)
2160 cache = device->mem_cache;
2161
2162 /* From the Vulkan 1.3.274 spec:
2163 *
2164 * "When attempting to create many pipelines in a single command, it is
2165 * possible that creation may fail for a subset of them. In this case,
2166 * the corresponding elements of pPipelines will be set to
2167 * VK_NULL_HANDLE.
2168 */
2169 memset(pPipelines, 0, createInfoCount * sizeof(*pPipelines));
2170
2171 unsigned i = 0;
2172 for (; i < createInfoCount; i++) {
2173 VkResult result = vk_create_compute_pipeline(device, cache,
2174 &pCreateInfos[i],
2175 pAllocator,
2176 &pPipelines[i]);
2177 if (result == VK_SUCCESS)
2178 continue;
2179
2180 if (first_error_or_success == VK_SUCCESS)
2181 first_error_or_success = result;
2182
2183 /* Bail out on the first error != VK_PIPELINE_COMPILE_REQUIRED as it
2184 * is not obvious what error should be report upon 2 different failures.
2185 */
2186 if (result != VK_PIPELINE_COMPILE_REQUIRED)
2187 return result;
2188
2189 const VkPipelineCreateFlags2KHR flags =
2190 vk_compute_pipeline_create_flags(&pCreateInfos[i]);
2191 if (flags & VK_PIPELINE_CREATE_2_EARLY_RETURN_ON_FAILURE_BIT_KHR)
2192 return result;
2193 }
2194
2195 return first_error_or_success;
2196 }
2197
2198 void
vk_cmd_unbind_pipelines_for_stages(struct vk_command_buffer * cmd_buffer,VkShaderStageFlags stages)2199 vk_cmd_unbind_pipelines_for_stages(struct vk_command_buffer *cmd_buffer,
2200 VkShaderStageFlags stages)
2201 {
2202 stages &= cmd_buffer->pipeline_shader_stages;
2203
2204 if (stages & ~VK_SHADER_STAGE_COMPUTE_BIT)
2205 vk_graphics_pipeline_cmd_bind(cmd_buffer, NULL);
2206
2207 if (stages & VK_SHADER_STAGE_COMPUTE_BIT)
2208 vk_compute_pipeline_cmd_bind(cmd_buffer, NULL);
2209 }
2210