1 /* 2 * Copyright (C) 2014 Satoshi Noguchi 3 * Copyright (C) 2014 Synaptics Inc 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef _F54TEST_H_ 19 #define _F54TEST_H_ 20 21 #include "rmidevice.h" 22 23 #define COMMAND_TIMEOUT_100MS 20 24 25 #define COMMAND_GET_REPORT 1 26 #define COMMAND_FORCE_CAL 2 27 #define COMMAND_FORCE_UPDATE 4 28 29 #define REPORT_INDEX_OFFSET 1 30 #define REPORT_DATA_OFFSET 3 31 32 #define SENSOR_RX_MAPPING_OFFSET 1 33 #define SENSOR_TX_MAPPING_OFFSET 2 34 35 #define CONTROL_0_SIZE 1 36 #define CONTROL_1_SIZE 1 37 #define CONTROL_2_SIZE 2 38 #define CONTROL_3_SIZE 1 39 #define CONTROL_4_6_SIZE 3 40 #define CONTROL_7_SIZE 1 41 #define CONTROL_8_9_SIZE 3 42 #define CONTROL_10_SIZE 1 43 #define CONTROL_11_SIZE 2 44 #define CONTROL_12_13_SIZE 2 45 #define CONTROL_14_SIZE 1 46 #define CONTROL_15_SIZE 1 47 #define CONTROL_16_SIZE 1 48 #define CONTROL_17_SIZE 1 49 #define CONTROL_18_SIZE 1 50 #define CONTROL_19_SIZE 1 51 #define CONTROL_20_SIZE 1 52 #define CONTROL_21_SIZE 2 53 #define CONTROL_22_26_SIZE 7 54 #define CONTROL_27_SIZE 1 55 #define CONTROL_28_SIZE 2 56 #define CONTROL_29_SIZE 1 57 #define CONTROL_30_SIZE 1 58 #define CONTROL_31_SIZE 1 59 #define CONTROL_32_35_SIZE 8 60 #define CONTROL_36_SIZE 1 61 #define CONTROL_37_SIZE 1 62 #define CONTROL_38_SIZE 1 63 #define CONTROL_39_SIZE 1 64 #define CONTROL_40_SIZE 1 65 #define CONTROL_41_SIZE 1 66 #define CONTROL_42_SIZE 2 67 #define CONTROL_43_54_SIZE 13 68 #define CONTROL_55_56_SIZE 2 69 #define CONTROL_57_SIZE 1 70 #define CONTROL_58_SIZE 1 71 #define CONTROL_59_SIZE 2 72 #define CONTROL_60_62_SIZE 3 73 #define CONTROL_63_SIZE 1 74 #define CONTROL_64_67_SIZE 4 75 #define CONTROL_68_73_SIZE 8 76 #define CONTROL_74_SIZE 2 77 #define CONTROL_75_SIZE 1 78 #define CONTROL_76_SIZE 1 79 #define CONTROL_77_78_SIZE 2 80 #define CONTROL_79_83_SIZE 5 81 #define CONTROL_84_85_SIZE 2 82 #define CONTROL_86_SIZE 1 83 #define CONTROL_87_SIZE 1 84 #define CONTROL_88_SIZE 1 85 #define CONTROL_89_SIZE 1 86 #define CONTROL_90_SIZE 1 87 #define CONTROL_91_SIZE 1 88 #define CONTROL_92_SIZE 1 89 #define CONTROL_93_SIZE 1 90 #define CONTROL_94_SIZE 1 91 #define CONTROL_95_SIZE 1 92 #define CONTROL_96_SIZE 1 93 #define CONTROL_97_SIZE 1 94 #define CONTROL_98_SIZE 1 95 #define CONTROL_99_SIZE 1 96 #define CONTROL_100_SIZE 1 97 #define CONTROL_101_SIZE 1 98 #define CONTROL_102_SIZE 1 99 #define CONTROL_103_SIZE 1 100 #define CONTROL_104_SIZE 1 101 #define CONTROL_105_SIZE 1 102 #define CONTROL_106_SIZE 1 103 #define CONTROL_107_SIZE 1 104 #define CONTROL_108_SIZE 1 105 #define CONTROL_109_SIZE 1 106 #define CONTROL_110_SIZE 1 107 #define CONTROL_111_SIZE 1 108 #define CONTROL_112_SIZE 1 109 #define CONTROL_113_SIZE 1 110 #define CONTROL_114_SIZE 1 111 #define CONTROL_115_SIZE 1 112 #define CONTROL_116_SIZE 1 113 #define CONTROL_117_SIZE 1 114 #define CONTROL_118_SIZE 1 115 #define CONTROL_119_SIZE 1 116 #define CONTROL_120_SIZE 1 117 #define CONTROL_121_SIZE 1 118 #define CONTROL_122_SIZE 1 119 #define CONTROL_123_SIZE 1 120 #define CONTROL_124_SIZE 1 121 #define CONTROL_125_SIZE 1 122 #define CONTROL_126_SIZE 1 123 #define CONTROL_127_SIZE 1 124 #define CONTROL_128_SIZE 1 125 #define CONTROL_129_SIZE 1 126 #define CONTROL_130_SIZE 1 127 #define CONTROL_131_SIZE 1 128 #define CONTROL_132_SIZE 1 129 #define CONTROL_133_SIZE 1 130 #define CONTROL_134_SIZE 1 131 #define CONTROL_135_SIZE 1 132 #define CONTROL_136_SIZE 1 133 #define CONTROL_137_SIZE 1 134 #define CONTROL_138_SIZE 1 135 #define CONTROL_139_SIZE 1 136 #define CONTROL_140_SIZE 1 137 #define CONTROL_141_SIZE 1 138 #define CONTROL_142_SIZE 1 139 #define CONTROL_143_SIZE 1 140 #define CONTROL_144_SIZE 1 141 #define CONTROL_145_SIZE 1 142 #define CONTROL_146_SIZE 1 143 #define CONTROL_147_SIZE 1 144 #define CONTROL_148_SIZE 1 145 #define CONTROL_149_SIZE 1 146 #define CONTROL_150_SIZE 1 147 #define CONTROL_151_SIZE 1 148 #define CONTROL_152_SIZE 1 149 #define CONTROL_153_SIZE 1 150 #define CONTROL_154_SIZE 1 151 #define CONTROL_155_SIZE 1 152 #define CONTROL_156_SIZE 1 153 #define CONTROL_157_158_SIZE 2 154 #define CONTROL_163_SIZE 1 155 #define CONTROL_165_SIZE 1 156 #define CONTROL_166_SIZE 1 157 #define CONTROL_167_SIZE 1 158 #define CONTROL_168_SIZE 1 159 #define CONTROL_169_SIZE 1 160 #define CONTROL_171_SIZE 1 161 #define CONTROL_172_SIZE 1 162 #define CONTROL_173_SIZE 1 163 #define CONTROL_174_SIZE 1 164 #define CONTROL_175_SIZE 1 165 #define CONTROL_176_SIZE 1 166 #define CONTROL_177_178_SIZE 2 167 #define CONTROL_179_SIZE 1 168 #define CONTROL_182_SIZE 1 169 #define CONTROL_183_SIZE 1 170 #define CONTROL_185_SIZE 1 171 #define CONTROL_186_SIZE 1 172 #define CONTROL_187_SIZE 1 173 #define CONTROL_188_SIZE 1 174 175 #define HIGH_RESISTANCE_DATA_SIZE 6 176 #define FULL_RAW_CAP_MIN_MAX_DATA_SIZE 4 177 #define TRX_OPEN_SHORT_DATA_SIZE 15 178 #define GUARD_PIN_SHORT_DATA_SIZE 15 179 180 enum f54_report_types { 181 F54_8BIT_IMAGE = 1, 182 F54_16BIT_IMAGE = 2, 183 F54_RAW_16BIT_IMAGE = 3, 184 F54_HIGH_RESISTANCE = 4, 185 F54_TX_TO_TX_SHORTS = 5, 186 F54_RX_TO_RX_SHORTS_1 = 7, 187 F54_TRUE_BASELINE = 9, 188 F54_FULL_RAW_CAP_MIN_MAX = 13, 189 F54_RX_OPENS_1 = 14, 190 F54_TX_OPENS = 15, 191 F54_TX_TO_GND_SHORTS = 16, 192 F54_RX_TO_RX_SHORTS_2 = 17, 193 F54_RX_OPENS_2 = 18, 194 F54_FULL_RAW_CAP = 19, 195 F54_FULL_RAW_CAP_NO_RX_COUPLING = 20, 196 F54_SENSOR_SPEED = 22, 197 F54_ADC_RANGE = 23, 198 F54_TRX_OPENS = 24, 199 F54_TRX_TO_GND_SHORTS = 25, 200 F54_TRX_SHORTS = 26, 201 F54_ABS_RAW_CAP = 38, 202 F54_ABS_DELTA_CAP = 40, 203 F54_GUARD_PIN_SHORT = 50, 204 INVALID_REPORT_TYPE = -1, 205 }; 206 207 struct f54_query { 208 union { 209 struct { 210 /* query 0 */ 211 unsigned char num_of_rx_electrodes; 212 213 /* query 1 */ 214 unsigned char num_of_tx_electrodes; 215 216 /* query 2 */ 217 unsigned char f54_query2_b0__1:2; 218 unsigned char has_baseline:1; 219 unsigned char has_image8:1; 220 unsigned char f54_query2_b4__5:2; 221 unsigned char has_image16:1; 222 unsigned char f54_query2_b7:1; 223 224 /* queries 3.0 and 3.1 */ 225 unsigned short clock_rate; 226 227 /* query 4 */ 228 unsigned char touch_controller_family; 229 230 /* query 5 */ 231 unsigned char has_pixel_touch_threshold_adjustment:1; 232 unsigned char f54_query5_b1__7:7; 233 234 /* query 6 */ 235 unsigned char has_sensor_assignment:1; 236 unsigned char has_interference_metric:1; 237 unsigned char has_sense_frequency_control:1; 238 unsigned char has_firmware_noise_mitigation:1; 239 unsigned char has_ctrl11:1; 240 unsigned char has_two_byte_report_rate:1; 241 unsigned char has_one_byte_report_rate:1; 242 unsigned char has_relaxation_control:1; 243 244 /* query 7 */ 245 unsigned char curve_compensation_mode:2; 246 unsigned char f54_query7_b2__7:6; 247 248 /* query 8 */ 249 unsigned char f54_query8_b0:1; 250 unsigned char has_iir_filter:1; 251 unsigned char has_cmn_removal:1; 252 unsigned char has_cmn_maximum:1; 253 unsigned char has_touch_hysteresis:1; 254 unsigned char has_edge_compensation:1; 255 unsigned char has_per_frequency_noise_control:1; 256 unsigned char has_enhanced_stretch:1; 257 258 /* query 9 */ 259 unsigned char has_force_fast_relaxation:1; 260 unsigned char has_multi_metric_state_machine:1; 261 unsigned char has_signal_clarity:1; 262 unsigned char has_variance_metric:1; 263 unsigned char has_0d_relaxation_control:1; 264 unsigned char has_0d_acquisition_control:1; 265 unsigned char has_status:1; 266 unsigned char has_slew_metric:1; 267 268 /* query 10 */ 269 unsigned char has_h_blank:1; 270 unsigned char has_v_blank:1; 271 unsigned char has_long_h_blank:1; 272 unsigned char has_startup_fast_relaxation:1; 273 unsigned char has_esd_control:1; 274 unsigned char has_noise_mitigation2:1; 275 unsigned char has_noise_state:1; 276 unsigned char has_energy_ratio_relaxation:1; 277 278 /* query 11 */ 279 unsigned char has_excessive_noise_reporting:1; 280 unsigned char has_slew_option:1; 281 unsigned char has_two_overhead_bursts:1; 282 unsigned char has_query13:1; 283 unsigned char has_one_overhead_burst:1; 284 unsigned char f54_query11_b5:1; 285 unsigned char has_ctrl88:1; 286 unsigned char has_query15:1; 287 288 /* query 12 */ 289 unsigned char number_of_sensing_frequencies:4; 290 unsigned char f54_query12_b4__7:4; 291 } __attribute__((packed)); 292 unsigned char data[14]; 293 }; 294 }; 295 296 struct f54_query_13 { 297 union { 298 struct { 299 unsigned char has_ctrl86:1; 300 unsigned char has_ctrl87:1; 301 unsigned char has_ctrl87_sub0:1; 302 unsigned char has_ctrl87_sub1:1; 303 unsigned char has_ctrl87_sub2:1; 304 unsigned char has_cidim:1; 305 unsigned char has_noise_mitigation_enhancement:1; 306 unsigned char has_rail_im:1; 307 } __attribute__((packed)); 308 unsigned char data[1]; 309 }; 310 }; 311 312 struct f54_query_15 { 313 union { 314 struct { 315 unsigned char has_ctrl90:1; 316 unsigned char has_transmit_strength:1; 317 unsigned char has_ctrl87_sub3:1; 318 unsigned char has_query16:1; 319 unsigned char has_query20:1; 320 unsigned char has_query21:1; 321 unsigned char has_query22:1; 322 unsigned char has_query25:1; 323 } __attribute__((packed)); 324 unsigned char data[1]; 325 }; 326 }; 327 328 struct f54_query_16 { 329 union { 330 struct { 331 unsigned char has_query17:1; 332 unsigned char has_data17:1; 333 unsigned char has_ctrl92:1; 334 unsigned char has_ctrl93:1; 335 unsigned char has_ctrl94_query18:1; 336 unsigned char has_ctrl95_query19:1; 337 unsigned char has_ctrl99:1; 338 unsigned char has_ctrl100:1; 339 } __attribute__((packed)); 340 unsigned char data[1]; 341 }; 342 }; 343 344 struct f54_query_21 { 345 union { 346 struct { 347 unsigned char has_abs_rx:1; 348 unsigned char has_abs_tx:1; 349 unsigned char has_ctrl91:1; 350 unsigned char has_ctrl96:1; 351 unsigned char has_ctrl97:1; 352 unsigned char has_ctrl98:1; 353 unsigned char has_data19:1; 354 unsigned char has_query24_data18:1; 355 } __attribute__((packed)); 356 unsigned char data[1]; 357 }; 358 }; 359 360 struct f54_query_22 { 361 union { 362 struct { 363 unsigned char has_packed_image:1; 364 unsigned char has_ctrl101:1; 365 unsigned char has_dynamic_sense_display_ratio:1; 366 unsigned char has_query23:1; 367 unsigned char has_ctrl103_query26:1; 368 unsigned char has_ctrl104:1; 369 unsigned char has_ctrl105:1; 370 unsigned char has_query28:1; 371 } __attribute__((packed)); 372 unsigned char data[1]; 373 }; 374 }; 375 376 struct f54_query_23 { 377 union { 378 struct { 379 unsigned char has_ctrl102:1; 380 unsigned char has_ctrl102_sub1:1; 381 unsigned char has_ctrl102_sub2:1; 382 unsigned char has_ctrl102_sub4:1; 383 unsigned char has_ctrl102_sub5:1; 384 unsigned char has_ctrl102_sub9:1; 385 unsigned char has_ctrl102_sub10:1; 386 unsigned char has_ctrl102_sub11:1; 387 } __attribute__((packed)); 388 unsigned char data[1]; 389 }; 390 }; 391 392 struct f54_query_25 { 393 union { 394 struct { 395 unsigned char has_ctrl106:1; 396 unsigned char has_ctrl102_sub12:1; 397 unsigned char has_ctrl107:1; 398 unsigned char has_ctrl108:1; 399 unsigned char has_ctrl109:1; 400 unsigned char has_data20:1; 401 unsigned char f54_query25_b6:1; 402 unsigned char has_query27:1; 403 } __attribute__((packed)); 404 unsigned char data[1]; 405 }; 406 }; 407 408 struct f54_query_27 { 409 union { 410 struct { 411 unsigned char has_ctrl110:1; 412 unsigned char has_data21:1; 413 unsigned char has_ctrl111:1; 414 unsigned char has_ctrl112:1; 415 unsigned char has_ctrl113:1; 416 unsigned char has_data22:1; 417 unsigned char has_ctrl114:1; 418 unsigned char has_query29:1; 419 } __attribute__((packed)); 420 unsigned char data[1]; 421 }; 422 }; 423 424 struct f54_query_29 { 425 union { 426 struct { 427 unsigned char has_ctrl115:1; 428 unsigned char has_ground_ring_options:1; 429 unsigned char has_lost_bursts_tuning:1; 430 unsigned char has_aux_exvcom2_select:1; 431 unsigned char has_ctrl116:1; 432 unsigned char has_data23:1; 433 unsigned char has_ctrl117:1; 434 unsigned char has_query30:1; 435 } __attribute__((packed)); 436 unsigned char data[1]; 437 }; 438 }; 439 440 struct f54_query_30 { 441 union { 442 struct { 443 unsigned char has_ctrl118:1; 444 unsigned char has_ctrl119:1; 445 unsigned char has_ctrl120:1; 446 unsigned char has_ctrl121:1; 447 unsigned char has_ctrl122_query31:1; 448 unsigned char has_ctrl123:1; 449 unsigned char f54_query30_b6:1; 450 unsigned char has_query32:1; 451 } __attribute__((packed)); 452 unsigned char data[1]; 453 }; 454 }; 455 456 struct f54_query_32 { 457 union { 458 struct { 459 unsigned char has_ctrl125:1; 460 unsigned char has_ctrl126:1; 461 unsigned char has_ctrl127:1; 462 unsigned char has_abs_charge_pump_disable:1; 463 unsigned char has_query33:1; 464 unsigned char has_data24:1; 465 unsigned char has_query34:1; 466 unsigned char has_query35:1; 467 } __attribute__((packed)); 468 unsigned char data[1]; 469 }; 470 }; 471 472 struct f54_query_33 { 473 union { 474 struct { 475 unsigned char f54_query33_b0:1; 476 unsigned char f54_query33_b1:1; 477 unsigned char f54_query33_b2:1; 478 unsigned char f54_query33_b3:1; 479 unsigned char has_ctrl132:1; 480 unsigned char has_ctrl133:1; 481 unsigned char has_ctrl134:1; 482 unsigned char has_query36:1; 483 } __attribute__((packed)); 484 unsigned char data[1]; 485 }; 486 }; 487 488 struct f54_query_35 { 489 union { 490 struct { 491 unsigned char has_data25:1; 492 unsigned char f54_query35_b1:1; 493 unsigned char f54_query35_b2:1; 494 unsigned char has_ctrl137:1; 495 unsigned char has_ctrl138:1; 496 unsigned char has_ctrl139:1; 497 unsigned char has_data26:1; 498 unsigned char has_ctrl140:1; 499 } __attribute__((packed)); 500 unsigned char data[1]; 501 }; 502 }; 503 504 struct f54_query_36 { 505 union { 506 struct { 507 unsigned char f54_query36_b0:1; 508 unsigned char has_ctrl142:1; 509 unsigned char has_query37:1; 510 unsigned char has_ctrl143:1; 511 unsigned char has_ctrl144:1; 512 unsigned char has_ctrl145:1; 513 unsigned char has_ctrl146:1; 514 unsigned char has_query38:1; 515 } __attribute__((packed)); 516 unsigned char data[1]; 517 }; 518 }; 519 520 struct f54_query_38 { 521 union { 522 struct { 523 unsigned char has_ctrl147:1; 524 unsigned char has_ctrl148:1; 525 unsigned char has_ctrl149:1; 526 unsigned char has_ctrl150:1; 527 unsigned char has_ctrl151:1; 528 unsigned char has_ctrl152:1; 529 unsigned char has_ctrl153:1; 530 unsigned char has_query39:1; 531 } __attribute__((packed)); 532 unsigned char data[1]; 533 }; 534 }; 535 536 struct f54_query_39 { 537 union { 538 struct { 539 unsigned char has_ctrl154:1; 540 unsigned char has_ctrl155:1; 541 unsigned char has_ctrl156:1; 542 unsigned char has_ctrl160:1; 543 unsigned char has_ctrl157_ctrl158:1; 544 unsigned char f54_query39_b5__6:2; 545 unsigned char has_query40:1; 546 } __attribute__((packed)); 547 unsigned char data[1]; 548 }; 549 }; 550 551 struct f54_query_40 { 552 union { 553 struct { 554 unsigned char has_ctrl169:1; 555 unsigned char has_ctrl163_query41:1; 556 unsigned char f54_query40_b2:1; 557 unsigned char has_ctrl165_query42:1; 558 unsigned char has_ctrl166:1; 559 unsigned char has_ctrl167:1; 560 unsigned char has_ctrl168:1; 561 unsigned char has_query43:1; 562 } __attribute__((packed)); 563 unsigned char data[1]; 564 }; 565 }; 566 567 struct f54_query_43 { 568 union { 569 struct { 570 unsigned char f54_query43_b0__1:2; 571 unsigned char has_ctrl171:1; 572 unsigned char has_ctrl172_query44_query45:1; 573 unsigned char has_ctrl173:1; 574 unsigned char has_ctrl174:1; 575 unsigned char has_ctrl175:1; 576 unsigned char has_query46:1; 577 } __attribute__((packed)); 578 unsigned char data[1]; 579 }; 580 }; 581 582 struct f54_query_46 { 583 union { 584 struct { 585 unsigned char has_ctrl176:1; 586 unsigned char has_ctrl177_ctrl178:1; 587 unsigned char has_ctrl179:1; 588 unsigned char f54_query46_b3:1; 589 unsigned char has_data27:1; 590 unsigned char has_data28:1; 591 unsigned char f54_query46_b6:1; 592 unsigned char has_query47:1; 593 } __attribute__((packed)); 594 unsigned char data[1]; 595 }; 596 }; 597 598 struct f54_query_47 { 599 union { 600 struct { 601 unsigned char f54_query47_b0:1; 602 unsigned char has_ctrl182:1; 603 unsigned char has_ctrl183:1; 604 unsigned char f54_query47_b3:1; 605 unsigned char has_ctrl185:1; 606 unsigned char has_ctrl186:1; 607 unsigned char has_ctrl187:1; 608 unsigned char has_query49:1; 609 } __attribute__((packed)); 610 unsigned char data[1]; 611 }; 612 }; 613 614 struct f54_query_49 { 615 union { 616 struct { 617 unsigned char f54_query49_b0__1:2; 618 unsigned char has_ctrl188:1; 619 unsigned char has_data31:1; 620 unsigned char f54_query49_b4__6:3; 621 unsigned char has_query50:1; 622 } __attribute__((packed)); 623 unsigned char data[1]; 624 }; 625 }; 626 627 struct f54_query_50 { 628 union { 629 struct { 630 unsigned char f54_query50_b0__6:7; 631 unsigned char has_query51:1; 632 } __attribute__((packed)); 633 unsigned char data[1]; 634 }; 635 }; 636 637 struct f54_query_51 { 638 union { 639 struct { 640 unsigned char f54_query51_b0__4:5; 641 unsigned char has_query53_query54_ctrl198:1; 642 unsigned char has_ctrl199:1; 643 unsigned char has_query55:1; 644 } __attribute__((packed)); 645 unsigned char data[1]; 646 }; 647 }; 648 649 struct f54_query_55 { 650 union { 651 struct { 652 unsigned char has_query56:1; 653 unsigned char has_data33_data34:1; 654 unsigned char has_alt_report_rate:1; 655 unsigned char has_ctrl200:1; 656 unsigned char has_ctrl201_ctrl202:1; 657 unsigned char has_ctrl203:1; 658 unsigned char has_ctrl204:1; 659 unsigned char has_query57:1; 660 } __attribute__((packed)); 661 unsigned char data[1]; 662 }; 663 }; 664 665 struct f54_query_57 { 666 union { 667 struct { 668 unsigned char has_ctrl205:1; 669 unsigned char has_ctrl206:1; 670 unsigned char has_usb_bulk_read:1; 671 unsigned char has_ctrl207:1; 672 unsigned char has_ctrl208:1; 673 unsigned char has_ctrl209:1; 674 unsigned char has_ctrl210:1; 675 unsigned char has_query58:1; 676 } __attribute__((packed)); 677 unsigned char data[1]; 678 }; 679 }; 680 681 struct f54_query_58 { 682 union { 683 struct { 684 unsigned char has_query59:1; 685 unsigned char has_query60:1; 686 unsigned char has_ctrl211:1; 687 unsigned char has_ctrl212:1; 688 unsigned char has_hybrid_abs_tx_axis_filtering:1; 689 unsigned char has_hybrid_abs_tx_interpolation:1; 690 unsigned char has_ctrl213:1; 691 unsigned char has_query61:1; 692 } __attribute__((packed)); 693 unsigned char data[1]; 694 }; 695 }; 696 697 struct f54_query_61 { 698 union { 699 struct { 700 unsigned char has_ctrl214:1; 701 unsigned char has_ctrl215_query62_query63:1; 702 unsigned char f54_query_61_b2:1; 703 unsigned char has_ctrl216:1; 704 unsigned char has_ctrl217:1; 705 unsigned char has_misc_host_ctrl:1; 706 unsigned char hybrid_abs_buttons:1; 707 unsigned char has_query64:1; 708 } __attribute__((packed)); 709 unsigned char data[1]; 710 }; 711 }; 712 713 struct f54_query_64 { 714 union { 715 struct { 716 unsigned char has_ctrl101_sub1:1; 717 unsigned char has_ctrl220:1; 718 unsigned char has_ctrl221:1; 719 unsigned char has_ctrl222:1; 720 unsigned char has_ctrl219_sub1:1; 721 unsigned char has_ctrl103_sub3:1; 722 unsigned char has_ctrl224_ctrl226_ctrl227:1; 723 unsigned char has_query65:1; 724 } __attribute__((packed)); 725 unsigned char data[1]; 726 }; 727 }; 728 729 struct f54_query_65 { 730 union { 731 struct { 732 unsigned char f54_query_65_b0__1:2; 733 unsigned char has_ctrl101_sub2:1; 734 unsigned char f54_query_65_b3__4:2; 735 unsigned char has_query66_ctrl231:1; 736 unsigned char has_ctrl232:1; 737 unsigned char has_query67:1; 738 } __attribute__((packed)); 739 unsigned char data[1]; 740 }; 741 }; 742 743 struct f54_query_67 { 744 union { 745 struct { 746 unsigned char has_abs_doze_spatial_filter_en:1; 747 unsigned char has_abs_doze_avg_filter_enhancement_en:1; 748 unsigned char has_single_display_pulse:1; 749 unsigned char f54_query_67_b3__4:2; 750 unsigned char has_ctrl235_ctrl236:1; 751 unsigned char f54_query_67_b6:1; 752 unsigned char has_query68:1; 753 } __attribute__((packed)); 754 unsigned char data[1]; 755 }; 756 }; 757 758 struct f54_query_68 { 759 union { 760 struct { 761 unsigned char f54_query_68_b0:1; 762 unsigned char has_ctrl238:1; 763 unsigned char has_ctrl238_sub1:1; 764 unsigned char has_ctrl238_sub2:1; 765 unsigned char has_ctrl239:1; 766 unsigned char has_freq_filter_bw_ext:1; 767 unsigned char is_tddi_hic:1; 768 unsigned char has_query69:1; 769 } __attribute__((packed)); 770 unsigned char data[1]; 771 }; 772 }; 773 774 struct f54_query_69 { 775 union { 776 struct { 777 unsigned char has_ctrl240_sub0:1; 778 unsigned char has_ctrl240_sub1_sub2:1; 779 unsigned char has_ctrl240_sub3:1; 780 unsigned char has_ctrl240_sub4:1; 781 unsigned char f54_query_69_b4__7:4; 782 } __attribute__((packed)); 783 unsigned char data[1]; 784 }; 785 }; 786 787 struct f54_data_31 { 788 union { 789 struct { 790 unsigned char is_calibration_crc:1; 791 unsigned char calibration_crc:1; 792 unsigned char short_test_row_number:5; 793 } __attribute__((packed)); 794 struct { 795 unsigned char data[1]; 796 unsigned short address; 797 } __attribute__((packed)); 798 }; 799 }; 800 801 struct f54_control_7 { 802 union { 803 struct { 804 unsigned char cbc_cap:3; 805 unsigned char cbc_polarity:1; 806 unsigned char cbc_tx_carrier_selection:1; 807 unsigned char f54_ctrl7_b5__7:3; 808 } __attribute__((packed)); 809 struct { 810 unsigned char data[1]; 811 unsigned short address; 812 } __attribute__((packed)); 813 }; 814 }; 815 816 struct f54_control_41 { 817 union { 818 struct { 819 unsigned char no_signal_clarity:1; 820 unsigned char f54_ctrl41_b1__7:7; 821 } __attribute__((packed)); 822 struct { 823 unsigned char data[1]; 824 unsigned short address; 825 } __attribute__((packed)); 826 }; 827 }; 828 829 struct f54_control_57 { 830 union { 831 struct { 832 unsigned char cbc_cap:3; 833 unsigned char cbc_polarity:1; 834 unsigned char cbc_tx_carrier_selection:1; 835 unsigned char f54_ctrl57_b5__7:3; 836 } __attribute__((packed)); 837 struct { 838 unsigned char data[1]; 839 unsigned short address; 840 } __attribute__((packed)); 841 }; 842 }; 843 844 struct f54_control_88 { 845 union { 846 struct { 847 unsigned char tx_low_reference_polarity:1; 848 unsigned char tx_high_reference_polarity:1; 849 unsigned char abs_low_reference_polarity:1; 850 unsigned char abs_polarity:1; 851 unsigned char cbc_polarity:1; 852 unsigned char cbc_tx_carrier_selection:1; 853 unsigned char charge_pump_enable:1; 854 unsigned char cbc_abs_auto_servo:1; 855 } __attribute__((packed)); 856 struct { 857 unsigned char data[1]; 858 unsigned short address; 859 } __attribute__((packed)); 860 }; 861 }; 862 863 struct f54_control_110 { 864 union { 865 struct { 866 unsigned char active_stylus_rx_feedback_cap; 867 unsigned char active_stylus_rx_feedback_cap_reference; 868 unsigned char active_stylus_low_reference; 869 unsigned char active_stylus_high_reference; 870 unsigned char active_stylus_gain_control; 871 unsigned char active_stylus_gain_control_reference; 872 unsigned char active_stylus_timing_mode; 873 unsigned char active_stylus_discovery_bursts; 874 unsigned char active_stylus_detection_bursts; 875 unsigned char active_stylus_discovery_noise_multiplier; 876 unsigned char active_stylus_detection_envelope_min; 877 unsigned char active_stylus_detection_envelope_max; 878 unsigned char active_stylus_lose_count; 879 } __attribute__((packed)); 880 struct { 881 unsigned char data[13]; 882 unsigned short address; 883 } __attribute__((packed)); 884 }; 885 }; 886 887 struct f54_control_149 { 888 union { 889 struct { 890 unsigned char trans_cbc_global_cap_enable:1; 891 unsigned char f54_ctrl49_b1__7:7; 892 } __attribute__((packed)); 893 struct { 894 unsigned char data[1]; 895 unsigned short address; 896 } __attribute__((packed)); 897 }; 898 }; 899 900 struct f54_control_188 { 901 union { 902 struct { 903 unsigned char start_calibration:1; 904 unsigned char start_is_calibration:1; 905 unsigned char frequency:2; 906 unsigned char start_production_test:1; 907 unsigned char short_test_calibration:1; 908 unsigned char f54_ctrl188_b7:1; 909 } __attribute__((packed)); 910 struct { 911 unsigned char data[1]; 912 unsigned short address; 913 } __attribute__((packed)); 914 }; 915 }; 916 917 struct f54_control { 918 struct f54_control_7 reg_7; 919 struct f54_control_41 reg_41; 920 struct f54_control_57 reg_57; 921 struct f54_control_88 reg_88; 922 struct f54_control_110 reg_110; 923 struct f54_control_149 reg_149; 924 struct f54_control_188 reg_188; 925 }; 926 927 928 struct f55_query { 929 union { 930 struct { 931 /* query 0 */ 932 unsigned char num_of_rx_electrodes; 933 934 /* query 1 */ 935 unsigned char num_of_tx_electrodes; 936 937 /* query 2 */ 938 unsigned char has_sensor_assignment:1; 939 unsigned char has_edge_compensation:1; 940 unsigned char curve_compensation_mode:2; 941 unsigned char has_ctrl6:1; 942 unsigned char has_alternate_transmitter_assignment:1; 943 unsigned char has_single_layer_multi_touch:1; 944 unsigned char has_query5:1; 945 } __attribute__((packed)); 946 unsigned char data[3]; 947 }; 948 }; 949 950 class Display; 951 952 class F54Test 953 { 954 public: F54Test(RMIDevice & device,Display & display)955 F54Test(RMIDevice & device, Display & display) 956 : m_device(device), 957 m_reportType(INVALID_REPORT_TYPE), 958 m_txAssignment(NULL), 959 m_rxAssignment(NULL), 960 m_reportBufferSize(0), 961 m_reportData(NULL), 962 m_display(display) 963 {} 964 ~F54Test(); 965 int Prepare(f54_report_types reportType); 966 int Run(); 967 968 private: 969 int FindTestFunctions(); 970 int ReadF54Queries(); 971 int ReadF55Queries(); 972 int SetupF54Controls(); 973 int SetF54ReportType(f54_report_types report_type); 974 int SetF54ReportSize(f54_report_types report_type); 975 int SetF54Interrupt(); 976 int DoF54Command(unsigned char command); 977 int WaitForF54CommandCompletion(); 978 int ReadF54Report(); 979 int ShowF54Report(); 980 int DoPreparation(); 981 982 private: 983 RMIDevice & m_device; 984 985 RMIFunction m_f01; 986 RMIFunction m_f54; 987 RMIFunction m_f55; 988 989 f54_query m_f54Query; 990 f54_query_13 m_f54Query_13; 991 f54_query_15 m_f54Query_15; 992 f54_query_16 m_f54Query_16; 993 f54_query_21 m_f54Query_21; 994 f54_query_22 m_f54Query_22; 995 f54_query_23 m_f54Query_23; 996 f54_query_25 m_f54Query_25; 997 f54_query_27 m_f54Query_27; 998 f54_query_29 m_f54Query_29; 999 f54_query_30 m_f54Query_30; 1000 f54_query_32 m_f54Query_32; 1001 f54_query_33 m_f54Query_33; 1002 f54_query_35 m_f54Query_35; 1003 f54_query_36 m_f54Query_36; 1004 f54_query_38 m_f54Query_38; 1005 f54_query_39 m_f54Query_39; 1006 f54_query_40 m_f54Query_40; 1007 f54_query_43 m_f54Query_43; 1008 f54_query_46 m_f54Query_46; 1009 f54_query_47 m_f54Query_47; 1010 f54_query_49 m_f54Query_49; 1011 f54_query_50 m_f54Query_50; 1012 f54_query_51 m_f54Query_51; 1013 f54_query_55 m_f54Query_55; 1014 f54_query_57 m_f54Query_57; 1015 f54_query_58 m_f54Query_58; 1016 f54_query_61 m_f54Query_61; 1017 f54_query_64 m_f54Query_64; 1018 f54_query_65 m_f54Query_65; 1019 f54_query_67 m_f54Query_67; 1020 f54_query_68 m_f54Query_68; 1021 f54_query_69 m_f54Query_69; 1022 1023 f54_control m_f54Control; 1024 f54_data_31 m_f54Data_31; 1025 f55_query m_f55Query; 1026 1027 f54_report_types m_reportType; 1028 unsigned int m_reportSize; 1029 1030 unsigned char *m_txAssignment; 1031 unsigned char *m_rxAssignment; 1032 unsigned char m_txAssigned; 1033 unsigned char m_rxAssigned; 1034 1035 unsigned int m_reportBufferSize; 1036 unsigned char *m_reportData; 1037 1038 Display & m_display; 1039 }; 1040 1041 #endif // _F54TEST_H_ 1042