1 use crate::{
2     Affine2, Affine3A, DAffine2, DAffine3, DMat2, DMat3, DMat4, DQuat, DVec2, DVec3, DVec4,
3     I16Vec2, I16Vec3, I16Vec4, I64Vec2, I64Vec3, I64Vec4, IVec2, IVec3, IVec4, Mat2, Mat3, Mat3A,
4     Mat4, Quat, U16Vec2, U16Vec3, U16Vec4, U64Vec2, U64Vec3, U64Vec4, UVec2, UVec3, UVec4, Vec2,
5     Vec3, Vec3A, Vec4,
6 };
7 use bytemuck::{AnyBitPattern, Pod, Zeroable};
8 
9 // Affine2 contains internal padding due to Mat2 using SIMD
10 unsafe impl AnyBitPattern for Affine2 {}
11 unsafe impl Zeroable for Affine2 {}
12 unsafe impl AnyBitPattern for Affine3A {}
13 unsafe impl Zeroable for Affine3A {}
14 
15 unsafe impl Pod for Mat2 {}
16 unsafe impl Zeroable for Mat2 {}
17 unsafe impl Pod for Mat3 {}
18 unsafe impl Zeroable for Mat3 {}
19 unsafe impl AnyBitPattern for Mat3A {}
20 unsafe impl Zeroable for Mat3A {}
21 unsafe impl Pod for Mat4 {}
22 unsafe impl Zeroable for Mat4 {}
23 
24 unsafe impl Pod for Quat {}
25 unsafe impl Zeroable for Quat {}
26 
27 unsafe impl Pod for Vec2 {}
28 unsafe impl Zeroable for Vec2 {}
29 unsafe impl Pod for Vec3 {}
30 unsafe impl Zeroable for Vec3 {}
31 unsafe impl AnyBitPattern for Vec3A {}
32 unsafe impl Zeroable for Vec3A {}
33 unsafe impl Pod for Vec4 {}
34 unsafe impl Zeroable for Vec4 {}
35 
36 unsafe impl Pod for DAffine2 {}
37 unsafe impl Zeroable for DAffine2 {}
38 unsafe impl Pod for DAffine3 {}
39 unsafe impl Zeroable for DAffine3 {}
40 
41 unsafe impl Pod for DMat2 {}
42 unsafe impl Zeroable for DMat2 {}
43 unsafe impl Pod for DMat3 {}
44 unsafe impl Zeroable for DMat3 {}
45 unsafe impl Pod for DMat4 {}
46 unsafe impl Zeroable for DMat4 {}
47 
48 unsafe impl Pod for DQuat {}
49 unsafe impl Zeroable for DQuat {}
50 
51 unsafe impl Pod for DVec2 {}
52 unsafe impl Zeroable for DVec2 {}
53 unsafe impl Pod for DVec3 {}
54 unsafe impl Zeroable for DVec3 {}
55 unsafe impl Pod for DVec4 {}
56 unsafe impl Zeroable for DVec4 {}
57 
58 unsafe impl Pod for I16Vec2 {}
59 unsafe impl Zeroable for I16Vec2 {}
60 unsafe impl Pod for I16Vec3 {}
61 unsafe impl Zeroable for I16Vec3 {}
62 unsafe impl Pod for I16Vec4 {}
63 unsafe impl Zeroable for I16Vec4 {}
64 
65 unsafe impl Pod for U16Vec2 {}
66 unsafe impl Zeroable for U16Vec2 {}
67 unsafe impl Pod for U16Vec3 {}
68 unsafe impl Zeroable for U16Vec3 {}
69 unsafe impl Pod for U16Vec4 {}
70 unsafe impl Zeroable for U16Vec4 {}
71 
72 unsafe impl Pod for IVec2 {}
73 unsafe impl Zeroable for IVec2 {}
74 unsafe impl Pod for IVec3 {}
75 unsafe impl Zeroable for IVec3 {}
76 unsafe impl Pod for IVec4 {}
77 unsafe impl Zeroable for IVec4 {}
78 
79 unsafe impl Pod for UVec2 {}
80 unsafe impl Zeroable for UVec2 {}
81 unsafe impl Pod for UVec3 {}
82 unsafe impl Zeroable for UVec3 {}
83 unsafe impl Pod for UVec4 {}
84 unsafe impl Zeroable for UVec4 {}
85 
86 unsafe impl Pod for I64Vec2 {}
87 unsafe impl Zeroable for I64Vec2 {}
88 unsafe impl Pod for I64Vec3 {}
89 unsafe impl Zeroable for I64Vec3 {}
90 unsafe impl Pod for I64Vec4 {}
91 unsafe impl Zeroable for I64Vec4 {}
92 
93 unsafe impl Pod for U64Vec2 {}
94 unsafe impl Zeroable for U64Vec2 {}
95 unsafe impl Pod for U64Vec3 {}
96 unsafe impl Zeroable for U64Vec3 {}
97 unsafe impl Pod for U64Vec4 {}
98 unsafe impl Zeroable for U64Vec4 {}
99 
100 #[cfg(test)]
101 mod test {
102     use crate::{
103         Affine2, Affine3A, DAffine2, DAffine3, DMat2, DMat3, DMat4, DQuat, DVec2, DVec3, DVec4,
104         I16Vec2, I16Vec3, I16Vec4, I64Vec2, I64Vec3, I64Vec4, IVec2, IVec3, IVec4, Mat2, Mat3,
105         Mat3A, Mat4, Quat, U16Vec2, U16Vec3, U16Vec4, U64Vec2, U64Vec3, U64Vec4, UVec2, UVec3,
106         UVec4, Vec2, Vec3, Vec3A, Vec4,
107     };
108     use core::mem;
109 
110     macro_rules! test_pod_t {
111         ($name:ident, $t:ty) => {
112             #[test]
113             fn $name() {
114                 let t = <$t>::default();
115                 let b = bytemuck::bytes_of(&t);
116                 // the below loop will fail in miri if we're doing something bad here.
117                 for bi in b {
118                     assert_eq!(bi, bi);
119                 }
120                 // should be the same address
121                 assert_eq!(&t as *const $t as usize, b.as_ptr() as usize);
122                 // should be the same size
123                 assert_eq!(b.len(), mem::size_of_val(&t));
124             }
125         };
126     }
127 
128     macro_rules! test_any_bit_pattern_t {
129         ($name:ident, $t:ident) => {
130             #[test]
131             fn $name() {
132                 let b = [0_u8; mem::size_of::<$t>()];
133                 let t: $t = bytemuck::cast(b);
134                 // should be the same size
135                 assert_eq!(b.len(), mem::size_of_val(&t));
136                 // should be zero
137                 assert_eq!(t, $t::ZERO);
138             }
139         };
140     }
141 
142     test_any_bit_pattern_t!(affine2, Affine2);
143     test_any_bit_pattern_t!(affine3a, Affine3A);
144     test_pod_t!(mat2, Mat2);
145     test_pod_t!(mat3, Mat3);
146     test_any_bit_pattern_t!(mat3a, Mat3A);
147     test_pod_t!(mat4, Mat4);
148     test_pod_t!(quat, Quat);
149     test_pod_t!(vec2, Vec2);
150     test_pod_t!(vec3, Vec3);
151     test_any_bit_pattern_t!(vec3a, Vec3A);
152     test_pod_t!(vec4, Vec4);
153 
154     test_pod_t!(daffine2, DAffine2);
155     test_pod_t!(daffine3, DAffine3);
156     test_pod_t!(dmat2, DMat2);
157     test_pod_t!(dmat3, DMat3);
158     test_pod_t!(dmat4, DMat4);
159     test_pod_t!(dquat, DQuat);
160     test_pod_t!(dvec2, DVec2);
161     test_pod_t!(dvec3, DVec3);
162     test_pod_t!(dvec4, DVec4);
163 
164     test_pod_t!(i16vec2, I16Vec2);
165     test_pod_t!(i16vec3, I16Vec3);
166     test_pod_t!(i16vec4, I16Vec4);
167 
168     test_pod_t!(u16vec2, U16Vec2);
169     test_pod_t!(u16vec3, U16Vec3);
170     test_pod_t!(u16vec4, U16Vec4);
171 
172     test_pod_t!(ivec2, IVec2);
173     test_pod_t!(ivec3, IVec3);
174     test_pod_t!(ivec4, IVec4);
175 
176     test_pod_t!(uvec2, UVec2);
177     test_pod_t!(uvec3, UVec3);
178     test_pod_t!(uvec4, UVec4);
179 
180     test_pod_t!(i64vec2, I64Vec2);
181     test_pod_t!(i64vec3, I64Vec3);
182     test_pod_t!(i64vec4, I64Vec4);
183 
184     test_pod_t!(u64vec2, U64Vec2);
185     test_pod_t!(u64vec3, U64Vec3);
186     test_pod_t!(u64vec4, U64Vec4);
187 }
188