1 /* 2 * Copyright 2022 Google LLC 3 * 4 * Use of this source code is governed by a BSD-style license that can be 5 * found in the LICENSE file. 6 */ 7 8 #ifndef SkFeatures_DEFINED 9 #define SkFeatures_DEFINED 10 11 #if !defined(SK_BUILD_FOR_ANDROID) && !defined(SK_BUILD_FOR_IOS) && !defined(SK_BUILD_FOR_WIN) && \ 12 !defined(SK_BUILD_FOR_UNIX) && !defined(SK_BUILD_FOR_MAC) 13 14 #ifdef __APPLE__ 15 #include <TargetConditionals.h> 16 #endif 17 18 #if defined(_WIN32) || defined(__SYMBIAN32__) 19 #define SK_BUILD_FOR_WIN 20 #elif defined(ANDROID) || defined(__ANDROID__) 21 #define SK_BUILD_FOR_ANDROID 22 #elif defined(linux) || defined(__linux) || defined(__FreeBSD__) || \ 23 defined(__OpenBSD__) || defined(__sun) || defined(__NetBSD__) || \ 24 defined(__DragonFly__) || defined(__Fuchsia__) || \ 25 defined(__GLIBC__) || defined(__GNU__) || defined(__unix__) 26 #define SK_BUILD_FOR_UNIX 27 #elif TARGET_OS_IPHONE || TARGET_IPHONE_SIMULATOR 28 #define SK_BUILD_FOR_IOS 29 #else 30 #define SK_BUILD_FOR_MAC 31 #endif 32 #endif // end SK_BUILD_FOR_* 33 34 35 #if defined(SK_BUILD_FOR_WIN) && !defined(__clang__) 36 #if !defined(SK_RESTRICT) 37 #define SK_RESTRICT __restrict 38 #endif 39 #endif 40 41 #if !defined(SK_RESTRICT) 42 #define SK_RESTRICT __restrict__ 43 #endif 44 45 #if !defined(SK_CPU_BENDIAN) && !defined(SK_CPU_LENDIAN) 46 #if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) 47 #define SK_CPU_BENDIAN 48 #elif defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) 49 #define SK_CPU_LENDIAN 50 #elif defined(__sparc) || defined(__sparc__) || \ 51 defined(_POWER) || defined(__powerpc__) || \ 52 defined(__ppc__) || defined(__hppa) || \ 53 defined(__PPC__) || defined(__PPC64__) || \ 54 defined(_MIPSEB) || defined(__ARMEB__) || \ 55 defined(__s390__) || \ 56 (defined(__sh__) && defined(__BIG_ENDIAN__)) || \ 57 (defined(__ia64) && defined(__BIG_ENDIAN__)) 58 #define SK_CPU_BENDIAN 59 #else 60 #define SK_CPU_LENDIAN 61 #endif 62 #endif 63 64 #if defined(__i386) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_X64) 65 #define SK_CPU_X86 1 66 #endif 67 68 #if defined(__loongarch__) || defined (__loongarch64) 69 #define SK_CPU_LOONGARCH 1 70 #endif 71 72 #if defined(__powerpc__) || defined (__powerpc64__) 73 #define SK_CPU_PPC 1 74 #endif 75 76 /** 77 * SK_CPU_SSE_LEVEL 78 * 79 * If defined, SK_CPU_SSE_LEVEL should be set to the highest supported level. 80 * On non-intel CPU this should be undefined. 81 */ 82 #define SK_CPU_SSE_LEVEL_SSE1 10 83 #define SK_CPU_SSE_LEVEL_SSE2 20 84 #define SK_CPU_SSE_LEVEL_SSE3 30 85 #define SK_CPU_SSE_LEVEL_SSSE3 31 86 #define SK_CPU_SSE_LEVEL_SSE41 41 87 #define SK_CPU_SSE_LEVEL_SSE42 42 88 #define SK_CPU_SSE_LEVEL_AVX 51 89 #define SK_CPU_SSE_LEVEL_AVX2 52 90 #define SK_CPU_SSE_LEVEL_SKX 60 91 92 /** 93 * SK_CPU_LSX_LEVEL 94 * 95 * If defined, SK_CPU_LSX_LEVEL should be set to the highest supported level. 96 * On non-loongarch CPU this should be undefined. 97 */ 98 #define SK_CPU_LSX_LEVEL_LSX 70 99 #define SK_CPU_LSX_LEVEL_LASX 80 100 101 // TODO(kjlubick) clean up these checks 102 103 // Are we in GCC/Clang? 104 #ifndef SK_CPU_SSE_LEVEL 105 // These checks must be done in descending order to ensure we set the highest 106 // available SSE level. 107 #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \ 108 defined(__AVX512BW__) && defined(__AVX512VL__) 109 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX 110 #elif defined(__AVX2__) 111 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2 112 #elif defined(__AVX__) 113 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX 114 #elif defined(__SSE4_2__) 115 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE42 116 #elif defined(__SSE4_1__) 117 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE41 118 #elif defined(__SSSE3__) 119 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSSE3 120 #elif defined(__SSE3__) 121 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE3 122 #elif defined(__SSE2__) 123 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 124 #endif 125 #endif 126 127 #ifndef SK_CPU_LSX_LEVEL 128 #if defined(__loongarch_asx) 129 #define SK_CPU_LSX_LEVEL SK_CPU_LSX_LEVEL_LASX 130 #elif defined(__loongarch_sx) 131 #define SK_CPU_LSX_LEVEL SK_CPU_LSX_LEVEL_LSX 132 #endif 133 #endif 134 135 // Are we in VisualStudio? 136 #ifndef SK_CPU_SSE_LEVEL 137 // These checks must be done in descending order to ensure we set the highest 138 // available SSE level. 64-bit intel guarantees at least SSE2 support. 139 #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \ 140 defined(__AVX512BW__) && defined(__AVX512VL__) 141 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX 142 #elif defined(__AVX2__) 143 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2 144 #elif defined(__AVX__) 145 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX 146 #elif defined(_M_X64) || defined(_M_AMD64) 147 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 148 #elif defined(_M_IX86_FP) 149 #if _M_IX86_FP >= 2 150 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 151 #elif _M_IX86_FP == 1 152 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE1 153 #endif 154 #endif 155 #endif 156 157 // ARM defines 158 #if defined(__arm__) && (!defined(__APPLE__) || !TARGET_IPHONE_SIMULATOR) 159 #define SK_CPU_ARM32 160 #elif defined(__aarch64__) 161 #define SK_CPU_ARM64 162 #endif 163 164 // All 64-bit ARM chips have NEON. Many 32-bit ARM chips do too. 165 #if !defined(SK_ARM_HAS_NEON) && defined(__ARM_NEON) 166 #define SK_ARM_HAS_NEON 167 #endif 168 169 #endif // SkFeatures_DEFINED 170