1Morello Platform
2================
3
4Morello is an ARMv8-A platform that implements the capability architecture extension.
5The platform port present at `site <https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git>`_
6provides ARMv8-A architecture enablement.
7
8Capability architecture specific changes will be added `here <https://git.morello-project.org/morello>`_
9
10Further information on Morello Platform is available at `info <https://developer.arm.com/architectures/cpu-architecture/a-profile/morello>`_
11
12Boot Sequence
13-------------
14
15The SCP initializes the RVBAR registers to point to the AP_BL1. Once RVBAR is
16initialized, the primary core is powered on. The primary core boots the AP_BL1.
17It performs minimum initialization necessary to load and authenticate the AP
18firmware image (the FIP image) from the AP QSPI NOR Flash Memory into the
19Trusted SRAM.
20
21AP_BL1 authenticates and loads the AP_BL2 image. AP_BL2 performs additional
22initializations, and then authenticates and loads the AP_BL31 and AP_BL33.
23AP_BL2 then transfers execution control to AP_BL31, which is the EL3 runtime
24firmware. Execution is finally handed off to AP_BL33, which is the non-secure
25world (UEFI).
26
27SCP -> AP_BL1 -> AP_BL2 -> AP_BL31 -> AP_BL33
28
29Build Procedure (TF-A only)
30~~~~~~~~~~~~~~~~~~~~~~~~~~~
31
32-  Obtain arm `toolchain <https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads>`_.
33   Set the CROSS_COMPILE environment variable to point to the toolchain folder.
34
35-  Build TF-A:
36
37   .. code:: shell
38
39      export CROSS_COMPILE=<path-to-aarch64-gcc>/bin/aarch64-none-elf-
40
41      make PLAT=morello all
42
43*Copyright (c) 2020-2023, Arm Limited. All rights reserved.*
44