1STM32MP2
2========
3
4STM32MP2 is a microprocessor designed by STMicroelectronics
5based on Arm Cortex-A35.
6
7For TF-A common configuration of STM32 MPUs, please check
8:ref:`STM32 MPUs` page.
9
10STM32MP2 Versions
11-----------------
12
13The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible:
14
15- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS
16- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS
17- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS
18- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet
19
20Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
21
22- A      Basic + Cortex-A35 @ 1GHz
23- C      Secure Boot + HW Crypto + Cortex-A35 @ 1GHz
24- D      Basic + Cortex-A35 @ 1.5GHz
25- F      Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz
26
27Memory mapping
28--------------
29
30::
31
32    0x00000000 +-----------------+
33               |                 |
34               |       ...       |
35               |                 |
36    0x0E000000 +-----------------+ \
37               |       BL31      | |
38               +-----------------+ |
39               |       ...       | |
40    0x0E012000 +-----------------+ |
41               |     BL2 DTB     | | Embedded SRAM
42    0x0E016000 +-----------------+ |
43               |       BL2       | |
44    0x0E040000 +-----------------+ /
45               |                 |
46               |       ...       |
47               |                 |
48    0x40000000 +-----------------+
49               |                 |
50               |                 |   Devices
51               |                 |
52    0x80000000 +-----------------+ \
53               |                 | |
54               |                 | | Non-secure RAM (DDR)
55               |                 | |
56    0xFFFFFFFF +-----------------+ /
57
58
59Build Instructions
60------------------
61
62STM32MP2x specific flags
63~~~~~~~~~~~~~~~~~~~~~~~~
64
65Dedicated STM32MP2 build flags:
66
67- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP.
68  | Default: 1
69- | ``STM32MP25``: to select STM32MP25 variant configuration.
70  | Default: 1
71
72To compile the correct DDR driver, one flag must be set among:
73
74- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT.
75  | Default: 0
76- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT.
77  | Default: 0
78- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT.
79  | Default: 0
80
81
82Boot with FIP
83~~~~~~~~~~~~~
84You need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) before building FIP binary.
85
86U-Boot
87______
88
89.. code:: bash
90
91    cd <u-boot_directory>
92    make stm32mp25_defconfig
93    make DEVICE_TREE=stm32mp257f-ev1 all
94
95OP-TEE
96______
97
98.. code:: bash
99
100    cd <optee_directory>
101    make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi-
102        ARCH=arm PLATFORM=stm32mp2 \
103        CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts
104
105TF-A BL2 & BL31
106_______________
107To build TF-A BL2 with its STM32 header and BL31 for SD-card boot:
108
109.. code:: bash
110
111    make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
112        STM32MP_DDR4_TYPE=1 SPD=opteed \
113        DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1
114
115For other boot devices, you have to replace STM32MP_SDMMC in the previous command
116with the desired device flag.
117
118
119FIP
120___
121
122.. code:: bash
123
124    make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
125        STM32MP_DDR4_TYPE=1 SPD=opteed \
126        DTB_FILE_NAME=stm32mp257f-ev1.dtb \
127        BL33=<u-boot_directory>/u-boot-nodtb.bin \
128        BL33_CFG=<u-boot_directory>/u-boot.dtb \
129        BL32=<optee_directory>/tee-header_v2.bin \
130        BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
131        fip
132
133*Copyright (c) 2023, STMicroelectronics - All Rights Reserved*
134