1 /* 2 * Copyright 2021-2024 NXP. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <lib/mmio.h> 8 9 #include <imx8ulp_caam.h> 10 imx8ulp_caam_init(void)11void imx8ulp_caam_init(void) 12 { 13 /* config CAAM JRaMID set MID to Cortex A */ 14 mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); 15 mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); 16 mmio_write_32(CAAM_JR2MID, CAAM_NS_MID); 17 mmio_write_32(CAAM_JR3MID, CAAM_NS_MID); 18 } 19