1 /************************************************************************** 2 * 3 * Copyright 2007 VMware, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef PIPE_DEFINES_H 29 #define PIPE_DEFINES_H 30 31 #include "p_compiler.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /** 38 * Gallium error codes. 39 * 40 * - A zero value always means success. 41 * - A negative value always means failure. 42 * - The meaning of a positive value is function dependent. 43 */ 44 enum pipe_error { 45 PIPE_OK = 0, 46 PIPE_ERROR = -1, /**< Generic error */ 47 PIPE_ERROR_BAD_INPUT = -2, 48 PIPE_ERROR_OUT_OF_MEMORY = -3, 49 PIPE_ERROR_RETRY = -4 50 /* TODO */ 51 }; 52 53 enum pipe_blendfactor { 54 PIPE_BLENDFACTOR_ONE = 1, 55 PIPE_BLENDFACTOR_SRC_COLOR, 56 PIPE_BLENDFACTOR_SRC_ALPHA, 57 PIPE_BLENDFACTOR_DST_ALPHA, 58 PIPE_BLENDFACTOR_DST_COLOR, 59 PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE, 60 PIPE_BLENDFACTOR_CONST_COLOR, 61 PIPE_BLENDFACTOR_CONST_ALPHA, 62 PIPE_BLENDFACTOR_SRC1_COLOR, 63 PIPE_BLENDFACTOR_SRC1_ALPHA, 64 65 PIPE_BLENDFACTOR_ZERO = 0x11, 66 PIPE_BLENDFACTOR_INV_SRC_COLOR, 67 PIPE_BLENDFACTOR_INV_SRC_ALPHA, 68 PIPE_BLENDFACTOR_INV_DST_ALPHA, 69 PIPE_BLENDFACTOR_INV_DST_COLOR, 70 71 PIPE_BLENDFACTOR_INV_CONST_COLOR = 0x17, 72 PIPE_BLENDFACTOR_INV_CONST_ALPHA, 73 PIPE_BLENDFACTOR_INV_SRC1_COLOR, 74 PIPE_BLENDFACTOR_INV_SRC1_ALPHA, 75 }; 76 77 enum pipe_blend_func { 78 PIPE_BLEND_ADD, 79 PIPE_BLEND_SUBTRACT, 80 PIPE_BLEND_REVERSE_SUBTRACT, 81 PIPE_BLEND_MIN, 82 PIPE_BLEND_MAX, 83 }; 84 85 enum pipe_logicop { 86 PIPE_LOGICOP_CLEAR, 87 PIPE_LOGICOP_NOR, 88 PIPE_LOGICOP_AND_INVERTED, 89 PIPE_LOGICOP_COPY_INVERTED, 90 PIPE_LOGICOP_AND_REVERSE, 91 PIPE_LOGICOP_INVERT, 92 PIPE_LOGICOP_XOR, 93 PIPE_LOGICOP_NAND, 94 PIPE_LOGICOP_AND, 95 PIPE_LOGICOP_EQUIV, 96 PIPE_LOGICOP_NOOP, 97 PIPE_LOGICOP_OR_INVERTED, 98 PIPE_LOGICOP_COPY, 99 PIPE_LOGICOP_OR_REVERSE, 100 PIPE_LOGICOP_OR, 101 PIPE_LOGICOP_SET, 102 }; 103 104 #define PIPE_MASK_R 0x1 105 #define PIPE_MASK_G 0x2 106 #define PIPE_MASK_B 0x4 107 #define PIPE_MASK_A 0x8 108 #define PIPE_MASK_RGBA 0xf 109 #define PIPE_MASK_Z 0x10 110 #define PIPE_MASK_S 0x20 111 #define PIPE_MASK_ZS 0x30 112 #define PIPE_MASK_RGBAZS (PIPE_MASK_RGBA|PIPE_MASK_ZS) 113 114 115 /** 116 * Inequality functions. Used for depth test, stencil compare, alpha 117 * test, shadow compare, etc. 118 */ 119 enum pipe_compare_func { 120 PIPE_FUNC_NEVER, 121 PIPE_FUNC_LESS, 122 PIPE_FUNC_EQUAL, 123 PIPE_FUNC_LEQUAL, 124 PIPE_FUNC_GREATER, 125 PIPE_FUNC_NOTEQUAL, 126 PIPE_FUNC_GEQUAL, 127 PIPE_FUNC_ALWAYS, 128 }; 129 130 /** Polygon fill mode */ 131 enum { 132 PIPE_POLYGON_MODE_FILL, 133 PIPE_POLYGON_MODE_LINE, 134 PIPE_POLYGON_MODE_POINT, 135 }; 136 137 /** Polygon face specification, eg for culling */ 138 #define PIPE_FACE_NONE 0 139 #define PIPE_FACE_FRONT 1 140 #define PIPE_FACE_BACK 2 141 #define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK) 142 143 /** Stencil ops */ 144 enum pipe_stencil_op { 145 PIPE_STENCIL_OP_KEEP, 146 PIPE_STENCIL_OP_ZERO, 147 PIPE_STENCIL_OP_REPLACE, 148 PIPE_STENCIL_OP_INCR, 149 PIPE_STENCIL_OP_DECR, 150 PIPE_STENCIL_OP_INCR_WRAP, 151 PIPE_STENCIL_OP_DECR_WRAP, 152 PIPE_STENCIL_OP_INVERT, 153 }; 154 155 /** Texture types. 156 * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D */ 157 enum pipe_texture_target 158 { 159 PIPE_BUFFER, 160 PIPE_TEXTURE_1D, 161 PIPE_TEXTURE_2D, 162 PIPE_TEXTURE_3D, 163 PIPE_TEXTURE_CUBE, 164 PIPE_TEXTURE_RECT, 165 PIPE_TEXTURE_1D_ARRAY, 166 PIPE_TEXTURE_2D_ARRAY, 167 PIPE_TEXTURE_CUBE_ARRAY, 168 PIPE_MAX_TEXTURE_TYPES, 169 }; 170 171 enum pipe_tex_face { 172 PIPE_TEX_FACE_POS_X, 173 PIPE_TEX_FACE_NEG_X, 174 PIPE_TEX_FACE_POS_Y, 175 PIPE_TEX_FACE_NEG_Y, 176 PIPE_TEX_FACE_POS_Z, 177 PIPE_TEX_FACE_NEG_Z, 178 PIPE_TEX_FACE_MAX, 179 }; 180 181 enum pipe_tex_wrap { 182 PIPE_TEX_WRAP_REPEAT, 183 PIPE_TEX_WRAP_CLAMP, 184 PIPE_TEX_WRAP_CLAMP_TO_EDGE, 185 PIPE_TEX_WRAP_CLAMP_TO_BORDER, 186 PIPE_TEX_WRAP_MIRROR_REPEAT, 187 PIPE_TEX_WRAP_MIRROR_CLAMP, 188 PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE, 189 PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER, 190 }; 191 192 /* Between mipmaps, ie mipfilter 193 */ 194 enum pipe_tex_mipfilter { 195 PIPE_TEX_MIPFILTER_NEAREST, 196 PIPE_TEX_MIPFILTER_LINEAR, 197 PIPE_TEX_MIPFILTER_NONE, 198 }; 199 200 /* Within a mipmap, ie min/mag filter 201 */ 202 enum pipe_tex_filter { 203 PIPE_TEX_FILTER_NEAREST, 204 PIPE_TEX_FILTER_LINEAR, 205 }; 206 207 enum pipe_tex_compare { 208 PIPE_TEX_COMPARE_NONE, 209 PIPE_TEX_COMPARE_R_TO_TEXTURE, 210 }; 211 212 /** 213 * Clear buffer bits 214 */ 215 #define PIPE_CLEAR_DEPTH (1 << 0) 216 #define PIPE_CLEAR_STENCIL (1 << 1) 217 #define PIPE_CLEAR_COLOR0 (1 << 2) 218 #define PIPE_CLEAR_COLOR1 (1 << 3) 219 #define PIPE_CLEAR_COLOR2 (1 << 4) 220 #define PIPE_CLEAR_COLOR3 (1 << 5) 221 #define PIPE_CLEAR_COLOR4 (1 << 6) 222 #define PIPE_CLEAR_COLOR5 (1 << 7) 223 #define PIPE_CLEAR_COLOR6 (1 << 8) 224 #define PIPE_CLEAR_COLOR7 (1 << 9) 225 /** Combined flags */ 226 /** All color buffers currently bound */ 227 #define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \ 228 PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \ 229 PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \ 230 PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7) 231 #define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL) 232 233 /** 234 * Transfer object usage flags 235 */ 236 enum pipe_transfer_usage { 237 /** 238 * Resource contents read back (or accessed directly) at transfer 239 * create time. 240 */ 241 PIPE_TRANSFER_READ = (1 << 0), 242 243 /** 244 * Resource contents will be written back at transfer_unmap 245 * time (or modified as a result of being accessed directly). 246 */ 247 PIPE_TRANSFER_WRITE = (1 << 1), 248 249 /** 250 * Read/modify/write 251 */ 252 PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE, 253 254 /** 255 * The transfer should map the texture storage directly. The driver may 256 * return NULL if that isn't possible, and the state tracker needs to cope 257 * with that and use an alternative path without this flag. 258 * 259 * E.g. the state tracker could have a simpler path which maps textures and 260 * does read/modify/write cycles on them directly, and a more complicated 261 * path which uses minimal read and write transfers. 262 */ 263 PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2), 264 265 /** 266 * Discards the memory within the mapped region. 267 * 268 * It should not be used with PIPE_TRANSFER_READ. 269 * 270 * See also: 271 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. 272 */ 273 PIPE_TRANSFER_DISCARD_RANGE = (1 << 8), 274 275 /** 276 * Fail if the resource cannot be mapped immediately. 277 * 278 * See also: 279 * - Direct3D's D3DLOCK_DONOTWAIT flag. 280 * - Mesa3D's MESA_MAP_NOWAIT_BIT flag. 281 * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. 282 */ 283 PIPE_TRANSFER_DONTBLOCK = (1 << 9), 284 285 /** 286 * Do not attempt to synchronize pending operations on the resource when mapping. 287 * 288 * It should not be used with PIPE_TRANSFER_READ. 289 * 290 * See also: 291 * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. 292 * - Direct3D's D3DLOCK_NOOVERWRITE flag. 293 * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. 294 */ 295 PIPE_TRANSFER_UNSYNCHRONIZED = (1 << 10), 296 297 /** 298 * Written ranges will be notified later with 299 * pipe_context::transfer_flush_region. 300 * 301 * It should not be used with PIPE_TRANSFER_READ. 302 * 303 * See also: 304 * - pipe_context::transfer_flush_region 305 * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. 306 */ 307 PIPE_TRANSFER_FLUSH_EXPLICIT = (1 << 11), 308 309 /** 310 * Discards all memory backing the resource. 311 * 312 * It should not be used with PIPE_TRANSFER_READ. 313 * 314 * This is equivalent to: 315 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT 316 * - BufferData(NULL) on a GL buffer 317 * - Direct3D's D3DLOCK_DISCARD flag. 318 * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag. 319 * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag 320 * - D3D10's D3D10_MAP_WRITE_DISCARD flag. 321 */ 322 PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12), 323 324 /** 325 * Allows the resource to be used for rendering while mapped. 326 * 327 * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating 328 * the resource. 329 * 330 * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) 331 * must be called to ensure the device can see what the CPU has written. 332 */ 333 PIPE_TRANSFER_PERSISTENT = (1 << 13), 334 335 /** 336 * If PERSISTENT is set, this ensures any writes done by the device are 337 * immediately visible to the CPU and vice versa. 338 * 339 * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating 340 * the resource. 341 */ 342 PIPE_TRANSFER_COHERENT = (1 << 14) 343 }; 344 345 /** 346 * Flags for the flush function. 347 */ 348 enum pipe_flush_flags { 349 PIPE_FLUSH_END_OF_FRAME = (1 << 0) 350 }; 351 352 /** 353 * Flags for pipe_context::memory_barrier. 354 */ 355 #define PIPE_BARRIER_MAPPED_BUFFER (1 << 0) 356 #define PIPE_BARRIER_SHADER_BUFFER (1 << 1) 357 #define PIPE_BARRIER_QUERY_BUFFER (1 << 2) 358 #define PIPE_BARRIER_VERTEX_BUFFER (1 << 3) 359 #define PIPE_BARRIER_INDEX_BUFFER (1 << 4) 360 #define PIPE_BARRIER_CONSTANT_BUFFER (1 << 5) 361 #define PIPE_BARRIER_INDIRECT_BUFFER (1 << 6) 362 #define PIPE_BARRIER_TEXTURE (1 << 7) 363 #define PIPE_BARRIER_IMAGE (1 << 8) 364 #define PIPE_BARRIER_FRAMEBUFFER (1 << 9) 365 #define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10) 366 #define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11) 367 #define PIPE_BARRIER_ALL ((1 << 12) - 1) 368 369 /** 370 * Flags for pipe_context::texture_barrier. 371 */ 372 #define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0) 373 #define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1) 374 375 /* 376 * Resource binding flags -- state tracker must specify in advance all 377 * the ways a resource might be used. 378 */ 379 #define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */ 380 #define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */ 381 #define PIPE_BIND_BLENDABLE (1 << 2) /* create_surface */ 382 #define PIPE_BIND_SAMPLER_VIEW (1 << 3) /* create_sampler_view */ 383 #define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */ 384 #define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */ 385 #define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */ 386 #define PIPE_BIND_DISPLAY_TARGET (1 << 8) /* flush_front_buffer */ 387 #define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* transfer_map */ 388 #define PIPE_BIND_TRANSFER_READ (1 << 10) /* transfer_map */ 389 #define PIPE_BIND_STREAM_OUTPUT (1 << 11) /* set_stream_output_buffers */ 390 #define PIPE_BIND_CURSOR (1 << 16) /* mouse cursor */ 391 #define PIPE_BIND_CUSTOM (1 << 17) /* state-tracker/winsys usages */ 392 #define PIPE_BIND_GLOBAL (1 << 18) /* set_global_binding */ 393 #define PIPE_BIND_SHADER_RESOURCE (1 << 19) /* set_shader_resources */ 394 #define PIPE_BIND_COMPUTE_RESOURCE (1 << 20) /* set_compute_resources */ 395 #define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 21) /* pipe_draw_info.indirect */ 396 #define PIPE_BIND_QUERY_BUFFER (1 << 22) /* get_query_result_resource */ 397 398 /* The first two flags above were previously part of the amorphous 399 * TEXTURE_USAGE, most of which are now descriptions of the ways a 400 * particular texture can be bound to the gallium pipeline. The two flags 401 * below do not fit within that and probably need to be migrated to some 402 * other place. 403 * 404 * It seems like scanout is used by the Xorg state tracker to ask for 405 * a texture suitable for actual scanout (hence the name), which 406 * implies extra layout constraints on some hardware. It may also 407 * have some special meaning regarding mouse cursor images. 408 * 409 * The shared flag is quite underspecified, but certainly isn't a 410 * binding flag - it seems more like a message to the winsys to create 411 * a shareable allocation. 412 * 413 * The third flag has been added to be able to force textures to be created 414 * in linear mode (no tiling). 415 */ 416 #define PIPE_BIND_SCANOUT (1 << 14) /* */ 417 #define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */ 418 #define PIPE_BIND_LINEAR (1 << 21) 419 420 421 /* Flags for the driver about resource behaviour: 422 */ 423 #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0) 424 #define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1) 425 #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */ 426 #define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */ 427 428 /** 429 * Hint about the expected lifecycle of a resource. 430 * Sorted according to GPU vs CPU access. 431 */ 432 enum pipe_resource_usage { 433 PIPE_USAGE_DEFAULT, /* fast GPU access */ 434 PIPE_USAGE_IMMUTABLE, /* fast GPU access, immutable */ 435 PIPE_USAGE_DYNAMIC, /* uploaded data is used multiple times */ 436 PIPE_USAGE_STREAM, /* uploaded data is used once */ 437 PIPE_USAGE_STAGING, /* fast CPU access */ 438 }; 439 440 /** 441 * Shaders 442 */ 443 enum pipe_shader_type { 444 PIPE_SHADER_VERTEX, 445 PIPE_SHADER_FRAGMENT, 446 PIPE_SHADER_GEOMETRY, 447 PIPE_SHADER_TESS_CTRL, 448 PIPE_SHADER_TESS_EVAL, 449 PIPE_SHADER_COMPUTE, 450 PIPE_SHADER_TYPES, 451 PIPE_SHADER_INVALID, 452 }; 453 454 /** 455 * Primitive types: 456 */ 457 enum pipe_prim_type { 458 PIPE_PRIM_POINTS, 459 PIPE_PRIM_LINES, 460 PIPE_PRIM_LINE_LOOP, 461 PIPE_PRIM_LINE_STRIP, 462 PIPE_PRIM_TRIANGLES, 463 PIPE_PRIM_TRIANGLE_STRIP, 464 PIPE_PRIM_TRIANGLE_FAN, 465 PIPE_PRIM_QUADS, 466 PIPE_PRIM_QUAD_STRIP, 467 PIPE_PRIM_POLYGON, 468 PIPE_PRIM_LINES_ADJACENCY, 469 PIPE_PRIM_LINE_STRIP_ADJACENCY, 470 PIPE_PRIM_TRIANGLES_ADJACENCY, 471 PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY, 472 PIPE_PRIM_PATCHES, 473 PIPE_PRIM_MAX, 474 } ENUM_PACKED; 475 476 /** 477 * Tessellator spacing types 478 */ 479 enum pipe_tess_spacing { 480 PIPE_TESS_SPACING_FRACTIONAL_ODD, 481 PIPE_TESS_SPACING_FRACTIONAL_EVEN, 482 PIPE_TESS_SPACING_EQUAL, 483 }; 484 485 /** 486 * Query object types 487 */ 488 enum pipe_query_type { 489 PIPE_QUERY_OCCLUSION_COUNTER, 490 PIPE_QUERY_OCCLUSION_PREDICATE, 491 PIPE_QUERY_TIMESTAMP, 492 PIPE_QUERY_TIMESTAMP_DISJOINT, 493 PIPE_QUERY_TIME_ELAPSED, 494 PIPE_QUERY_PRIMITIVES_GENERATED, 495 PIPE_QUERY_PRIMITIVES_EMITTED, 496 PIPE_QUERY_SO_STATISTICS, 497 PIPE_QUERY_SO_OVERFLOW_PREDICATE, 498 PIPE_QUERY_GPU_FINISHED, 499 PIPE_QUERY_PIPELINE_STATISTICS, 500 PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE, 501 PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE, 502 PIPE_QUERY_TYPES, 503 /* start of driver queries, see pipe_screen::get_driver_query_info */ 504 PIPE_QUERY_DRIVER_SPECIFIC = 256, 505 }; 506 507 /** 508 * Conditional rendering modes 509 */ 510 enum pipe_render_cond_flag { 511 PIPE_RENDER_COND_WAIT, 512 PIPE_RENDER_COND_NO_WAIT, 513 PIPE_RENDER_COND_BY_REGION_WAIT, 514 PIPE_RENDER_COND_BY_REGION_NO_WAIT, 515 }; 516 517 /** 518 * Point sprite coord modes 519 */ 520 enum pipe_sprite_coord_mode { 521 PIPE_SPRITE_COORD_UPPER_LEFT, 522 PIPE_SPRITE_COORD_LOWER_LEFT, 523 }; 524 525 /** 526 * Texture swizzles 527 */ 528 enum pipe_swizzle { 529 PIPE_SWIZZLE_RED, 530 PIPE_SWIZZLE_GREEN, 531 PIPE_SWIZZLE_BLUE, 532 PIPE_SWIZZLE_ALPHA, 533 PIPE_SWIZZLE_ZERO, 534 PIPE_SWIZZLE_ONE, 535 }; 536 537 #define PIPE_TIMEOUT_INFINITE 0xffffffffffffffffull 538 539 /** 540 * pipe_image_view access flags. 541 */ 542 #define PIPE_IMAGE_ACCESS_READ (1 << 0) 543 #define PIPE_IMAGE_ACCESS_WRITE (1 << 1) 544 #define PIPE_IMAGE_ACCESS_READ_WRITE (PIPE_IMAGE_ACCESS_READ | \ 545 PIPE_IMAGE_ACCESS_WRITE) 546 547 /** 548 * Implementation capabilities/limits which are queried through 549 * pipe_screen::get_param() 550 */ 551 enum pipe_cap { 552 PIPE_CAP_NPOT_TEXTURES = 1, 553 PIPE_CAP_TWO_SIDED_STENCIL = 2, 554 PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS = 4, 555 PIPE_CAP_ANISOTROPIC_FILTER = 5, 556 PIPE_CAP_POINT_SPRITE = 6, 557 PIPE_CAP_MAX_RENDER_TARGETS = 7, 558 PIPE_CAP_OCCLUSION_QUERY = 8, 559 PIPE_CAP_QUERY_TIME_ELAPSED = 9, 560 PIPE_CAP_TEXTURE_SHADOW_MAP = 10, 561 PIPE_CAP_TEXTURE_SWIZZLE = 11, 562 PIPE_CAP_MAX_TEXTURE_2D_LEVELS = 12, 563 PIPE_CAP_MAX_TEXTURE_3D_LEVELS = 13, 564 PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS = 14, 565 PIPE_CAP_TEXTURE_MIRROR_CLAMP = 25, 566 PIPE_CAP_BLEND_EQUATION_SEPARATE = 28, 567 PIPE_CAP_SM3 = 29, /*< Shader Model, supported */ 568 PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS = 30, 569 PIPE_CAP_PRIMITIVE_RESTART = 31, 570 /** blend enables and write masks per rendertarget */ 571 PIPE_CAP_INDEP_BLEND_ENABLE = 33, 572 /** different blend funcs per rendertarget */ 573 PIPE_CAP_INDEP_BLEND_FUNC = 34, 574 PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS = 36, 575 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT = 37, 576 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT = 38, 577 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER = 39, 578 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER = 40, 579 PIPE_CAP_DEPTH_CLIP_DISABLE = 41, 580 PIPE_CAP_SHADER_STENCIL_EXPORT = 42, 581 PIPE_CAP_TGSI_INSTANCEID = 43, 582 PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR = 44, 583 PIPE_CAP_FRAGMENT_COLOR_CLAMPED = 45, 584 PIPE_CAP_MIXED_COLORBUFFER_FORMATS = 46, 585 PIPE_CAP_SEAMLESS_CUBE_MAP = 47, 586 PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE = 48, 587 PIPE_CAP_MIN_TEXEL_OFFSET = 50, 588 PIPE_CAP_MAX_TEXEL_OFFSET = 51, 589 PIPE_CAP_CONDITIONAL_RENDER = 52, 590 PIPE_CAP_TEXTURE_BARRIER = 53, 591 PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS = 55, 592 PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS = 56, 593 PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME = 57, 594 PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS = 59, /* temporary */ 595 PIPE_CAP_VERTEX_COLOR_UNCLAMPED = 60, 596 PIPE_CAP_VERTEX_COLOR_CLAMPED = 61, 597 PIPE_CAP_GLSL_FEATURE_LEVEL = 62, 598 PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION = 63, 599 PIPE_CAP_USER_VERTEX_BUFFERS = 64, 600 PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY = 65, 601 PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY = 66, 602 PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY = 67, 603 PIPE_CAP_COMPUTE = 68, 604 PIPE_CAP_USER_INDEX_BUFFERS = 69, 605 PIPE_CAP_USER_CONSTANT_BUFFERS = 70, 606 PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT = 71, 607 PIPE_CAP_START_INSTANCE = 72, 608 PIPE_CAP_QUERY_TIMESTAMP = 73, 609 PIPE_CAP_TEXTURE_MULTISAMPLE = 74, 610 PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT = 75, 611 PIPE_CAP_CUBE_MAP_ARRAY = 76, 612 PIPE_CAP_TEXTURE_BUFFER_OBJECTS = 77, 613 PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT = 78, 614 PIPE_CAP_TGSI_TEXCOORD = 79, 615 PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 80, 616 PIPE_CAP_QUERY_PIPELINE_STATISTICS = 81, 617 PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK = 82, 618 PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE = 83, 619 PIPE_CAP_MAX_VIEWPORTS = 84, 620 PIPE_CAP_ENDIANNESS = 85, 621 PIPE_CAP_MIXED_FRAMEBUFFER_SIZES = 86, 622 PIPE_CAP_TGSI_VS_LAYER_VIEWPORT = 87, 623 PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES = 88, 624 PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS = 89, 625 PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS = 90, 626 PIPE_CAP_TEXTURE_GATHER_SM5 = 91, 627 PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT = 92, 628 PIPE_CAP_FAKE_SW_MSAA = 93, 629 PIPE_CAP_TEXTURE_QUERY_LOD = 94, 630 PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET = 95, 631 PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET = 96, 632 PIPE_CAP_SAMPLE_SHADING = 97, 633 PIPE_CAP_TEXTURE_GATHER_OFFSETS = 98, 634 PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION = 99, 635 PIPE_CAP_MAX_VERTEX_STREAMS = 100, 636 PIPE_CAP_DRAW_INDIRECT = 101, 637 PIPE_CAP_TGSI_FS_FINE_DERIVATIVE = 102, 638 PIPE_CAP_VENDOR_ID = 103, 639 PIPE_CAP_DEVICE_ID = 104, 640 PIPE_CAP_ACCELERATED = 105, 641 PIPE_CAP_VIDEO_MEMORY = 106, 642 PIPE_CAP_UMA = 107, 643 PIPE_CAP_CONDITIONAL_RENDER_INVERTED = 108, 644 PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE = 109, 645 PIPE_CAP_SAMPLER_VIEW_TARGET = 110, 646 PIPE_CAP_CLIP_HALFZ = 111, 647 PIPE_CAP_VERTEXID_NOBASE = 112, 648 PIPE_CAP_POLYGON_OFFSET_CLAMP = 113, 649 }; 650 651 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0) 652 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1) 653 654 enum pipe_endian { 655 PIPE_ENDIAN_LITTLE = 0, 656 PIPE_ENDIAN_BIG = 1, 657 #if UTIL_ARCH_LITTLE_ENDIAN 658 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE 659 #elif UTIL_ARCH_BIG_ENDIAN 660 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG 661 #endif 662 }; 663 664 /** 665 * Implementation limits which are queried through 666 * pipe_screen::get_paramf() 667 */ 668 enum pipe_capf 669 { 670 PIPE_CAPF_MAX_LINE_WIDTH, 671 PIPE_CAPF_MAX_LINE_WIDTH_AA, 672 PIPE_CAPF_MAX_POINT_WIDTH, 673 PIPE_CAPF_MAX_POINT_WIDTH_AA, 674 PIPE_CAPF_MAX_TEXTURE_ANISOTROPY, 675 PIPE_CAPF_MAX_TEXTURE_LOD_BIAS, 676 PIPE_CAPF_GUARD_BAND_LEFT, 677 PIPE_CAPF_GUARD_BAND_TOP, 678 PIPE_CAPF_GUARD_BAND_RIGHT, 679 PIPE_CAPF_GUARD_BAND_BOTTOM 680 }; 681 682 /* Shader caps not specific to any single stage */ 683 enum pipe_shader_cap 684 { 685 PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */ 686 PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS, 687 PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS, 688 PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS, 689 PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH, 690 PIPE_SHADER_CAP_MAX_INPUTS, 691 PIPE_SHADER_CAP_MAX_OUTPUTS, 692 PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE, 693 PIPE_SHADER_CAP_MAX_CONST_BUFFERS, 694 PIPE_SHADER_CAP_MAX_TEMPS, 695 PIPE_SHADER_CAP_MAX_PREDS, 696 /* boolean caps */ 697 PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED, 698 PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR, 699 PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR, 700 PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR, 701 PIPE_SHADER_CAP_INDIRECT_CONST_ADDR, 702 PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */ 703 PIPE_SHADER_CAP_INTEGERS, 704 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS, 705 PIPE_SHADER_CAP_PREFERRED_IR, 706 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED, 707 PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS, 708 PIPE_SHADER_CAP_DOUBLES 709 }; 710 711 /** 712 * Shader intermediate representation. 713 */ 714 enum pipe_shader_ir 715 { 716 PIPE_SHADER_IR_TGSI, 717 PIPE_SHADER_IR_LLVM, 718 PIPE_SHADER_IR_NATIVE 719 }; 720 721 /** 722 * Compute-specific implementation capability. They can be queried 723 * using pipe_screen::get_compute_param. 724 */ 725 enum pipe_compute_cap 726 { 727 PIPE_COMPUTE_CAP_IR_TARGET, 728 PIPE_COMPUTE_CAP_GRID_DIMENSION, 729 PIPE_COMPUTE_CAP_MAX_GRID_SIZE, 730 PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE, 731 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, 732 PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, 733 PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE, 734 PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE, 735 PIPE_COMPUTE_CAP_MAX_INPUT_SIZE, 736 PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, 737 PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY, 738 PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS, 739 PIPE_COMPUTE_CAP_IMAGES_SUPPORTED 740 }; 741 742 /** 743 * Composite query types 744 */ 745 746 /** 747 * Query result for PIPE_QUERY_SO_STATISTICS. 748 */ 749 struct pipe_query_data_so_statistics 750 { 751 uint64_t num_primitives_written; 752 uint64_t primitives_storage_needed; 753 }; 754 755 /** 756 * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT. 757 */ 758 struct pipe_query_data_timestamp_disjoint 759 { 760 uint64_t frequency; 761 boolean disjoint; 762 }; 763 764 /** 765 * Query result for PIPE_QUERY_PIPELINE_STATISTICS. 766 */ 767 struct pipe_query_data_pipeline_statistics 768 { 769 uint64_t ia_vertices; /**< Num vertices read by the vertex fetcher. */ 770 uint64_t ia_primitives; /**< Num primitives read by the vertex fetcher. */ 771 uint64_t vs_invocations; /**< Num vertex shader invocations. */ 772 uint64_t gs_invocations; /**< Num geometry shader invocations. */ 773 uint64_t gs_primitives; /**< Num primitives output by a geometry shader. */ 774 uint64_t c_invocations; /**< Num primitives sent to the rasterizer. */ 775 uint64_t c_primitives; /**< Num primitives that were rendered. */ 776 uint64_t ps_invocations; /**< Num pixel shader invocations. */ 777 uint64_t hs_invocations; /**< Num hull shader invocations. */ 778 uint64_t ds_invocations; /**< Num domain shader invocations. */ 779 uint64_t cs_invocations; /**< Num compute shader invocations. */ 780 }; 781 782 /** 783 * Query result (returned by pipe_context::get_query_result). 784 */ 785 union pipe_query_result 786 { 787 /* PIPE_QUERY_OCCLUSION_PREDICATE */ 788 /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */ 789 /* PIPE_QUERY_GPU_FINISHED */ 790 boolean b; 791 792 /* PIPE_QUERY_OCCLUSION_COUNTER */ 793 /* PIPE_QUERY_TIMESTAMP */ 794 /* PIPE_QUERY_TIME_ELAPSED */ 795 /* PIPE_QUERY_PRIMITIVES_GENERATED */ 796 /* PIPE_QUERY_PRIMITIVES_EMITTED */ 797 uint64_t u64; 798 799 /* PIPE_QUERY_SO_STATISTICS */ 800 struct pipe_query_data_so_statistics so_statistics; 801 802 /* PIPE_QUERY_TIMESTAMP_DISJOINT */ 803 struct pipe_query_data_timestamp_disjoint timestamp_disjoint; 804 805 /* PIPE_QUERY_PIPELINE_STATISTICS */ 806 struct pipe_query_data_pipeline_statistics pipeline_statistics; 807 }; 808 809 enum pipe_query_value_type 810 { 811 PIPE_QUERY_TYPE_I32, 812 PIPE_QUERY_TYPE_U32, 813 PIPE_QUERY_TYPE_I64, 814 PIPE_QUERY_TYPE_U64, 815 }; 816 817 union pipe_color_union 818 { 819 float f[4]; 820 int i[4]; 821 unsigned int ui[4]; 822 }; 823 824 struct pipe_driver_query_info 825 { 826 const char *name; 827 unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */ 828 uint64_t max_value; /* max value that can be returned */ 829 boolean uses_byte_units; /* whether the result is in bytes */ 830 }; 831 832 #ifdef __cplusplus 833 } 834 #endif 835 836 #endif 837