1 /* 2 * Copyright (C) 2010-2019 NXP Semiconductors 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #ifndef _PHNXPNCIHAL_H_ 17 #define _PHNXPNCIHAL_H_ 18 19 #include <hardware/nfc.h> 20 #include <phNxpNciHal_utils.h> 21 #include "NxpMfcReader.h" 22 #include "NxpNfcCapability.h" 23 24 /********************* Definitions and structures *****************************/ 25 #define MAX_INIT_RETRY_COUNT 3 26 #define MAX_RETRY_COUNT 5 27 #define NCI_MAX_DATA_LEN 300 28 #define NCI_POLL_DURATION 500 29 #define HAL_NFC_ENABLE_I2C_FRAGMENTATION_EVT 0x07 30 #undef P2P_PRIO_LOGIC_HAL_IMP 31 #define NCI_VERSION_2_0 0x20 32 #define NCI_VERSION_1_1 0x11 33 #define NCI_VERSION_1_0 0x10 34 #define NCI_VERSION_UNKNOWN 0x00 35 typedef void(phNxpNciHal_control_granted_callback_t)(); 36 37 /*ROM CODE VERSION FW*/ 38 #define FW_MOBILE_ROM_VERSION_PN551 0x10 39 #define FW_MOBILE_ROM_VERSION_PN553 0x11 40 #define FW_MOBILE_ROM_VERSION_PN557 0x12 41 /* NCI Data */ 42 43 #define NCI_MT_CMD 0x20 44 #define NCI_MT_RSP 0x40 45 #define NCI_MT_NTF 0x60 46 47 #define CORE_RESET_TRIGGER_TYPE_CORE_RESET_CMD_RECEIVED 0x02 48 #define CORE_RESET_TRIGGER_TYPE_POWERED_ON 0x01 49 #define NCI_MSG_CORE_RESET 0x00 50 #define NCI_MSG_CORE_INIT 0x01 51 #define NCI_MT_MASK 0xE0 52 #define NCI_OID_MASK 0x3F 53 54 #define NXP_MAX_CONFIG_STRING_LEN 260 55 #define NCI_HEADER_SIZE 3 56 57 typedef struct nci_data { 58 uint16_t len; 59 uint8_t p_data[NCI_MAX_DATA_LEN]; 60 } nci_data_t; 61 62 typedef enum { 63 HAL_STATUS_CLOSE = 0, 64 HAL_STATUS_OPEN, 65 HAL_STATUS_MIN_OPEN 66 } phNxpNci_HalStatus; 67 68 typedef enum { 69 GPIO_UNKNOWN = 0x00, 70 GPIO_STORE = 0x01, 71 GPIO_STORE_DONE = 0x02, 72 GPIO_RESTORE = 0x10, 73 GPIO_RESTORE_DONE = 0x20, 74 GPIO_CLEAR = 0xFF 75 } phNxpNciHal_GpioInfoState; 76 77 typedef struct phNxpNciGpioInfo { 78 phNxpNciHal_GpioInfoState state; 79 uint8_t values[2]; 80 } phNxpNciGpioInfo_t; 81 82 /* Macros to enable and disable extensions */ 83 #define HAL_ENABLE_EXT() (nxpncihal_ctrl.hal_ext_enabled = 1) 84 #define HAL_DISABLE_EXT() (nxpncihal_ctrl.hal_ext_enabled = 0) 85 typedef struct phNxpNciInfo { 86 uint8_t nci_version; 87 bool_t wait_for_ntf; 88 } phNxpNciInfo_t; 89 /* NCI Control structure */ 90 typedef struct phNxpNciHal_Control { 91 phNxpNci_HalStatus halStatus; /* Indicate if hal is open or closed */ 92 pthread_t client_thread; /* Integration thread handle */ 93 uint8_t thread_running; /* Thread running if set to 1, else set to 0 */ 94 phLibNfc_sConfig_t gDrvCfg; /* Driver config data */ 95 96 /* Rx data */ 97 uint8_t* p_rx_data; 98 uint16_t rx_data_len; 99 100 /* Rx data */ 101 uint8_t* p_rx_ese_data; 102 uint16_t rx_ese_data_len; 103 104 /* libnfc-nci callbacks */ 105 nfc_stack_callback_t* p_nfc_stack_cback; 106 nfc_stack_data_callback_t* p_nfc_stack_data_cback; 107 108 /* control granted callback */ 109 phNxpNciHal_control_granted_callback_t* p_control_granted_cback; 110 111 /* HAL open status */ 112 bool_t hal_open_status; 113 114 /* HAL extensions */ 115 uint8_t hal_ext_enabled; 116 117 /* Waiting semaphore */ 118 phNxpNciHal_Sem_t ext_cb_data; 119 sem_t syncSpiNfc; 120 121 uint16_t cmd_len; 122 uint8_t p_cmd_data[NCI_MAX_DATA_LEN]; 123 uint16_t rsp_len; 124 uint8_t p_rsp_data[NCI_MAX_DATA_LEN]; 125 126 /* retry count used to force download */ 127 uint16_t retry_cnt; 128 uint8_t read_retry_cnt; 129 phNxpNciInfo_t nci_info; 130 131 /* to store and restore gpio values */ 132 phNxpNciGpioInfo_t phNxpNciGpioInfo; 133 } phNxpNciHal_Control_t; 134 135 typedef struct phNxpNciClock { 136 bool_t isClockSet; 137 uint8_t p_rx_data[20]; 138 bool_t issetConfig; 139 } phNxpNciClock_t; 140 141 typedef struct phNxpNciRfSetting { 142 bool_t isGetRfSetting; 143 uint8_t p_rx_data[20]; 144 } phNxpNciRfSetting_t; 145 146 typedef struct phNxpNciMwEepromArea { 147 bool_t isGetEepromArea; 148 uint8_t p_rx_data[32]; 149 } phNxpNciMwEepromArea_t; 150 151 typedef enum { 152 NFC_FORUM_PROFILE, 153 EMV_CO_PROFILE, 154 INVALID_PROFILe 155 } phNxpNciProfile_t; 156 /* NXP Poll Profile control structure */ 157 typedef struct phNxpNciProfile_Control { 158 phNxpNciProfile_t profile_type; 159 uint8_t bClkSrcVal; /* Holds the System clock source read from config file */ 160 uint8_t 161 bClkFreqVal; /* Holds the System clock frequency read from config file */ 162 uint8_t bTimeout; /* Holds the Timeout Value */ 163 } phNxpNciProfile_Control_t; 164 165 /* Internal messages to handle callbacks */ 166 #define NCI_HAL_OPEN_CPLT_MSG 0x411 167 #define NCI_HAL_CLOSE_CPLT_MSG 0x412 168 #define NCI_HAL_POST_INIT_CPLT_MSG 0x413 169 #define NCI_HAL_PRE_DISCOVER_CPLT_MSG 0x414 170 #define NCI_HAL_ERROR_MSG 0x415 171 #define NCI_HAL_HCI_NETWORK_RESET_MSG 0x416 172 #define NCI_HAL_RX_MSG 0xF01 173 174 #define NCIHAL_CMD_CODE_LEN_BYTE_OFFSET (2U) 175 #define NCIHAL_CMD_CODE_BYTE_LEN (3U) 176 177 /******************** NCI HAL exposed functions *******************************/ 178 int phNxpNciHal_check_ncicmd_write_window(uint16_t cmd_len, uint8_t* p_cmd); 179 void phNxpNciHal_request_control(void); 180 void phNxpNciHal_release_control(void); 181 int phNxpNciHal_write_unlocked(uint16_t data_len, const uint8_t* p_data); 182 /******************************************************************************* 183 ** 184 ** Function phNxpNciHal_configFeatureList 185 ** 186 ** Description Configures the featureList based on chip type 187 188 ** Returns none 189 *******************************************************************************/ 190 void phNxpNciHal_configFeatureList(uint8_t* init_rsp, uint16_t rsp_len); 191 #endif /* _PHNXPNCIHAL_H_ */ 192